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2004-06-26 Alexandre Oliva <aoliva@redhat.com> 2000-08-07 Graham Stott <grahams@cygnus.co.uk> * am33-2.igen (fmadd, fmsub, fmnadd, fmnsub): Correct typo. 2000-05-29 Alexandre Oliva <aoliva@cygnus.com> * interp.c (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Take additional state arguments. Print exception type and call program_interrupt. Adjust callers. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Take additional arguments. * mn10300_sim.h (fpu_disabled_exception, fpu_unimp_exception, fpu_check_signal_exception): Adjust prototypes. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Likewise. * am33-2.igen: Adjust calls. 2000-05-19 Alexandre Oliva <aoliva@cygnus.com> * op_utils.c (cmp2fcc): Moved... * interp.c: ... here. 2000-05-18 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: Use `unsigned32', `signed32', `unsigned64' or `signed64' where type width is relevant. 2000-05-15 Alexandre Oliva <aoliva@cygnus.com> * mn10300_sim.h: Include sim-fpu.h. (FD2FPU, FPU2FD): Enclose the FD argument in parentheses. (fpu_check_signal_exception): Declare. (struct fp_prec_t, fp_single_prec, fp_double_prec): Likewise. (FP_SINGLE, FP_DOUBLE): Shorthands for fp_*_prec. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Declare. * interp.c (fpu_disabled_exception): Document. (fpu_unimp_exception): Likewise. (fpu_check_signal_exception): Define. (reg2val_32, round_32, val2reg_32, fp_single_prec): Likewise. (reg2val_64, round_64, val2reg_64, fp_double_prec): Likewise. (REG2VAL, ROUND, VAL2REG): Define shorthands. (fpu_status_ok): Define. (fpu_rsqrt, fpu_cmp, fpu_add, fpu_sub, fpu_mul, fpu_div, fpu_fmadd, fpu_fmsub, fpu_fnmadd, fpu_fnmsub): Define. * am33-2.igen (frsqrt, fcmp, fadd, fsub, fmul, fdiv, fmadd, fmsub, fnmadd, fnmsub): Use new functions. 2000-04-27 Alexandre Oliva <aoliva@cygnus.com> * interp.c (sim_create_inferior): Set PSW bit to enable FP insns if architecture is AM33/2.0. * am33.igen: Include am33-2.igen. 2000-04-23 Alexandre Oliva <aoliva@cygnus.com> * mn10300.igen (movm, call, ret, retf): Check for am33_2 too. * am33.igen (movm): Likewise. 2000-04-19 Alexandre Oliva <aoliva@cygnus.com> * am33.igen: Added `*am33_2' to some instructions that were missing it. 2000-04-07 Alexandre Oliva <aoliva@cygnus.com> * am33-2.igen: New file. All insns implemented, but FP flags are only set for fcmp, exceptional conditions are not handled yet. * Makefile.in (IGEN_INSN): Added am33-2.igen. (tmp-igen): Added -M am33_2. * mn10300.igen, am33.igen: Added `*am33_2' to all insns. * gencode.c: Support FMT_D3. * mn10300_sim.h (dword): New type. (struct _state): Added fpregs. (REG_FPCR, FPCR): New define. All assorted bitmaps. (XS2FS, AS2FS, Xf2FD): New macros. (FS2FPU, FD2FPU, FPU2FS, FPU2FD): Likewise. (load_dword, store_dword): New functions or macros. (u642dw, dw2u64): New functions. (fpu_disabled_exception, fpu_unimp_exception): Declared. * interp.c (fpu_disabled_exception): Defined; no actual implementation. (fpu_unimp_exception): Likewise. * op_utils.c (cmp2fcc): New function. * interp.c, mn10300_sim.h, op_utils.c: Convert function prototypes and definitions to ISO C. * gencode.c, simops.c: Delete. * Makefile.in: Remove non-COMMON dependencies and commands. * configure.in: Use common simulator always. Don't subst sim_gen nor mn10300_common. * configure: Rebuilt. * Makefile.in (WITHOUT_COMMON_OBJS, WITHOUT_COMMON_INTERP_DEP, WITHOUT_COMMON_RUN_OBJS): Remove. (WITH_COMMON_OBJS): Rename to MN10300_OBJS. (WITH_COMMON_INTERP_DEP): Rename to MN10300_INTERP_DEP. (WITH_COMMON_RUN_OBJS): Rename to SIM_RUN_OBJS. (SIM_EXTRA_CFLAGS): Don't use @sim_gen@. * interp.c: Remove non-common bits. * mn10300_sim.h: Likewise.2003-08-28 Andrew Cagney <cagney@redhat.com> * dv-mn103ser.c (do_polling_event): Change type of "serial_reg" to "long". (read_status_reg): Cast "serial_reg" to "long". * dv-mn103tim.c (do_counter_event): Change type of "timer_nr" to "long". (do_counter6_event, write_mode_reg, write_tm6md): Ditto.2003-02-27 Andrew Cagney <cagney@redhat.com> * interp.c (sim_open, sim_create_inferior, sim_open) (sim_create_inferior): Rename _bfd to bfd.2003-02-26 Andrew Cagney <cagney@redhat.com> * am33.igen: Call sim_engine_abort instead of abort.2003-02-26 David Carlton <carlton@math.stanford.edu> * dv-mn103tim.c (read_special_timer6_reg): Add break after empty default: label. (write_special_timer6_reg): Ditto. Update copyright.2002-11-28 Andrew Cagney <cagney@redhat.com> * sim-main.h: Only include "idecode.h" once. * Makefile.in (SIM_EXTRA_DEPS): Define.2002-06-16 Andrew Cagney <ac131313@redhat.com> * configure: Regenerated to track ../common/aclocal.m4 changes.2002-06-09 Andrew Cagney <cagney@redhat.com> * Makefile.in (INCLUDE): Update path to callback.h. * mn10300_sim.h: Include "gdb/callback.h" and "gdb/remote-sim.h". * tconfig.in: Ditto.2001-05-06 Jim Blandy <jimb@redhat.com> * mn10300.igen: Doc fixes. 2001-04-26 Alexandre Oliva <aoliva@redhat.com> * Makefile.in (idecode.o, op_utils.o, semantics.o, simops.o): Depend on targ-vals.h.2001-04-15 J.T. Conklin <jtc@redback.com> * Makefile.in (simops.o): Add simops.h to dependency list.Wed Aug 9 02:24:53 2000 Graham Stott <grahams@cygnus.co.uk> * am33.igen: Warning clean-up. (movm): Initialize PC and mask. (mov, movbu, movhu): Set srcreg2 from RI0. (bsch): Initialize c. (sat16_cmp): Actually do the comparison. (mov_llt): Do not overwrite dstreg with uninitialized variable.Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.2000-05-22 Alexandre Oliva <aoliva@cygnus.com> * am33.igen: Fix leading comments of SP-relative offset insns that referred to other registers. Make their offsets unsigned.2000-05-18 Alexandre Oliva <aoliva@cygnus.com> * mn10300_sim.h (genericAdd, genericSub, genericCmp, genericOr, genericXor, genericBtst): Use `unsigned32'. * op_utils.c: Likewise. * mn10300.igen, am33.igen: Use `unsigned32', `signed32', `unsigned64' or `signed64' where type width is relevant.2000-04-25 Alexandre Oliva <aoliva@cygnus.com> * am33.igen (inc4 Rn): Use genericAdd so as to modify flags.2000-04-09 Alexandre Oliva <aoliva@cygnus.com> * am33.igen: Make SP-relative offsets unsigned. Add `*am33' for some instructions that were missing it.2000-03-03 Alexandre Oliva <oliva@lsd.ic.unicamp.br> * Makefile.in (IGEN_INSN): Added am33.igen.Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes.Tue Jul 13 13:26:20 1999 Andrew Cagney <cagney@b1.cygnus.com> * interp.c: Clarify error message reporting an unknown board.1999-05-08 Felix Lee <flee@cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. 1999-04-16 Frank Ch. Eigler <fche@cygnus.com> * interp.c (program_interrupt): Detect undesired recursion using static flag. Set NMIRC register's SYSEF flag during --board=stdeval1 mode. * dv-mn103-int.c (write_icr): Add backdoor address to allow CPU to set SYSEF flag.1999-04-02 Keith Seitz <keiths@cygnus.com> * Makefile.in (SIM_EXTRA_CFLAGS): Define a POLL_QUIT_INTERVAL for use in the simulator so that the poll_quit callback is not called too often.Tue Mar 9 21:26:41 1999 Andrew Cagney <cagney@b1.cygnus.com> * dv-mn103int.c (mn103int_ioctl): Return something. * dv-mn103tim.c (write_tm6md): GCC suggested parentheses around && within ||.Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com) * mn10300.igen (retf): Fix return address computation and store the new pc value into nia.1998-12-29 Frank Ch. Eigler <fche@cygnus.com> * Makefile.in (WITH_COMMON_OBJS): Build also dv-sockser.o. * interp.c (sim_open): Add stub mn103002 cache control memory regions. Set OPERATING_ENVIRONMENT on "stdeval1" board. (mn10300_core_signal): New function to intercept memory errors. (program_interrupt): New function to dispatch to exception vector (mn10300_exception_*): New functions to snapshot pre/post exception state. * sim-main.h (SIM_CORE_SIGNAL): Define hook - call mn10300_core_signal. (SIM_ENGINE_HALT_HOOK): Do nothing. (SIM_CPU_EXCEPTION*): Define hooks to call mn10300_cpu_exception*(). (_sim_cpu): Add exc_* fields to store register value snapshots. * dv-mn103ser.c (*): Support dv-sockser backend for UART I/O. Various endianness and warning fixes. * mn10300.igen (illegal): Call program_interrupt on error. (break): Call program_interrupt on breakpoint Several changes from <janczyn@cygnus.com> and <cagney@cygnus.com> merged in: * dv-mn103int.c (mn103int_ioctl): New function for NMI generation. (mn103int_finish): Install it as ioctl handler. * dv-mn103tim.c: Support timer 6 specially. Endianness fixes. Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Allow autoincrement stores using the same register for source and destination operands.Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com> * interp.c (sim_open): Check for invalid --board option, fix indentation, allocate memory for mem control and DMA regs.Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> * mn10300.igen (div,divu): Fix divide instructions so divide by 0 behaves like the hardware.Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com> * sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Handle case where first DSP operation modifies a register used in the second DSP operation correctly.Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Detect cases where two operands must not match for DSP instructions too.Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Detect cases where two operands must not match in non-DSP instructions.Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com> * op_utils.c (do_syscall): Rewrite to use common/syscall.c. (syscall_read_mem, syscall_write_mem): New functions for syscall callbacks. * mn10300_sim.h: Add prototypes for syscall_read_mem and syscall_write_mem. * mn10300.igen: Change C++ style comments to C style comments. Check for divide by zero in div and divu ops.Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com) * am33.igen (translate_xreg): New function. Use it as needed.Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Add some missing instructions. * am33.igen: Autoincrement loads/store fixes.Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com) * am33.igen: Add mov_lCC DSP instructions. * am33.igen: Add most am33 DSP instructions.Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com) * mn10300.igen: Fix Z bit for addc and subc instructions. Minor fixes in multiply/divide patterns. * am33.igen: Add missing mul[u] imm32,Rn. Fix condition code handling for many instructions. Fix sign extension for some 24bit immediates. * am33.igen: Fix Z bit for remaining addc/subc instructions. Do not sign extend immediate for mov imm,XRn. More random mul, mac & div fixes. Remove some unused variables. Sign extend 24bit displacement in memory addresses. * am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various fixes to 2 register multiply, divide and mac instructions. Set Z,N correctly for sat16. Sign extend 24 bit immediate for add, and sub instructions. * am33.igen: Add remaining non-DSP instructions.Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com) * am33.igen (translate_rreg): New function. Use it as appropriate. * am33.igen: More am33 instructions. Fix "div".Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com) * mn10300.igen: Add am33 support. * Makefile.in: Use multi-sim to support both a mn10300 and am33 simulator. * am33.igen: Add many more am33 instructions.Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com) * mn10300_sim.h (FETCH24): Define. * mn10300_sim.h: Add defines for some registers found on the AM33. * am33.igen: New file with some am33 support.Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com) * mn10300_sim.h: Include bfd.h (struct state): Add more room for processor specific registers. (REG_E0): Define.Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com> * dv-mn103tim.c: Include sim-assert.h * dv-mn103ser.c (do_polling_event): Check for incoming data on serial line and schedule next polling event. (read_status_reg): schedule events to check for incoming data on serial line and issue interrupt if necessary. Fri Jun 19 16:47:27 1998 Joyce Janczyn <janczyn@cygnus.com> * interp.c (sim_open): hook up serial 1 and 2 ports properly (typo).Fri Jun 19 11:59:26 1998 Joyce Janczyn <janczyn@cygnus.com>
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