mn10300.igen

这个是LINUX下的GDB调度工具的源码

  PC = cia;
  value = EXTEND16 (FETCH16(IMM16A, IMM16B));
  State.regs[REG_D0 + DN0] = value;
}


// 1111 1100 1100 11Dn imm32...; mov imm32,Dn
8.0xfc+4.0xc,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4l:::mov
"mov"
*mn10300

*am33
*am33_2

{
  /* OP_FCCC0000 (); */
  unsigned32 value;

  PC = cia;
  value = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
  State.regs[REG_D0 + DN0] = value;
}


// 0010 01An imm16...; mov imm16,An (imm16 is zero-extended)
4.0x2,01,2.AN0+8.IMM16A+8.IMM16B:S2c:::mov
"mov"
*mn10300

*am33
*am33_2

{
  /* OP_240000 (); */
  unsigned32 value;

  PC = cia;
  value = FETCH16(IMM16A, IMM16B);
  State.regs[REG_A0 + AN0] = value;
}


// 1111 1100 1101 11An imm32...; mov imm32,An
8.0xfc+4.0xd,11,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4m:::mov
"mov"
*mn10300

*am33
*am33_2

{
    /* OP_FCDC0000 (); */
    PC = cia;
    State.regs[REG_A0 + AN0] = FETCH32(IMM32A, IMM32B, IMM32C, IMM32D);
}


// 1111 0000 0100 DnAm; movbu (Am),Dn
8.0xf0+4.0x4,2.DN1,2.AM0:D0:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F040 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_byte (State.regs[REG_A0 + AM0]);
}


// 1111 1000 0100 DnAm d8......; movbu (d8,Am),Dn (d8 is sign-extended)
8.0xf8+4.0x4,2.DN1,2.AM0+8.D8:D1f:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F84000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_byte ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
}


// 1111 1010 0100 DnAm d16.....; movbu (d16,Am),Dn (d16 is sign-extended.)
8.0xfa+4.0x4,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FA400000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_byte ((State.regs[REG_A0 + AM0]
		  + EXTEND16 (FETCH16(D16A, D16B))));
}


// 1111 1100 0100 DnAm d32.....; movbu (d32,Am),Dn
8.0xfc+4.0x4,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FC400000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_byte ((State.regs[REG_A0 + AM0]
		  + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
}


// 1111 1000 1011 10Dn d8......; movbu (d8,SP),Dn (d8 is zero-extended)
8.0xf8+4.0xb,10,2.DN0+8.D8:D1a:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F8B800 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_byte ((State.regs[REG_SP] + (D8)));
}


// 1111 1010 1011 10Dn d16.....; movbu (d16,SP),Dn (d16 is zero-extended.)
8.0xfa+4.0xb,10,2.DN0+8.IMM16A+8.IMM16B:D2a:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FAB80000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_byte ((State.regs[REG_SP]
		  + FETCH16(IMM16A, IMM16B)));
}


// 1111 1100 1011 10Dn d32.....; movbu (d32,SP),Dn
8.0xfc+4.0xb,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FCB80000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_byte (State.regs[REG_SP]
		 + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
}


// 1111 0100 00Dn DiAm; movbu (Di,Am),Dn
8.0xf4+00,2.DN2,2.DI,2.AM0:D0a:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F400 (); */
  PC = cia;
  State.regs[REG_D0 + DN2]
    = load_byte ((State.regs[REG_A0 + AM0]
		  + State.regs[REG_D0 + DI]));
}


// 0011 01Dn abs16...; movbu (abs16),Dn (abs16 is zero-extended)
4.0x3,01,2.DN0+8.IMM16A+8.IMM16B:S2:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_340000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0] = load_byte (FETCH16(IMM16A, IMM16B));
}


// 1111 1100 1010 10Dn abs32...; movbu (abs32),Dn
8.0xfc+4.0xa,10,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FCA80000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
}


// 1111 0000 0101 DmAn; movbu Dm,(An)
8.0xf0+4.0x5,2.DM1,2.AN0:D0b:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F050 (); */
  PC = cia;
  store_byte (State.regs[REG_A0 + AN0], State.regs[REG_D0 + DM1]);
}


// 1111 1000 0101 DmAn d8......; movbu Dm,(d8,An) (d8 is sign-extended)
8.0xf8+4.0x5,2.DM1,2.AN0+8.D8:D1b:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F85000 (); */
  PC = cia;
  store_byte ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1010 0101 DmAn d16.....; movbu Dm,(d16,An) (d16 is sign-extended.)
8.0xfa+4.0x5,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FA500000 (); */
  PC = cia;
  store_byte ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1100 0101 DmAn d32.....; movbu Dm,(d32,An)
8.0xfc+4.0x5,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FC500000 (); */
  PC = cia;
  store_byte ((State.regs[REG_A0 + AN0]
	       + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1000 1001 Dm10 d8......; movbu Dm,(d8,SP) (d8 is zero-extended)
8.0xf8+4.0x9,2.DM1,10+8.D8:D1c:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F89200 (); */
  PC = cia;
  store_byte (State.regs[REG_SP] + (D8), State.regs[REG_D0 + DM1]);
}


// 1111 1010 1001 Dm10 d16.....; movbu Dm,(d16,SP) (d16 is zero-extended.)
8.0xfa+4.0x9,2.DM1,10+8.IMM16A+8.IMM16B:D2c:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FA920000 (); */
  PC = cia;
  store_byte (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1100 1001 Dm10 d32.....; movbu Dm,(d32,SP)
8.0xfc+4.0x9,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FC920000 (); */
  PC = cia;
  store_byte (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
	      State.regs[REG_D0 + DM1]);
}


// 1111 0100 01Dm DiAn; movbu Dm,(Di,An)
8.0xf4+01,2.DM2,2.DI,2.AN0:D0c:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_F440 (); */
  PC = cia;
  store_byte ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
	      State.regs[REG_D0 + DM2]);
}


// 0000 Dm10 abs16...; movbu Dm,(abs16) (abs16 is zero-extended)
4.0x0,2.DM1,10+8.IMM16A+8.IMM16B:S2a:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_20000 (); */
  PC = cia;
  store_byte (FETCH16(IMM16A, IMM16B),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1100 1000 Dm10 abs32...; movbu Dm,(abs32)
8.0xfc+4.0x8,2.DM1,10+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movbu
"movbu"
*mn10300

*am33
*am33_2

{
  /* OP_FC820000 (); */
  PC = cia;
  store_byte (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
	      State.regs[REG_D0 + DM1]);
}


// 1111 0000 0110 DnAm; movhu (Am),Dn
8.0xf0+4.0x6,2.DN1,2.AM0:D0:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F060 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_half (State.regs[REG_A0 + AM0]);
}


// 1111 1000 0110 DnAm d8......; movhu (d8,Am),Dn (d8 is sign-extended)
8.0xf8+4.0x6,2.DN1,2.AM0+8.D8:D1d:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F86000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_half ((State.regs[REG_A0 + AM0] + EXTEND8 (D8)));
}


// 1111 1010 0110 DnAm d16.....; movhu (d16,Am),Dn (d16 is sign-extended.)
8.0xfa+4.0x6,2.DN1,2.AM0+8.D16A+8.D16B:D2:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FA600000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_half ((State.regs[REG_A0 + AM0]
		  + EXTEND16 (FETCH16(D16A, D16B))));
}


// 1111 1100 0110 DnAm d32.....; movhu (d32,Am),Dn
8.0xfc+4.0x6,2.DN1,2.AM0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FC600000 (); */
  PC = cia;
  State.regs[REG_D0 + DN1]
    = load_half ((State.regs[REG_A0 + AM0]
		  + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)));
}


// 1111 1000 1011 11Dn d8.....; movhu (d8,SP),Dn (d8 is zero-extended)
8.0xf8+4.0xb,11,2.DN0+8.D8:D1a:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F8BC00 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_half ((State.regs[REG_SP] + (D8)));
}


// 1111 1010 1011 11Dn d16.....; movhu (d16,SP),Dn (d16 is zero-extended.)
8.0xfa+4.0xb,11,2.DN0+8.IMM16A+8.IMM16B:D2a:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FABC0000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_half ((State.regs[REG_SP] + FETCH16(IMM16A, IMM16B)));
}


// 1111 1100 1011 11Dn d32.....; movhu (d32,SP),Dn
8.0xfc+4.0xb,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4a:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FCBC0000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_half (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
}


// 1111 0100 10Dn DiAm; movhu (Di,Am),Dn
8.0xf4+10,2.DN2,2.DI,2.AM0:D0a:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F480 (); */
  PC = cia;
  State.regs[REG_D0 + DN2]
    = load_half ((State.regs[REG_A0 + AM0] + State.regs[REG_D0 + DI]));
}


// 0011 10Dn abs16...; movhu (abs16),Dn (abs16 is zero-extended)
4.0x3,10,2.DN0+8.IMM16A+8.IMM16B:S2:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_380000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0] = load_half (FETCH16(IMM16A, IMM16B));
}


// 1111 1100 1010 11Dn abs32...; movhu (abs32),Dn
8.0xfc+4.0xa,11,2.DN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4b:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FCAC0000 (); */
  PC = cia;
  State.regs[REG_D0 + DN0]
    = load_half (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D));
}


// 1111 0000 0111 DmAn; movhu Dm,(An)
8.0xf0+4.0x7,2.DM1,2.AN0:D0b:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F070 (); */
  PC = cia;
  store_half (State.regs[REG_A0 + AN0],
	      State.regs[REG_D0 + DM1]);
}


// 1111 1000 0111 DmAn d8......; movhu Dm,(d8,An) (d8 is sign-extended)
8.0xf8+4.0x7,2.DM1,2.AN0+8.D8:D1b:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F87000 (); */
  PC = cia;
  store_half ((State.regs[REG_A0 + AN0] + EXTEND8 (D8)),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1010 0111 DnAm d16.....; movhu Dm,(d16,An) (d16 is sign-extended.)
8.0xfa+4.0x7,2.DM1,2.AN0+8.D16A+8.D16B:D2b:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FA700000 (); */
  PC = cia;
  store_half ((State.regs[REG_A0 + AN0] + EXTEND16 (FETCH16(D16A, D16B))),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1100 0111 DmAn d32.....; movhu Dm,(d32,An)
8.0xfc+4.0x7,2.DM1,2.AN0+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4c:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FC700000 (); */
  PC = cia;
  store_half ((State.regs[REG_A0 + AN0]
	       + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D)),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1000 1001 Dm11 d8....; movhu Dm,(d8,SP) (d8 is zero-extended)
8.0xf8+4.0x9,2.DM1,11+8.D8:D1c:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F89300 (); */
  PC = cia;
  store_half (State.regs[REG_SP] + (D8),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1010 1001 Dm11 d16.....; movhu Dm,(d16,SP) (d16 is zero-extended.)
8.0xfa+4.0x9,2.DM1,11+8.IMM16A+8.IMM16B:D2c:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FA930000 (); */
  PC = cia;
  store_half (State.regs[REG_SP] + FETCH16(IMM16A, IMM16B),
	      State.regs[REG_D0 + DM1]);
}


// 1111 1100 1001 Dm11 d32.....; movhu Dm,(d32,SP)
8.0xfc+4.0x9,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4d:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FC930000 (); */
  PC = cia;
  store_half (State.regs[REG_SP] + FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
	      State.regs[REG_D0 + DM1]);
}


// 1111 0100 11Dm DiAn; movhu Dm,(Di,An)
8.0xf4+11,2.DM2,2.DI,2.AN0:D0c:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_F4C0 (); */
  PC = cia;
  store_half ((State.regs[REG_A0 + AN0] + State.regs[REG_D0 + DI]),
	      State.regs[REG_D0 + DM2]);
}


// 0000 Dm11 abs16...; movhu Dm,(abs16) (abs16 is zero-extended)
4.0x0,2.DM1,11+8.IMM16A+8.IMM16B:S2a:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_30000 (); */
  PC = cia;
  store_half (FETCH16(IMM16A, IMM16B), State.regs[REG_D0 + DM1]);
}


// 1111 1100 1000 Dm11 abs32...; movhu Dm,(abs32)
8.0xfc+4.0x8,2.DM1,11+8.IMM32A+8.IMM32B+8.IMM32C+8.IMM32D:D4e:::movhu
"movhu"
*mn10300

*am33
*am33_2

{
  /* OP_FC830000 (); */
  PC = cia;
  store_half (FETCH32(IMM32A, IMM32B, IMM32C, IMM32D),
	      State.regs[REG_D0 + DM1]);
}


// 1111 0010 1101 00Dn; ext Dn
8.0xf2+4.0xd,00,2.DN0:D0:::ext
"ext"
*mn10300

*am33
*am33_2

{
  /* OP_F2D0 (); */
  PC = cia;
  if (State.regs[REG_D0 + DN0] & 0x80000000)
    State.regs[REG_MDR] = -1;
  else
    State.regs[REG_MDR] = 0;
}


// 0001 00Dn; extb Dn
4.0x1,00,2.DN0:S0:::extb
"extb"
*mn10300

*am33
*am33_2

{
  /* OP_10 (); */
  PC = cia;
  State.regs[REG_D0 + DN0] = EXTEND8 (State.regs[REG_D0 + DN0]);
}


// 0001 01Dn; extbu Dn
4.0x1,01,2.DN0:S0:::extbu
"extbu"
*mn10300

*am33
*am33_2

{
  /* OP_14 (); */
  PC = cia;
  State.regs[REG_D0 + DN0] &= 0xff;
}


// 0001 10Dn; exth Dn
4.0x1,10,2.DN0:S0:::exth
"exth"
*mn10300

*am33
*am33_2

{
  /* OP_18 (); */
  PC = cia;
  State.regs[REG_D0 + DN0] = EXTEND16 (State.regs[REG_D0 + DN0]);
}


// 0001 11Dn; exthu Dn
4.0x1,11,2.DN0:S0:::exthu
"exthu"
*mn10300

*am33
*am33_2

{
  /* OP_1C (); */
  PC = cia;
  State.regs[REG_D0 + DN0] &= 0xffff;
}