compile.c

这个是LINUX下的GDB调度工具的源码

	    LABEL (O_STM):
	    for (tmp = 7; tmp >= 0; tmp--)
	      {
		if (arga & (1 << tmp))
		  {
		    PUSHWORD (cpu.regs[tmp].s[LOW]);
		  }
	      }
	    goto nextpc;

	    LABEL (O_TAS):
	    C = 0;
	    V = 0;
	    Z = arga == 0;
	    N = arga < 0;
	    res = arga | 0x80;
	    goto none;

	    LABEL (O_PRTD):
	    LABEL (O_XCH):
	    LABEL (O_RTD):
	    cpu.exception = SIGILL;
	    goto next;

	    LABEL (O_TRAP_VS):
	    LABEL (O_SLEEP):
	    LABEL (O_BPT):
	    cpu.exception = SIGTRAP;
	    goto next;
	    break;
	  }

	ENDDISPATCH;

	DISPATCH (code->flags)
	  {
	  bitop:
	    Z = (res & bit) == 0;
	    pc = code->next_pc;
	    break;
	    LABEL (FLAG_multword):
	    Z = (res & 0xffff) == 0;
	    N = (res & 0x8000) != 0;
	    V = 0;
	    C = 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_multbyte):
	    /* 8*8 -> 16 */
	    Z = (res & 0xff) == 0;
	    N = (res & 0x80) != 0;
	    V = 0;
	    C = 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_shiftword):
	    N = (res & 0x8000) != 0;
	    Z = (res & 0xffff) == 0;
	    V = 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_shiftbyte):
	    N = (res & 0x80) != 0;
	    Z = (res & 0xff) == 0;
	    V = 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_special):
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_m):
	    /* Move byte flags */
	    /* after a logical instruction */
	    N = (res & 0x80) != 0;
	    Z = (res & 0xff) == 0;
	    V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_M):
	    /* Move word flags */
	    /* after a logical instruction */
	    N = (res & 0x8000) != 0;
	    Z = (res & 0xffff) == 0;
	    V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_a):
	    /* after byte sized arith */
	    C = (res & 0x100) != 0;
	    N = (res & 0x80) != 0;
	    Z = (res & 0xff) == 0;
	    V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x80) != 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_A):
	    /* after word sized arith */
	    C = (res & 0x10000) != 0;
	    N = (res & 0x8000) != 0;
	    Z = (res & 0xffff) == 0;
	    V = (((~arga & ~argb & res) | (arga & argb & ~res)) & 0x8000) != 0;
	    pc = code->next_pc;
	    break;

	    LABEL (FLAG_NONE):
	  none:;
	    /* no flags but store */
	    pc = code->next_pc;
	    break;
	    LABEL (FLAG_NOSTORE):
	    /* no flags and no store */
	    pc = code->next_pc;
	    break;
	    LABEL (FLAG_CLEAR):
	    /* clear flags */
	    N = 0;
	    Z = 1;
	    V = 0;
	    C = 0;
	    pc = code->next_pc;
	    break;
	  condtrue:
	    pc = arga;
	    goto next;
	  }
	ENDDISPATCH;

	DISPATCH (code->dst.type)
	  {
	    unsigned char *lval;

	    LABEL (STORE_CRB):
	    (*(code->dst.reg.segptr)) = cpu.memory + (res << 16);
	    break;

	    LABEL (STORE_NOP):
	    break;

	    LABEL (STORE_REG_B):
	    (*(code->dst.reg.bptr)) = res;
	    break;

	    LABEL (STORE_REG_W):
	    (*(code->dst.reg.wptr)) = res;
	    break;

	    LABEL (STORE_REG_L):
	    {
	      int l, r;

	      r = (union rtype *) (code->dst.reg.wptr) - &cpu.regs[0];
	      r++;
	      *(code->dst.reg.wptr) = res >> 16;
	      cpu.regs[r].s[LOW] = res & 0xffff;

	    }

	    break;

	    LABEL (STORE_DISP_W):
	    lval = displval (code->dst);
	    setwordat (lval, res);
	    break;

	    LABEL (STORE_DISP_B):
	    lval = displval (code->dst);
	    setbyteat (lval, res);
	    break;

	    LABEL (STORE_INC_B):
	    lval = elval (code->dst, 0);
	    setbyteat (lval, res);
	    (*(code->dst.reg.wptr))++;
	    break;

	    LABEL (STORE_INC_W):
	    lval = elval (code->dst, 0);
	    setwordat (lval, res);
	    (*(code->dst.reg.wptr)) += 2;
	    break;

	    LABEL (STORE_DEC_B):
	    (*(code->dst.reg.wptr))--;
	    lval = elval (code->dst, 0);
	    setbyteat (lval, res);
	    break;

	    LABEL (STORE_CRW):
	    /* Make an up to date sr from the flag state */
	    cpu.regs[R_SR].s[LOW] = res;
	    GETSR ();
	    break;

	    LABEL (STORE_DEC_W):
	    (*(code->dst.reg.wptr)) -= 2;
	    lval = elval (code->dst, 0);
	    setwordat (lval, res);

	    break;

	  nextpc:
	    pc = code->next_pc;

	  }
	ENDDISPATCH;
      next:;
      }
    while (!cpu.exception);
  }

  cpu.ticks += get_now () - tick_start;
  cpu.cycles += cycles;
  cpu.insts += insts;
  cpu.regs[R_PC].s[LOW] = pc;
  BUILDSR ();

  signal (SIGINT, prev);
  signal (SIGSEGV, prev_seg);
}




int
sim_write (sd, addr, buffer, size)
     SIM_DESC sd;
     SIM_ADDR addr;
     unsigned char *buffer;
     int size;
{
  int i;

  init_pointers ();
  if (addr < 0 || addr + size > H8500_MSIZE)
    return 0;
  for (i = 0; i < size; i++)
    {
      cpu.memory[addr + i] = buffer[i];
      cpu.cache_idx[addr + i] = 0;
    }
  return size;
}

int
sim_read (sd, addr, buffer, size)
     SIM_DESC sd;
     SIM_ADDR addr;
     unsigned char *buffer;
     int size;
{
  init_pointers ();
  if (addr < 0 || addr + size > H8500_MSIZE)
    return 0;
  memcpy (buffer, cpu.memory + addr, size);
  return size;
}

/* Ripped off from tm-h8500.h */

#define R0_REGNUM	0
#define R1_REGNUM	1
#define R2_REGNUM	2
#define R3_REGNUM	3
#define R4_REGNUM	4
#define R5_REGNUM	5
#define R6_REGNUM	6
#define R7_REGNUM	7

/* As above, but with correct seg register glued on */
#define PR0_REGNUM	8
#define PR1_REGNUM	9
#define PR2_REGNUM	10
#define PR3_REGNUM	11
#define PR4_REGNUM	12
#define PR5_REGNUM	13
#define PR6_REGNUM	14
#define PR7_REGNUM	15

#define SP_REGNUM       PR7_REGNUM	/* Contains address of top of stack */
#define FP_REGNUM       PR6_REGNUM	/* Contains address of executing stack frame */


#define SEG_C_REGNUM	16	/* Segment registers */
#define SEG_D_REGNUM	17
#define SEG_E_REGNUM	18
#define SEG_T_REGNUM	19

#define CCR_REGNUM      20	/* Contains processor status */
#define PC_REGNUM       21	/* Contains program counter */

#define CYCLE_REGNUM    22
#define INST_REGNUM     23
#define TICK_REGNUM     24

int
sim_store_register (sd, rn, value, length)
     SIM_DESC sd;
     int rn;
     unsigned char *value;
     int length;
{
  int seg = 0;
  int reg = -1;

  init_pointers ();
  switch (rn)
    {
    case PC_REGNUM:
      SET_SEGREG (R_CP, (value[1]<<16));
      cpu.regs[R_PC].s[LOW] = (value[2] << 8) | value[3];
      break;
    case SEG_C_REGNUM:
    case SEG_D_REGNUM:
    case SEG_E_REGNUM:
    case SEG_T_REGNUM:
      seg = rn - SEG_C_REGNUM + R_CP;
      reg = -1;
      break;
    default:
      abort ();
    case R0_REGNUM:
    case R1_REGNUM:
    case R2_REGNUM:
    case R3_REGNUM:
    case R4_REGNUM:
    case R5_REGNUM:
    case R6_REGNUM:
    case R7_REGNUM:
      seg = 0;
      reg = rn - R0_REGNUM;
      break;
    case CCR_REGNUM:
      seg = 0;
      reg = R_SR;
      break;
    case CYCLE_REGNUM:
      cpu.cycles = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
      return;
    case INST_REGNUM:
      cpu.insts = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
      return;
    case TICK_REGNUM:
      cpu.ticks = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
      return;
    case PR0_REGNUM:
    case PR1_REGNUM:
    case PR2_REGNUM:
    case PR3_REGNUM:
    case PR4_REGNUM:
    case PR5_REGNUM:
    case PR6_REGNUM:
    case PR7_REGNUM:
      SET_SEGREG (segforreg[rn], value[1]);
      reg = rn - PR0_REGNUM;      
      cpu.regs[reg].s[LOW] = (value[2] << 8) | value[3];
      return;
    }

  if (seg)
    SET_SEGREG (seg, value[0] << 16);

  if (reg > 0)
    {
      cpu.regs[reg].s[LOW] = (value[0] << 8) | value[1];
    }
  return -1;
}

int
sim_fetch_register (sd, rn, buf, length)
     SIM_DESC sd;
     int rn;
     unsigned char *buf;
     int length;
{
  init_pointers ();

  switch (rn)
    {
    default:
      abort ();
    case SEG_C_REGNUM:
    case SEG_D_REGNUM:
    case SEG_E_REGNUM:
    case SEG_T_REGNUM:
      buf[0] = GET_SEGREG(rn - SEG_C_REGNUM + R_CP);
      break;
    case CCR_REGNUM:
      buf[0] = cpu.regs[R_SR].s[HIGH];
      buf[1] = cpu.regs[R_SR].s[LOW];
      break;
    case PC_REGNUM:
      buf[0] = 0;
      buf[1] = GET_SEGREG(R_CP);
      buf[2] = HIGH_BYTE (cpu.regs[R_PC].s[LOW]);
      buf[3] = LOW_BYTE (cpu.regs[R_PC].s[LOW]);
      break;

    case PR0_REGNUM:
    case PR1_REGNUM:
    case PR2_REGNUM:
    case PR3_REGNUM:
    case PR4_REGNUM:
    case PR5_REGNUM:
    case PR6_REGNUM:
    case PR7_REGNUM:
      rn -= PR0_REGNUM;
      buf[0] = 0;
      buf[1] = GET_SEGREG(segforreg[rn]);
      buf[2] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
      buf[3] = LOW_BYTE (cpu.regs[rn].s[LOW]);
      break;
    case R0_REGNUM:
    case R1_REGNUM:
    case R2_REGNUM:
    case R3_REGNUM:
    case R4_REGNUM:
    case R5_REGNUM:
    case R6_REGNUM:
    case R7_REGNUM:
      buf[0] = HIGH_BYTE (cpu.regs[rn].s[LOW]);
      buf[1] = LOW_BYTE (cpu.regs[rn].s[LOW]);
      break;
    case CYCLE_REGNUM:
      buf[0] = cpu.cycles >> 24;
      buf[1] = cpu.cycles >> 16;
      buf[2] = cpu.cycles >> 8;
      buf[3] = cpu.cycles >> 0;
      break;

    case TICK_REGNUM:
      buf[0] = cpu.ticks >> 24;
      buf[1] = cpu.ticks >> 16;
      buf[2] = cpu.ticks >> 8;
      buf[3] = cpu.ticks >> 0;
      break;

    case INST_REGNUM:
      buf[0] = cpu.insts >> 24;
      buf[1] = cpu.insts >> 16;
      buf[2] = cpu.insts >> 8;
      buf[3] = cpu.insts >> 0;
      break;
    }
  return -1;
}

int
sim_trace (sd)
     SIM_DESC sd;
{

  int i;

  for (i = 0; i < 12; i += 2)
    {
      unsigned char *p = cpu.regs[R_TP].c + ((cpu.regs[R6].s[LOW] + i) & 0xffff);
      unsigned short *j = (unsigned short *) p;

      printf ("%04x ", *j);
    }
  printf ("\n");
  printf ("%02x %02x %02x %02x:%04x %04x %04x %04x %04x %04x %04x %04x %04x\n",
	  NORMAL_DP,
	  NORMAL_EP,
	  NORMAL_TP,
	  NORMAL_CP,
	  cpu.regs[R_PC].s[LOW],
	  cpu.regs[0].s[LOW],
	  cpu.regs[1].s[LOW],
	  cpu.regs[2].s[LOW],
	  cpu.regs[3].s[LOW],
	  cpu.regs[4].s[LOW],
	  cpu.regs[5].s[LOW],
	  cpu.regs[6].s[LOW],
	  cpu.regs[7].s[LOW]);
  sim_resume (sd, 1, 0);
  return 0;
}

void
sim_stop_reason (sd, reason, sigrc)
     SIM_DESC sd;
     enum sim_stop *reason;
     int *sigrc;
{
  *reason = sim_stopped;
  *sigrc = cpu.exception;
}

void
sim_set_simcache_size (n)
{
  if (cpu.cache)
    free (cpu.cache);
  if (n < 2)
    n = 2;
  cpu.cache = (decoded_inst *) malloc (sizeof (decoded_inst) * n);
  cpu.csize = n;
}

void
sim_size (n)
     int n;
{
  /* Fixed size.  */
}

void
sim_info (sd, verbose)
     SIM_DESC sd;
     int verbose;
{
  double timetaken = (double) cpu.ticks / (double) now_persec ();
  double virttime = cpu.cycles / 10.0e6;

  (*sim_callback->printf_filtered) (sim_callback,
				    "\n\ninstructions executed  %10d\n",
				    cpu.insts);
  (*sim_callback->printf_filtered) (sim_callback,
				    "cycles (v approximate) %10d\n",
				    cpu.cycles);
  (*sim_callback->printf_filtered) (sim_callback,
				    "real time taken        %10.4f\n",
				    timetaken);
  (*sim_callback->printf_filtered) (sim_callback,
				    "virtual time taked     %10.4f\n",
				    virttime);
  if (timetaken) 
    {
      (*sim_callback->printf_filtered) (sim_callback,
					"simulation ratio       %10.4f\n",
					virttime / timetaken);
    }
  
  (*sim_callback->printf_filtered) (sim_callback,
				    "compiles               %10d\n",
				    cpu.compiles);
  (*sim_callback->printf_filtered) (sim_callback,
				    "cache size             %10d\n",
				    cpu.csize);
}

SIM_DESC
sim_open (kind, cb, abfd, argv)
     SIM_OPEN_KIND kind;
     host_callback *cb;
     struct bfd *abfd;
     char **argv;
{
  sim_kind = kind;
  myname = argv[0];
  sim_callback = cb;
  /* fudge our descriptor */
  return (SIM_DESC) 1;
}

void
sim_close (sd, quitting)
     SIM_DESC sd;
     int quitting;
{
  /* nothing to do */
}

SIM_RC
sim_load (sd, prog, abfd, from_tty)
     SIM_DESC sd;
     char *prog;
     bfd *abfd;
     int from_tty;
{
  extern bfd *sim_load_file (); /* ??? Don't know where this should live.  */
  bfd *prog_bfd;

  prog_bfd = sim_load_file (sd, myname, sim_callback, prog, abfd,
			    sim_kind == SIM_OPEN_DEBUG,
			    0, sim_write);
  if (prog_bfd == NULL)
    return SIM_RC_FAIL;
  if (abfd == NULL)
    bfd_close (prog_bfd);
  return SIM_RC_OK;
}

SIM_RC
sim_create_inferior (sd, abfd, argv, env)
     SIM_DESC sd;
     struct bfd *abfd;
     char **argv;
     char **env;
{
  int pc;
  bfd_vma start_address;
  if (abfd != NULL)
    start_address = bfd_get_start_address (abfd);
  else
    start_address = 0;

  /* ??? We assume this is a 4 byte quantity.  */
  pc = start_address;

  sim_store_register (sd, PC_REGNUM, (unsigned char *) &pc, 4);
  return SIM_RC_OK;
}

void
sim_do_command (sd, cmd)
     SIM_DESC sd;
     char *cmd;
{
  (*sim_callback->printf_filtered) (sim_callback,
				    "This simulator does not accept any commands.\n");
}

void
sim_set_callbacks (ptr)
     struct host_callback_struct *ptr;
{
  sim_callback = ptr;
}