📄 compile.c
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/* Simulator for the Hitachi H8/500 architecture. Written by Steve Chamberlain of Cygnus Support. sac@cygnus.com This file is part of H8/500 sim THIS SOFTWARE IS NOT COPYRIGHTED Cygnus offers the following for use in the public domain. Cygnus makes no warranty with regard to the software or it's performance and the user accepts the software "AS IS" with all faults. CYGNUS DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.*/#include "config.h"#include <signal.h>#ifdef HAVE_STDLIB_H#include <stdlib.h>#endif#ifdef HAVE_TIME_H#include <time.h>#endif#include <sys/param.h>#include <setjmp.h>#include "ansidecl.h"#include "bfd.h"#include "gdb/callback.h"#include "gdb/remote-sim.h"#define O_RECOMPILE 85#define DEFINE_TABLE#define DISASSEMBLER_TABLE/* FIXME: Needs to live in header file. This header should also include the things in remote-sim.h. One could move this to remote-sim.h but this function isn't needed by gdb. */void sim_set_simcache_size PARAMS ((int));int debug;host_callback *sim_callback;static SIM_OPEN_KIND sim_kind;static char *myname;/* This code can be compiled with any old C compiler, in which case four or five switch statements will be executed for each instruction simulated. It can be compiled with GCC, then the simulated instructions thread through the code fragments, and everything goes much faster. These definitions make the code work either way*/#ifdef __GNUC__#define DISPATCH(X) goto *(X); do#define LABEL(X) X##_L#define LABELN(X,N) X##_L##N#define LABEL_REF(X) &&X##_L#define LABEL_REFN(X,N) &&X##_L##N#define ENDDISPATCH while (0);#define fastref void *#define DEFAULT ;#define INLINE __inline__#else#define DEFAULT default :#define DISPATCH(X) switch (X)#define LABEL(X) case X#define LABELN(X,N) case X#define LABEL_REF(X) X#define LABEL_REFN(X,N) X#define ENDDISPATCH#define fastref int#define INLINE#define STORE_REG_B 1#define STORE_REG_W 2#define STORE_INC_B 3#define STORE_INC_W 4#define STORE_DEC_B 5#define STORE_DEC_W 6#define STORE_DISP_B 7#define STORE_DISP_W 8#define STORE_CRB 9#define STORE_CRW 10#define STORE_REG_L 11#define STORE_NOP 12#define FETCH_NOP 9#define FETCH_REG_B 10#define FETCH_REG_W 11#define FETCH_INC_B 12#define FETCH_INC_W 13#define FETCH_DEC_B 14#define FETCH_DEC_W 15#define FETCH_DISP_B 16#define FETCH_DISP_W 17#define FETCH_IMM 18#define FETCH_CRB 19#define FETCH_CRW 20#define FETCH_LVAL 21#define FETCH_LVAL24 22#define FETCH_REG_L 23#define FLAG_m 20#define FLAG_M 21#define FLAG_A 22#define FLAG_NONE 23#define FLAG_NOSTORE 24#define FLAG_CLEAR 25#define FLAG_a 26#define FLAG_BRANCH 27#define FLAG_special 28#define FLAG_shiftword 29#define FLAG_shiftbyte 30#define FLAG_multword 31#define FLAG_multbyte 32#endif#define h8500_table h8500_compile_table#include "../opcodes/h8500-opc.h"#include "inst.h"#define LOW_BYTE(x) ((x) & 0xff)#define HIGH_BYTE(x) (((x)>>8) & 0xff)#define NORMAL_CP ((cpu.regs[R_CP].c - cpu.memory)>>16)#define NORMAL_DP ((cpu.regs[R_DP].c - cpu.memory)>>16)#define NORMAL_EP ((cpu.regs[R_EP].c - cpu.memory)>>16)#define NORMAL_TP ((cpu.regs[R_TP].c - cpu.memory)>>16)#define SET_NORMREG(x,y) ((cpu.regs[x].l = (y)))#define GET_NORMREG(x) (cpu.regs[x].l)#define SET_SEGREG(x,y) { cpu.regs[x].c = ((y) & 0xff0000) + cpu.memory;}#define GET_SEGREG(x) ( (cpu.regs[x].c - cpu.memory ) >> 16)#define SET_NORMAL_CPPC(x) { pc = (x) & 0xffff; SET_SEGREG(R_CP, (x));}#define NORMAL_SR ((N<<3)|(Z<<2)|(V<<1)|(C))#define P(X,Y) ((X<<8) | Y)#define BUILDSR() cpu.regs[R_SR].s[LOW] = (N << 3) | (Z << 2) | (V<<1) | C;#define GETSR() \ C = (cpu.regs[R_SR].s[LOW] >> 0) & 1;\ V = (cpu.regs[R_SR].s[LOW] >> 1) & 1;\ Z = (cpu.regs[R_SR].s[LOW] >> 2) & 1;\ N = (cpu.regs[R_SR].s[LOW] >> 3) & 1;#ifdef __CHAR_IS_SIGNED__#define SEXTCHAR(x) ((char)(x))#endif#ifndef SEXTCHAR#define SEXTCHAR(x) ((x & 0x80) ? (x | ~0xff):x)#endif#define SEXTSHORT(x) ((short)(x))/* Which segment registers go with which pointer registers */static unsigned char **segmap[R_LAST];static unsigned char *(regptr[R_LAST][3]);static unsigned char *(segregptr[R_LAST][3]);static cpu_state_type cpu;static int segforreg[] = {R_DP, R_DP, R_DP, R_DP, R_EP, R_EP, R_TP, R_TP, R_DP, R_DP, R_DP, R_DP, R_EP, R_EP, R_TP, R_TP};int LOW;int HIGH;/* routines for getting and storing args */#define elval(struct, lit) \ (((*(struct.reg.wptr) + lit) & 0xffff) + (*(struct.r2.segreg)))#define displval(s) elval((s),(s).literal)#define ireglval(struct) elval(struct, 0)#define wordat(x) (((x)[0] << 8) | (x)[1])#define longat(x) ((wordat((x))<<16)|(wordat((x)+2)))#define byteat(x) ((x)[0])#define setwordat(x,y) {x[0] =( y)>>8; x[1] = y;}#define setbyteat(x,y) {x[0] = y;}/*#define setalignedwordat(x,y) {((short *)x)[0] =y;}*//*statics*/ea_type rd;ea_type rs;ea_type imm;ea_type cr;ea_type ea;ea_type nop;ea_type lval;ea_type lval24;ea_type eavector[2];int disp;#define JBYTE 0#define JWORD 1#define JLONG 2typedef union{ struct { fastref srcabyte; fastref srcaword; fastref srcalong; fastref srcbbyte; fastref srcbword; fastref srcblong; fastref dstbyte; fastref dstword; fastref dstlong; } s; struct { fastref byte; fastref word; fastref lon; } a[3]; fastref j[9];} size_ptr;union{ struct ea_struct { size_ptr ea_nop; size_ptr ea_reg; size_ptr ea_inc; size_ptr ea_dec; size_ptr ea_disp; size_ptr ea_imm; size_ptr ea_cr; size_ptr ea_lval; size_ptr ea_lval24; } s;#define N_EATYPES (sizeof(struct ea_struct) / sizeof(size_ptr)) size_ptr a[N_EATYPES];} eas;/* This function takes an ea structure filled in for the 1st source operand and modifies it to be for either the 1st, 2nd or dst operand */static voidhowto_workout (encoded, semiencoded, n) ea_type *encoded; ea_type *semiencoded; int n;{ int i; *encoded = *semiencoded; for (i = 0; i < N_EATYPES; i++) { if (encoded->type == eas.a[i].s.srcabyte) { encoded->type = eas.a[i].a[n].byte; return; } else if (encoded->type == eas.a[i].s.srcaword) { encoded->type = eas.a[i].a[n].word; return; } else if (encoded->type == eas.a[i].s.srcalong) { encoded->type = eas.a[i].a[n].lon; return; } } abort ();}fastref flag_shiftword;fastref flag_shiftbyte;fastref flag_multword;fastref flag_multbyte;fastref flag_mp;fastref flag_special;fastref flag_Mp;fastref flag_ap;fastref flag_Ap;fastref flag_nonep;fastref flag_nostorep;fastref flag_clearp;fastref flag_branch;fastref exec_dispatch[100];static intget_now (){ return time (0);}static intnow_persec (){ return 1;}static voidgotcr (ptr, n) ea_type *ptr; int n;{ int size; n &= 0x7; if (n == 0) { abort (); } else { ptr->type = eas.s.ea_cr.j[JBYTE]; ptr->reg.bptr = segregptr[n][JLONG]; }}static voidgotreg (ptr, n, size) ea_type *ptr; int n; int size;{ n &= 0x7; ptr->type = eas.s.ea_reg.j[size]; ptr->reg.bptr = regptr[n][size];}static voidgotinc (ptr, n, inc, size) ea_type *ptr; int n; int size;{ n &= 0x7; if (inc > 0) { ptr->type = eas.s.ea_inc.j[size]; } else { ptr->type = eas.s.ea_dec.j[size]; } ptr->reg.bptr = regptr[n][JWORD]; ptr->r2.segreg = segmap[n];}static voidgotabs (ptr, disp, reg, size) ea_type *ptr; int disp; int reg; int size;{ ptr->type = eas.s.ea_disp.j[size]; ptr->reg.bptr = regptr[reg][JWORD]; ptr->r2.segreg = segmap[reg]; ptr->literal = disp;}static voidgotind (ptr, disp, reg, size) ea_type *ptr; int disp; int reg; int size;{ gotabs (ptr, disp, reg & 0x7, size);}static voidgotimm (ptr, val) ea_type *ptr; int val;{ ptr->type = eas.s.ea_imm.j[0]; ptr->literal = val;}static voidindoff (ptr) ea_type *ptr;{ int i; for (i = 0; i < 6; i++) { if (ptr->type == eas.s.ea_disp.j[i]) { ptr->type = eas.s.ea_lval.j[i]; return; } }}thinkabout_shifts (d, bytesized) decoded_inst *d; int bytesized;{ if (bytesized) { /* Got a byte shift, fake up second arg */ d->srcb.type = eas.s.ea_imm.s.srcbword; d->srcb.literal = 8; } else { /* got a word shift, fake up second arg */ d->srcb.type = eas.s.ea_imm.s.srcbword; d->srcb.literal = 16; }}/* Calculate the number of cycles required to run this instruction*/static voidcompcycles (dst, opcode) decoded_inst *dst; h8500_opcode_info *opcode;{ int cycles = 0; /* Guess for the time being - 1 cycle for the first two bytes in the opcode - to fecth the operand, and 3 cycles for all the rest of the bytes, since they mean that there is probably an operand to fetch */ switch (opcode->length) { case 1: case 2: cycles += opcode->length; break; default: cycles += opcode->length * 3; break; } dst->cycles = cycles;}static voidtranslate (ptr, from, to) ea_type *ptr; fastref from; fastref to;{ if (ptr->reg.wptr == &cpu.regs[7].s[LOW] && ptr->type == from) { ptr->type = to; }}staticvoidfix_incdecs (dst) decoded_inst *dst;{ if (dst->dst.type == eas.s.ea_inc.s.dstbyte && (dst->srca.type == eas.s.ea_inc.s.srcabyte || dst->srcb.type == eas.s.ea_inc.s.srcbbyte)) { dst->dst.type = eas.s.ea_disp.s.dstbyte; } if (dst->dst.type == eas.s.ea_inc.s.dstword && (dst->srca.type == eas.s.ea_inc.s.srcaword || dst->srcb.type == eas.s.ea_inc.s.srcbword)) { dst->dst.type = eas.s.ea_disp.s.dstword; } if (dst->dst.type == eas.s.ea_dec.s.dstbyte || dst->dst.type == eas.s.ea_dec.s.dstword) { if (dst->srca.type == eas.s.ea_dec.s.srcabyte) { dst->srca.type = eas.s.ea_disp.s.srcabyte; } else if (dst->srca.type == eas.s.ea_dec.s.srcaword) { dst->srca.type = eas.s.ea_disp.s.srcaword; } else if (dst->srcb.type == eas.s.ea_dec.s.srcbbyte) { dst->srcb.type = eas.s.ea_disp.s.srcbbyte; } else if (dst->srcb.type == eas.s.ea_dec.s.srcbword) { dst->srcb.type = eas.s.ea_disp.s.srcbword; } } /* Turn a byte ops from the sp into word ops */ translate (&dst->dst, eas.s.ea_dec.s.dstbyte, eas.s.ea_dec.s.dstword); translate (&dst->dst, eas.s.ea_inc.s.dstbyte, eas.s.ea_inc.s.dstword); translate (&dst->srca, eas.s.ea_dec.s.srcabyte, eas.s.ea_dec.s.srcaword); translate (&dst->srca, eas.s.ea_inc.s.srcabyte, eas.s.ea_inc.s.srcaword); translate (&dst->srcb, eas.s.ea_dec.s.srcbbyte, eas.s.ea_dec.s.srcbword); translate (&dst->srcb, eas.s.ea_inc.s.srcbbyte, eas.s.ea_inc.s.srcbword);}static voidfind (pc, buffer, dst) int pc; unsigned char *buffer; decoded_inst *dst;{ h8500_opcode_info *opcode; int i; int idx; int hadimm = 0; dst->srca.reg.rptr = 0; /* Run down the table to find the one which matches */ for (opcode = h8500_table; opcode->name; opcode++) { int byte; int rn; int rd; int rs; int disp; int abs; int imm; int pcrel; int qim; int i; int cr; dst->opcode = exec_dispatch[opcode->flavor & 0x7f]; for (byte = 0; byte < opcode->length; byte++) { if ((buffer[byte] & opcode->bytes[byte].mask) != (opcode->bytes[byte].contents)) { goto next; } else { /* extract any info parts */ switch (opcode->bytes[byte].insert) { case 0: case FP: break; default: abort (); break; case RN: rn = buffer[byte] & 0x7; break; case RS: rs = buffer[byte] & 0x7; break; case CRB: cr = buffer[byte] & 0x7; if (cr == 0) goto next; break; case CRW: cr = buffer[byte] & 0x7; if (cr != 0) goto next; break; case DISP16: disp = (buffer[byte] << 8) | (buffer[byte + 1]); break; case FPIND_D8: case DISP8: disp = ((char) (buffer[byte])); break; case RD: case RDIND: rd = buffer[byte] & 0x7; break; case ABS24: abs = (buffer[byte] << 16) | (buffer[byte + 1] << 8) | (buffer[byte + 2]); break; case ABS16: abs = (buffer[byte] << 8) | (buffer[byte + 1]); break; case ABS8: abs = (buffer[byte]); break; case IMM16: imm = (buffer[byte] << 8) | (buffer[byte + 1]); break; case IMM4: imm = (buffer[byte]) & 0xf; break; case IMM8: case RLIST: imm = SEXTCHAR (buffer[byte]); break;
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