📄 decode.c
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// OBSOLETE /* Simulator instruction decoder for fr30bf.// OBSOLETE // OBSOLETE THIS FILE IS MACHINE GENERATED WITH CGEN.// OBSOLETE // OBSOLETE Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.// OBSOLETE // OBSOLETE This file is part of the GNU simulators.// OBSOLETE // OBSOLETE This program is free software; you can redistribute it and/or modify// OBSOLETE it under the terms of the GNU General Public License as published by// OBSOLETE the Free Software Foundation; either version 2, or (at your option)// OBSOLETE any later version.// OBSOLETE // OBSOLETE This program is distributed in the hope that it will be useful,// OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of// OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the// OBSOLETE GNU General Public License for more details.// OBSOLETE // OBSOLETE You should have received a copy of the GNU General Public License along// OBSOLETE with this program; if not, write to the Free Software Foundation, Inc.,// OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.// OBSOLETE // OBSOLETE */// OBSOLETE // OBSOLETE #define WANT_CPU fr30bf// OBSOLETE #define WANT_CPU_FR30BF// OBSOLETE // OBSOLETE #include "sim-main.h"// OBSOLETE #include "sim-assert.h"// OBSOLETE // OBSOLETE /* The instruction descriptor array.// OBSOLETE This is computed at runtime. Space for it is not malloc'd to save a// OBSOLETE teensy bit of cpu in the decoder. Moving it to malloc space is trivial// OBSOLETE but won't be done until necessary (we don't currently support the runtime// OBSOLETE addition of instructions nor an SMP machine with different cpus). */// OBSOLETE static IDESC fr30bf_insn_data[FR30BF_INSN_XCHB + 1];// OBSOLETE // OBSOLETE /* Commas between elements are contained in the macros.// OBSOLETE Some of these are conditionally compiled out. */// OBSOLETE // OBSOLETE static const struct insn_sem fr30bf_insn_sem[] =// OBSOLETE {// OBSOLETE { VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY },// OBSOLETE { VIRTUAL_INSN_X_AFTER, FR30BF_INSN_X_AFTER, FR30BF_SFMT_EMPTY },// OBSOLETE { VIRTUAL_INSN_X_BEFORE, FR30BF_INSN_X_BEFORE, FR30BF_SFMT_EMPTY },// OBSOLETE { VIRTUAL_INSN_X_CTI_CHAIN, FR30BF_INSN_X_CTI_CHAIN, FR30BF_SFMT_EMPTY },// OBSOLETE { VIRTUAL_INSN_X_CHAIN, FR30BF_INSN_X_CHAIN, FR30BF_SFMT_EMPTY },// OBSOLETE { VIRTUAL_INSN_X_BEGIN, FR30BF_INSN_X_BEGIN, FR30BF_SFMT_EMPTY },// OBSOLETE { FR30_INSN_ADD, FR30BF_INSN_ADD, FR30BF_SFMT_ADD },// OBSOLETE { FR30_INSN_ADDI, FR30BF_INSN_ADDI, FR30BF_SFMT_ADDI },// OBSOLETE { FR30_INSN_ADD2, FR30BF_INSN_ADD2, FR30BF_SFMT_ADD2 },// OBSOLETE { FR30_INSN_ADDC, FR30BF_INSN_ADDC, FR30BF_SFMT_ADDC },// OBSOLETE { FR30_INSN_ADDN, FR30BF_INSN_ADDN, FR30BF_SFMT_ADDN },// OBSOLETE { FR30_INSN_ADDNI, FR30BF_INSN_ADDNI, FR30BF_SFMT_ADDNI },// OBSOLETE { FR30_INSN_ADDN2, FR30BF_INSN_ADDN2, FR30BF_SFMT_ADDN2 },// OBSOLETE { FR30_INSN_SUB, FR30BF_INSN_SUB, FR30BF_SFMT_ADD },// OBSOLETE { FR30_INSN_SUBC, FR30BF_INSN_SUBC, FR30BF_SFMT_ADDC },// OBSOLETE { FR30_INSN_SUBN, FR30BF_INSN_SUBN, FR30BF_SFMT_ADDN },// OBSOLETE { FR30_INSN_CMP, FR30BF_INSN_CMP, FR30BF_SFMT_CMP },// OBSOLETE { FR30_INSN_CMPI, FR30BF_INSN_CMPI, FR30BF_SFMT_CMPI },// OBSOLETE { FR30_INSN_CMP2, FR30BF_INSN_CMP2, FR30BF_SFMT_CMP2 },// OBSOLETE { FR30_INSN_AND, FR30BF_INSN_AND, FR30BF_SFMT_AND },// OBSOLETE { FR30_INSN_OR, FR30BF_INSN_OR, FR30BF_SFMT_AND },// OBSOLETE { FR30_INSN_EOR, FR30BF_INSN_EOR, FR30BF_SFMT_AND },// OBSOLETE { FR30_INSN_ANDM, FR30BF_INSN_ANDM, FR30BF_SFMT_ANDM },// OBSOLETE { FR30_INSN_ANDH, FR30BF_INSN_ANDH, FR30BF_SFMT_ANDH },// OBSOLETE { FR30_INSN_ANDB, FR30BF_INSN_ANDB, FR30BF_SFMT_ANDB },// OBSOLETE { FR30_INSN_ORM, FR30BF_INSN_ORM, FR30BF_SFMT_ANDM },// OBSOLETE { FR30_INSN_ORH, FR30BF_INSN_ORH, FR30BF_SFMT_ANDH },// OBSOLETE { FR30_INSN_ORB, FR30BF_INSN_ORB, FR30BF_SFMT_ANDB },// OBSOLETE { FR30_INSN_EORM, FR30BF_INSN_EORM, FR30BF_SFMT_ANDM },// OBSOLETE { FR30_INSN_EORH, FR30BF_INSN_EORH, FR30BF_SFMT_ANDH },// OBSOLETE { FR30_INSN_EORB, FR30BF_INSN_EORB, FR30BF_SFMT_ANDB },// OBSOLETE { FR30_INSN_BANDL, FR30BF_INSN_BANDL, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BORL, FR30BF_INSN_BORL, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BEORL, FR30BF_INSN_BEORL, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BANDH, FR30BF_INSN_BANDH, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BORH, FR30BF_INSN_BORH, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BEORH, FR30BF_INSN_BEORH, FR30BF_SFMT_BANDL },// OBSOLETE { FR30_INSN_BTSTL, FR30BF_INSN_BTSTL, FR30BF_SFMT_BTSTL },// OBSOLETE { FR30_INSN_BTSTH, FR30BF_INSN_BTSTH, FR30BF_SFMT_BTSTL },// OBSOLETE { FR30_INSN_MUL, FR30BF_INSN_MUL, FR30BF_SFMT_MUL },// OBSOLETE { FR30_INSN_MULU, FR30BF_INSN_MULU, FR30BF_SFMT_MULU },// OBSOLETE { FR30_INSN_MULH, FR30BF_INSN_MULH, FR30BF_SFMT_MULH },// OBSOLETE { FR30_INSN_MULUH, FR30BF_INSN_MULUH, FR30BF_SFMT_MULH },// OBSOLETE { FR30_INSN_DIV0S, FR30BF_INSN_DIV0S, FR30BF_SFMT_DIV0S },// OBSOLETE { FR30_INSN_DIV0U, FR30BF_INSN_DIV0U, FR30BF_SFMT_DIV0U },// OBSOLETE { FR30_INSN_DIV1, FR30BF_INSN_DIV1, FR30BF_SFMT_DIV1 },// OBSOLETE { FR30_INSN_DIV2, FR30BF_INSN_DIV2, FR30BF_SFMT_DIV2 },// OBSOLETE { FR30_INSN_DIV3, FR30BF_INSN_DIV3, FR30BF_SFMT_DIV3 },// OBSOLETE { FR30_INSN_DIV4S, FR30BF_INSN_DIV4S, FR30BF_SFMT_DIV4S },// OBSOLETE { FR30_INSN_LSL, FR30BF_INSN_LSL, FR30BF_SFMT_LSL },// OBSOLETE { FR30_INSN_LSLI, FR30BF_INSN_LSLI, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_LSL2, FR30BF_INSN_LSL2, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_LSR, FR30BF_INSN_LSR, FR30BF_SFMT_LSL },// OBSOLETE { FR30_INSN_LSRI, FR30BF_INSN_LSRI, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_LSR2, FR30BF_INSN_LSR2, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_ASR, FR30BF_INSN_ASR, FR30BF_SFMT_LSL },// OBSOLETE { FR30_INSN_ASRI, FR30BF_INSN_ASRI, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_ASR2, FR30BF_INSN_ASR2, FR30BF_SFMT_LSLI },// OBSOLETE { FR30_INSN_LDI8, FR30BF_INSN_LDI8, FR30BF_SFMT_LDI8 },// OBSOLETE { FR30_INSN_LDI20, FR30BF_INSN_LDI20, FR30BF_SFMT_LDI20 },// OBSOLETE { FR30_INSN_LDI32, FR30BF_INSN_LDI32, FR30BF_SFMT_LDI32 },// OBSOLETE { FR30_INSN_LD, FR30BF_INSN_LD, FR30BF_SFMT_LD },// OBSOLETE { FR30_INSN_LDUH, FR30BF_INSN_LDUH, FR30BF_SFMT_LDUH },// OBSOLETE { FR30_INSN_LDUB, FR30BF_INSN_LDUB, FR30BF_SFMT_LDUB },// OBSOLETE { FR30_INSN_LDR13, FR30BF_INSN_LDR13, FR30BF_SFMT_LDR13 },// OBSOLETE { FR30_INSN_LDR13UH, FR30BF_INSN_LDR13UH, FR30BF_SFMT_LDR13UH },// OBSOLETE { FR30_INSN_LDR13UB, FR30BF_INSN_LDR13UB, FR30BF_SFMT_LDR13UB },// OBSOLETE { FR30_INSN_LDR14, FR30BF_INSN_LDR14, FR30BF_SFMT_LDR14 },// OBSOLETE { FR30_INSN_LDR14UH, FR30BF_INSN_LDR14UH, FR30BF_SFMT_LDR14UH },// OBSOLETE { FR30_INSN_LDR14UB, FR30BF_INSN_LDR14UB, FR30BF_SFMT_LDR14UB },// OBSOLETE { FR30_INSN_LDR15, FR30BF_INSN_LDR15, FR30BF_SFMT_LDR15 },// OBSOLETE { FR30_INSN_LDR15GR, FR30BF_INSN_LDR15GR, FR30BF_SFMT_LDR15GR },// OBSOLETE { FR30_INSN_LDR15DR, FR30BF_INSN_LDR15DR, FR30BF_SFMT_LDR15DR },// OBSOLETE { FR30_INSN_LDR15PS, FR30BF_INSN_LDR15PS, FR30BF_SFMT_LDR15PS },// OBSOLETE { FR30_INSN_ST, FR30BF_INSN_ST, FR30BF_SFMT_ST },// OBSOLETE { FR30_INSN_STH, FR30BF_INSN_STH, FR30BF_SFMT_STH },// OBSOLETE { FR30_INSN_STB, FR30BF_INSN_STB, FR30BF_SFMT_STB },// OBSOLETE { FR30_INSN_STR13, FR30BF_INSN_STR13, FR30BF_SFMT_STR13 },// OBSOLETE { FR30_INSN_STR13H, FR30BF_INSN_STR13H, FR30BF_SFMT_STR13H },// OBSOLETE { FR30_INSN_STR13B, FR30BF_INSN_STR13B, FR30BF_SFMT_STR13B },// OBSOLETE { FR30_INSN_STR14, FR30BF_INSN_STR14, FR30BF_SFMT_STR14 },// OBSOLETE { FR30_INSN_STR14H, FR30BF_INSN_STR14H, FR30BF_SFMT_STR14H },// OBSOLETE { FR30_INSN_STR14B, FR30BF_INSN_STR14B, FR30BF_SFMT_STR14B },// OBSOLETE { FR30_INSN_STR15, FR30BF_INSN_STR15, FR30BF_SFMT_STR15 },// OBSOLETE { FR30_INSN_STR15GR, FR30BF_INSN_STR15GR, FR30BF_SFMT_STR15GR },// OBSOLETE { FR30_INSN_STR15DR, FR30BF_INSN_STR15DR, FR30BF_SFMT_STR15DR },// OBSOLETE { FR30_INSN_STR15PS, FR30BF_INSN_STR15PS, FR30BF_SFMT_STR15PS },// OBSOLETE { FR30_INSN_MOV, FR30BF_INSN_MOV, FR30BF_SFMT_MOV },// OBSOLETE { FR30_INSN_MOVDR, FR30BF_INSN_MOVDR, FR30BF_SFMT_MOVDR },// OBSOLETE { FR30_INSN_MOVPS, FR30BF_INSN_MOVPS, FR30BF_SFMT_MOVPS },// OBSOLETE { FR30_INSN_MOV2DR, FR30BF_INSN_MOV2DR, FR30BF_SFMT_MOV2DR },// OBSOLETE { FR30_INSN_MOV2PS, FR30BF_INSN_MOV2PS, FR30BF_SFMT_MOV2PS },// OBSOLETE { FR30_INSN_JMP, FR30BF_INSN_JMP, FR30BF_SFMT_JMP },// OBSOLETE { FR30_INSN_JMPD, FR30BF_INSN_JMPD, FR30BF_SFMT_JMP },// OBSOLETE { FR30_INSN_CALLR, FR30BF_INSN_CALLR, FR30BF_SFMT_CALLR },// OBSOLETE { FR30_INSN_CALLRD, FR30BF_INSN_CALLRD, FR30BF_SFMT_CALLR },// OBSOLETE { FR30_INSN_CALL, FR30BF_INSN_CALL, FR30BF_SFMT_CALL },// OBSOLETE { FR30_INSN_CALLD, FR30BF_INSN_CALLD, FR30BF_SFMT_CALL },// OBSOLETE { FR30_INSN_RET, FR30BF_INSN_RET, FR30BF_SFMT_RET },// OBSOLETE { FR30_INSN_RET_D, FR30BF_INSN_RET_D, FR30BF_SFMT_RET },// OBSOLETE { FR30_INSN_INT, FR30BF_INSN_INT, FR30BF_SFMT_INT },// OBSOLETE { FR30_INSN_INTE, FR30BF_INSN_INTE, FR30BF_SFMT_INTE },// OBSOLETE { FR30_INSN_RETI, FR30BF_INSN_RETI, FR30BF_SFMT_RETI },// OBSOLETE { FR30_INSN_BRAD, FR30BF_INSN_BRAD, FR30BF_SFMT_BRAD },// OBSOLETE { FR30_INSN_BRA, FR30BF_INSN_BRA, FR30BF_SFMT_BRAD },// OBSOLETE { FR30_INSN_BNOD, FR30BF_INSN_BNOD, FR30BF_SFMT_BNOD },// OBSOLETE { FR30_INSN_BNO, FR30BF_INSN_BNO, FR30BF_SFMT_BNOD },// OBSOLETE { FR30_INSN_BEQD, FR30BF_INSN_BEQD, FR30BF_SFMT_BEQD },// OBSOLETE { FR30_INSN_BEQ, FR30BF_INSN_BEQ, FR30BF_SFMT_BEQD },// OBSOLETE { FR30_INSN_BNED, FR30BF_INSN_BNED, FR30BF_SFMT_BEQD },// OBSOLETE { FR30_INSN_BNE, FR30BF_INSN_BNE, FR30BF_SFMT_BEQD },// OBSOLETE { FR30_INSN_BCD, FR30BF_INSN_BCD, FR30BF_SFMT_BCD },// OBSOLETE { FR30_INSN_BC, FR30BF_INSN_BC, FR30BF_SFMT_BCD },// OBSOLETE { FR30_INSN_BNCD, FR30BF_INSN_BNCD, FR30BF_SFMT_BCD },// OBSOLETE { FR30_INSN_BNC, FR30BF_INSN_BNC, FR30BF_SFMT_BCD },// OBSOLETE { FR30_INSN_BND, FR30BF_INSN_BND, FR30BF_SFMT_BND },// OBSOLETE { FR30_INSN_BN, FR30BF_INSN_BN, FR30BF_SFMT_BND },// OBSOLETE { FR30_INSN_BPD, FR30BF_INSN_BPD, FR30BF_SFMT_BND },// OBSOLETE { FR30_INSN_BP, FR30BF_INSN_BP, FR30BF_SFMT_BND },// OBSOLETE { FR30_INSN_BVD, FR30BF_INSN_BVD, FR30BF_SFMT_BVD },// OBSOLETE { FR30_INSN_BV, FR30BF_INSN_BV, FR30BF_SFMT_BVD },// OBSOLETE { FR30_INSN_BNVD, FR30BF_INSN_BNVD, FR30BF_SFMT_BVD },// OBSOLETE { FR30_INSN_BNV, FR30BF_INSN_BNV, FR30BF_SFMT_BVD },// OBSOLETE { FR30_INSN_BLTD, FR30BF_INSN_BLTD, FR30BF_SFMT_BLTD },// OBSOLETE { FR30_INSN_BLT, FR30BF_INSN_BLT, FR30BF_SFMT_BLTD },// OBSOLETE { FR30_INSN_BGED, FR30BF_INSN_BGED, FR30BF_SFMT_BLTD },// OBSOLETE { FR30_INSN_BGE, FR30BF_INSN_BGE, FR30BF_SFMT_BLTD },// OBSOLETE { FR30_INSN_BLED, FR30BF_INSN_BLED, FR30BF_SFMT_BLED },// OBSOLETE { FR30_INSN_BLE, FR30BF_INSN_BLE, FR30BF_SFMT_BLED },// OBSOLETE { FR30_INSN_BGTD, FR30BF_INSN_BGTD, FR30BF_SFMT_BLED },// OBSOLETE { FR30_INSN_BGT, FR30BF_INSN_BGT, FR30BF_SFMT_BLED },// OBSOLETE { FR30_INSN_BLSD, FR30BF_INSN_BLSD, FR30BF_SFMT_BLSD },// OBSOLETE { FR30_INSN_BLS, FR30BF_INSN_BLS, FR30BF_SFMT_BLSD },// OBSOLETE { FR30_INSN_BHID, FR30BF_INSN_BHID, FR30BF_SFMT_BLSD },// OBSOLETE { FR30_INSN_BHI, FR30BF_INSN_BHI, FR30BF_SFMT_BLSD },// OBSOLETE { FR30_INSN_DMOVR13, FR30BF_INSN_DMOVR13, FR30BF_SFMT_DMOVR13 },// OBSOLETE { FR30_INSN_DMOVR13H, FR30BF_INSN_DMOVR13H, FR30BF_SFMT_DMOVR13H },// OBSOLETE { FR30_INSN_DMOVR13B, FR30BF_INSN_DMOVR13B, FR30BF_SFMT_DMOVR13B },// OBSOLETE { FR30_INSN_DMOVR13PI, FR30BF_INSN_DMOVR13PI, FR30BF_SFMT_DMOVR13PI },// OBSOLETE { FR30_INSN_DMOVR13PIH, FR30BF_INSN_DMOVR13PIH, FR30BF_SFMT_DMOVR13PIH },// OBSOLETE { FR30_INSN_DMOVR13PIB, FR30BF_INSN_DMOVR13PIB, FR30BF_SFMT_DMOVR13PIB },// OBSOLETE { FR30_INSN_DMOVR15PI, FR30BF_INSN_DMOVR15PI, FR30BF_SFMT_DMOVR15PI },// OBSOLETE { FR30_INSN_DMOV2R13, FR30BF_INSN_DMOV2R13, FR30BF_SFMT_DMOV2R13 },// OBSOLETE { FR30_INSN_DMOV2R13H, FR30BF_INSN_DMOV2R13H, FR30BF_SFMT_DMOV2R13H },// OBSOLETE { FR30_INSN_DMOV2R13B, FR30BF_INSN_DMOV2R13B, FR30BF_SFMT_DMOV2R13B },// OBSOLETE { FR30_INSN_DMOV2R13PI, FR30BF_INSN_DMOV2R13PI, FR30BF_SFMT_DMOV2R13PI },// OBSOLETE { FR30_INSN_DMOV2R13PIH, FR30BF_INSN_DMOV2R13PIH, FR30BF_SFMT_DMOV2R13PIH },// OBSOLETE { FR30_INSN_DMOV2R13PIB, FR30BF_INSN_DMOV2R13PIB, FR30BF_SFMT_DMOV2R13PIB },// OBSOLETE { FR30_INSN_DMOV2R15PD, FR30BF_INSN_DMOV2R15PD, FR30BF_SFMT_DMOV2R15PD },// OBSOLETE { FR30_INSN_LDRES, FR30BF_INSN_LDRES, FR30BF_SFMT_LDRES },// OBSOLETE { FR30_INSN_STRES, FR30BF_INSN_STRES, FR30BF_SFMT_LDRES },// OBSOLETE { FR30_INSN_COPOP, FR30BF_INSN_COPOP, FR30BF_SFMT_COPOP },// OBSOLETE { FR30_INSN_COPLD, FR30BF_INSN_COPLD, FR30BF_SFMT_COPOP },// OBSOLETE { FR30_INSN_COPST, FR30BF_INSN_COPST, FR30BF_SFMT_COPOP },// OBSOLETE { FR30_INSN_COPSV, FR30BF_INSN_COPSV, FR30BF_SFMT_COPOP },// OBSOLETE { FR30_INSN_NOP, FR30BF_INSN_NOP, FR30BF_SFMT_BNOD },// OBSOLETE { FR30_INSN_ANDCCR, FR30BF_INSN_ANDCCR, FR30BF_SFMT_ANDCCR },// OBSOLETE { FR30_INSN_ORCCR, FR30BF_INSN_ORCCR, FR30BF_SFMT_ANDCCR },// OBSOLETE { FR30_INSN_STILM, FR30BF_INSN_STILM, FR30BF_SFMT_STILM },// OBSOLETE { FR30_INSN_ADDSP, FR30BF_INSN_ADDSP, FR30BF_SFMT_ADDSP },// OBSOLETE { FR30_INSN_EXTSB, FR30BF_INSN_EXTSB, FR30BF_SFMT_EXTSB },// OBSOLETE { FR30_INSN_EXTUB, FR30BF_INSN_EXTUB, FR30BF_SFMT_EXTUB },// OBSOLETE { FR30_INSN_EXTSH, FR30BF_INSN_EXTSH, FR30BF_SFMT_EXTSH },// OBSOLETE { FR30_INSN_EXTUH, FR30BF_INSN_EXTUH, FR30BF_SFMT_EXTUH },// OBSOLETE { FR30_INSN_LDM0, FR30BF_INSN_LDM0, FR30BF_SFMT_LDM0 },// OBSOLETE { FR30_INSN_LDM1, FR30BF_INSN_LDM1, FR30BF_SFMT_LDM1 },// OBSOLETE { FR30_INSN_STM0, FR30BF_INSN_STM0, FR30BF_SFMT_STM0 },// OBSOLETE { FR30_INSN_STM1, FR30BF_INSN_STM1, FR30BF_SFMT_STM1 },// OBSOLETE { FR30_INSN_ENTER, FR30BF_INSN_ENTER, FR30BF_SFMT_ENTER },// OBSOLETE { FR30_INSN_LEAVE, FR30BF_INSN_LEAVE, FR30BF_SFMT_LEAVE },// OBSOLETE { FR30_INSN_XCHB, FR30BF_INSN_XCHB, FR30BF_SFMT_XCHB },// OBSOLETE };// OBSOLETE // OBSOLETE static const struct insn_sem fr30bf_insn_sem_invalid = {// OBSOLETE VIRTUAL_INSN_X_INVALID, FR30BF_INSN_X_INVALID, FR30BF_SFMT_EMPTY// OBSOLETE };// OBSOLETE // OBSOLETE /* Initialize an IDESC from the compile-time computable parts. */// OBSOLETE // OBSOLETE static INLINE void// OBSOLETE init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t)// OBSOLETE {// OBSOLETE const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries;// OBSOLETE // OBSOLETE id->num = t->index;// OBSOLETE id->sfmt = t->sfmt;// OBSOLETE if ((int) t->type <= 0)// OBSOLETE id->idata = & cgen_virtual_insn_table[- (int) t->type];// OBSOLETE else// OBSOLETE id->idata = & insn_table[t->type];// OBSOLETE id->attrs = CGEN_INSN_ATTRS (id->idata);// OBSOLETE /* Oh my god, a magic number. */// OBSOLETE id->length = CGEN_INSN_BITSIZE (id->idata) / 8;// OBSOLETE // OBSOLETE #if WITH_PROFILE_MODEL_P// OBSOLETE id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index];// OBSOLETE {// OBSOLETE SIM_DESC sd = CPU_STATE (cpu);// OBSOLETE SIM_ASSERT (t->index == id->timing->num);// OBSOLETE }// OBSOLETE #endif// OBSOLETE // OBSOLETE /* Semantic pointers are initialized elsewhere. */// OBSOLETE }// OBSOLETE // OBSOLETE /* Initialize the instruction descriptor table. */// OBSOLETE // OBSOLETE void// OBSOLETE fr30bf_init_idesc_table (SIM_CPU *cpu)// OBSOLETE {// OBSOLETE IDESC *id,*tabend;// OBSOLETE const struct insn_sem *t,*tend;// OBSOLETE int tabsize = sizeof (fr30bf_insn_data) / sizeof (IDESC);// OBSOLETE IDESC *table = fr30bf_insn_data;// OBSOLETE // OBSOLETE memset (table, 0, tabsize * sizeof (IDESC));// OBSOLETE // OBSOLETE /* First set all entries to the `invalid insn'. */// OBSOLETE t = & fr30bf_insn_sem_invalid;// OBSOLETE for (id = table, tabend = table + tabsize; id < tabend; ++id)// OBSOLETE init_idesc (cpu, id, t);// OBSOLETE // OBSOLETE /* Now fill in the values for the chosen cpu. */// OBSOLETE for (t = fr30bf_insn_sem, tend = t + sizeof (fr30bf_insn_sem) / sizeof (*t);// OBSOLETE t != tend; ++t)
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