📄 tic4x.h
字号:
/* T2: General 3-operand integer operation with 2 args Syntax: <i> src2, src1 src2 = Register (E), Indirect 0,1,IR0,IR1 (I), C4x T2: Indirect (C), Immediate (W) src1 = Register (G), Indirect 0,1,IR0,IR1 (J), C4x T2: Indirect (O) Instr: 1/0 - CMPI3 Alias: i, i3*/#define T2_CLASS_INSN(name, opcode, level) \ { name, opcode|0x20000000, 0xffe00000, "E,G", level }, \ { name, opcode|0x20200000, 0xffe00000, "E,J", level }, \ { name, opcode|0x20400000, 0xffe00000, "I,G", level }, \ { name, opcode|0x20600000, 0xffe00000, "I,J", level }, \ { name, opcode|0x30000000, 0xffe00000, "W,G", OP_C4X }, \ { name, opcode|0x30200000, 0xffe00000, "C,G", OP_C4X }, \ { name, opcode|0x30400000, 0xffe00000, "W,O", OP_C4X }, \ { name, opcode|0x30600000, 0xffe00000, "C,O", OP_C4X }, \ { name "3", opcode|0x20000000, 0xffe00000, "E,G", level }, \ { name "3", opcode|0x20200000, 0xffe00000, "E,J", level }, \ { name "3", opcode|0x20400000, 0xffe00000, "I,G", level }, \ { name "3", opcode|0x20600000, 0xffe00000, "I,J", level }, \ { name "3", opcode|0x30000000, 0xffe00000, "W,G", OP_C4X }, \ { name "3", opcode|0x30200000, 0xffe00000, "C,G", OP_C4X }, \ { name "3", opcode|0x30400000, 0xffe00000, "W,O", OP_C4X }, \ { name "3", opcode|0x30600000, 0xffe00000, "C,O", OP_C4X }/* T2C: General commutative 3-operand integer operation with 2 args Syntax: <i> src2, src1 - Manual <i> src1, src2 src2 = Register (E), Indirect 0,1,IR0,IR1 (I), C4x T2: Indirect (C), Immediate (W) src1 = Register (G), Indirect 0,1,IR0,IR1 (J), C4x T2: Indirect (0) Instr: 1/0 - TSTB3 Alias: i, i3*/#define T2C_CLASS_INSN(name, opcode, level) \ { name, opcode|0x20000000, 0xffe00000, "E,G", level }, \ { name, opcode|0x20200000, 0xffe00000, "E,J", level }, \ { name, opcode|0x20400000, 0xffe00000, "I,G", level }, \ { name, opcode|0x20600000, 0xffe00000, "I,J", level }, \ { name, opcode|0x30000000, 0xffe00000, "W,G", OP_C4X }, \ { name, opcode|0x30000000, 0xffe00000, "G,W", OP_C4X }, \ { name, opcode|0x30200000, 0xffe00000, "C,G", OP_C4X }, \ { name, opcode|0x30200000, 0xffe00000, "G,C", OP_C4X }, \ { name, opcode|0x30400000, 0xffe00000, "W,O", OP_C4X }, \ { name, opcode|0x30400000, 0xffe00000, "O,W", OP_C4X }, \ { name, opcode|0x30600000, 0xffe00000, "C,O", OP_C4X }, \ { name "3", opcode|0x20000000, 0xffe00000, "E,G", level }, \ { name "3", opcode|0x20200000, 0xffe00000, "E,J", level }, \ { name "3", opcode|0x20400000, 0xffe00000, "I,G", level }, \ { name "3", opcode|0x20600000, 0xffe00000, "I,J", level }, \ { name "3", opcode|0x30000000, 0xffe00000, "W,G", OP_C4X }, \ { name "3", opcode|0x30000000, 0xffe00000, "G,W", OP_C4X }, \ { name "3", opcode|0x30200000, 0xffe00000, "C,G", OP_C4X }, \ { name "3", opcode|0x30200000, 0xffe00000, "G,C", OP_C4X }, \ { name "3", opcode|0x30400000, 0xffe00000, "W,O", OP_C4X }, \ { name "3", opcode|0x30400000, 0xffe00000, "O,W", OP_C4X }, \ { name "3", opcode|0x30600000, 0xffe00000, "C,O", OP_C4X }/* Z: Misc operations with or without arguments Syntax: <i> <arg1>,... Instr: 16 - RETIc, RETSc, SIGI(c3X), SWI, IDLE, IDLE2, RETIcD, TRAPc, LATc, LDEP, LDEHI, LDEPE, LDPK, STIK, LDP, IACK*//* Define tic4x opcodes for assembler and disassembler. */static const tic4x_inst_t tic4x_insts[] ={ /* Put synonyms after the desired forms in table so that they get overwritten in the lookup table. The disassembler will thus print the `proper' mnemonics. Note that the disassembler only decodes the 11 MSBs, so instructions like ldp @0x500 will be printed as ldiu 5, dp. Note that with parallel instructions, the second part is executed before the first part, unless the sti1||sti2 form is used. We also allow sti2||sti1 which is equivalent to the default sti||sti form. */ B_CLASS_INSN( "absf", 0x00000000, OP_C3X ), P_CLASS_INSN( "absf", "stf", 0xc8000000, OP_C3X ), A_CLASS_INSN( "absi", 0x00800000, OP_C3X ), P_CLASS_INSN( "absi", "sti", 0xca000000, OP_C3X ), A_CLASS_INSN( "addc", 0x01000000, OP_C3X ), TC_CLASS_INSN( "addc", 0x00000000, OP_C3X ), B_CLASS_INSN( "addf", 0x01800000, OP_C3X ), SC_CLASS_INSN( "addf", 0x00800000, OP_C3X ), QC_CLASS_INSN( "addf", "stf", 0xcc000000, OP_C3X ), A_CLASS_INSN( "addi", 0x02000000, OP_C3X ), TC_CLASS_INSN( "addi", 0x01000000, OP_C3X ), QC_CLASS_INSN( "addi", "sti", 0xce000000, OP_C3X ), AU_CLASS_INSN( "and", 0x02800000, OP_C3X ), TC_CLASS_INSN( "and", 0x01800000, OP_C3X ), QC_CLASS_INSN( "and", "sti", 0xd0000000, OP_C3X ), AU_CLASS_INSN( "andn", 0x03000000, OP_C3X ), T_CLASS_INSN( "andn", 0x02000000, OP_C3X ), A_CLASS_INSN( "ash", 0x03800000, OP_C3X ), T_CLASS_INSN( "ash", 0x02800000, OP_C3X ), Q_CLASS_INSN( "ash", "sti", 0xd2000000, OP_C3X ), J_CLASS_INSN( "bB", "b", 0x68000000, OP_C3X ), J_CLASS_INSN( "bBd", "bd", 0x68200000, OP_C3X ), J_CLASS_INSN( "bBaf", "baf", 0x68a00000, OP_C4X ), J_CLASS_INSN( "bBat", "bat", 0x68600000, OP_C4X ), { "br", 0x60000000, 0xff000000, "B" , OP_C3X }, /* I_CLASS */ { "brd", 0x61000000, 0xff000000, "B" , OP_C3X }, /* I_CLASS */ { "call", 0x62000000, 0xff000000, "B" , OP_C3X }, /* I_CLASS */ { "callB", 0x70000000, 0xffe00000, "Q" , OP_C3X }, /* JS_CLASS */ { "callB", 0x72000000, 0xffe00000, "P" , OP_C3X }, /* JS_CLASS */ B_CLASS_INSN( "cmpf", 0x04000000, OP_C3X ), S2_CLASS_INSN( "cmpf", 0x03000000, OP_C3X ), A_CLASS_INSN( "cmpi", 0x04800000, OP_C3X ), T2_CLASS_INSN( "cmpi", 0x03800000, OP_C3X ), D_CLASS_INSN( "dbB", "db", 0x6c000000, OP_C3X ), D_CLASS_INSN( "dbBd", "dbd", 0x6c200000, OP_C3X ), AF_CLASS_INSN( "fix", 0x05000000, OP_C3X ), P_CLASS_INSN( "fix", "sti", 0xd4000000, OP_C3X ), BI_CLASS_INSN( "float", 0x05800000, OP_C3X ), P_CLASS_INSN( "float", "stf", 0xd6000000, OP_C3X ), B6_CLASS_INSN( "frieee", 0x1c000000, OP_C4X ), P_CLASS_INSN( "frieee","stf", 0xf2000000, OP_C4X ), { "iack", 0x1b200000, 0xffe00000, "@" , OP_C3X }, /* Z_CLASS */ { "iack", 0x1b400000, 0xffe00000, "*" , OP_C3X }, /* Z_CLASS */ { "idle", 0x06000000, 0xffffffff, "" , OP_C3X }, /* Z_CLASS */ { "idlez", 0x06000000, 0xffffffff, "" , OP_C3X }, /* Z_CLASS */ { "idle2", 0x06000001, 0xffffffff, "" , OP_IDLE2 }, /* Z_CLASS */ { "laj", 0x63000000, 0xff000000, "B" , OP_C4X }, /* I_CLASS */ { "lajB", 0x70200000, 0xffe00000, "Q" , OP_C4X }, /* JS_CLASS */ { "lajB", 0x72200000, 0xffe00000, "P" , OP_C4X }, /* JS_CLASS */ { "latB", 0x74800000, 0xffe00000, "V" , OP_C4X }, /* Z_CLASS */ A_CLASS_INSN( "lb0", 0xb0000000, OP_C4X ), A_CLASS_INSN( "lb1", 0xb0800000, OP_C4X ), A_CLASS_INSN( "lb2", 0xb1000000, OP_C4X ), A_CLASS_INSN( "lb3", 0xb1800000, OP_C4X ), AU_CLASS_INSN( "lbu0", 0xb2000000, OP_C4X ), AU_CLASS_INSN( "lbu1", 0xb2800000, OP_C4X ), AU_CLASS_INSN( "lbu2", 0xb3000000, OP_C4X ), AU_CLASS_INSN( "lbu3", 0xb3800000, OP_C4X ), AY_CLASS_INSN( "lda", 0x1e800000, OP_C4X ), B_CLASS_INSN( "lde", 0x06800000, OP_C3X ), { "ldep", 0x76000000, 0xffe00000, "X,R" , OP_C4X }, /* Z_CLASS */ B_CLASS_INSN( "ldf", 0x07000000, OP_C3X ), LL_CLASS_INSN( "ldf", 0xc4000000, OP_C3X ), P_CLASS_INSN( "ldf", "stf", 0xd8000000, OP_C3X ), BB_CLASS_INSN( "ldfC", 0x00000000, OP_C3X ), B6_CLASS_INSN( "ldfi", 0x07800000, OP_C3X ), { "ldhi", 0x1fe00000, 0xffe00000, "U,R" , OP_C4X }, /* Z_CLASS */ { "ldhi", 0x1fe00000, 0xffe00000, "#,R" , OP_C4X }, /* Z_CLASS */ A_CLASS_INSN( "ldi", 0x08000000, OP_C3X ), LL_CLASS_INSN( "ldi", 0xc6000000, OP_C3X ), P_CLASS_INSN( "ldi", "sti", 0xda000000, OP_C3X ), AB_CLASS_INSN( "ldiC", 0x10000000, OP_C3X ), A6_CLASS_INSN( "ldii", 0x08800000, OP_C3X ), { "ldp", 0x50700000, 0xffff0000, "#" , OP_C3X }, /* Z_CLASS - synonym for ldiu #,dp */ B_CLASS_INSN( "ldm", 0x09000000, OP_C3X ), { "ldpe", 0x76800000, 0xffe00000, "Q,Z" , OP_C4X }, /* Z_CLASS */ { "ldpk", 0x1F700000, 0xffff0000, "#" , OP_C4X }, /* Z_CLASS */ A_CLASS_INSN( "lh0", 0xba000000, OP_C4X ), A_CLASS_INSN( "lh1", 0xba800000, OP_C4X ), AU_CLASS_INSN( "lhu0", 0xbb000000, OP_C4X ), AU_CLASS_INSN( "lhu1", 0xbb800000, OP_C4X ), { "lopower", 0x10800001,0xffffffff, "" , OP_LPWR }, /* Z_CLASS */ A_CLASS_INSN( "lsh", 0x09800000, OP_C3X ), T_CLASS_INSN( "lsh", 0x04000000, OP_C3X ), Q_CLASS_INSN( "lsh", "sti", 0xdc000000, OP_C3X ), A_CLASS_INSN( "lwl0", 0xb4000000, OP_C4X ), A_CLASS_INSN( "lwl1", 0xb4800000, OP_C4X ), A_CLASS_INSN( "lwl2", 0xb5000000, OP_C4X ), A_CLASS_INSN( "lwl3", 0xb5800000, OP_C4X ), A_CLASS_INSN( "lwr0", 0xb6000000, OP_C4X ), A_CLASS_INSN( "lwr1", 0xb6800000, OP_C4X ), A_CLASS_INSN( "lwr2", 0xb7000000, OP_C4X ), A_CLASS_INSN( "lwr3", 0xb7800000, OP_C4X ), { "maxspeed",0x10800000,0xffffffff, "" , OP_LPWR }, /* Z_CLASS */ A_CLASS_INSN( "mb0", 0xb8000000, OP_C4X ), A_CLASS_INSN( "mb1", 0xb8800000, OP_C4X ), A_CLASS_INSN( "mb2", 0xb9000000, OP_C4X ), A_CLASS_INSN( "mb3", 0xb9800000, OP_C4X ), A_CLASS_INSN( "mh0", 0xbc000000, OP_C4X ), A_CLASS_INSN( "mh1", 0xbc800000, OP_C4X ), A_CLASS_INSN( "mh2", 0xbd000000, OP_C4X ), A_CLASS_INSN( "mh3", 0xbd800000, OP_C4X ), B_CLASS_INSN( "mpyf", 0x0a000000, OP_C3X ), SC_CLASS_INSN( "mpyf", 0x04800000, OP_C3X ), M_CLASS_INSN( "mpyf", "addf", 0x80000000, OP_C3X ), QC_CLASS_INSN( "mpyf", "stf", 0xde000000, OP_C3X ), M_CLASS_INSN( "mpyf", "subf", 0x84000000, OP_C3X ), A_CLASS_INSN( "mpyi", 0x0a800000, OP_C3X ), TC_CLASS_INSN( "mpyi", 0x05000000, OP_C3X ), M_CLASS_INSN( "mpyi", "addi", 0x88000000, OP_C3X ), QC_CLASS_INSN( "mpyi", "sti", 0xe0000000, OP_C3X ), M_CLASS_INSN( "mpyi", "subi", 0x8c000000, OP_C3X ), A_CLASS_INSN( "mpyshi", 0x1d800000, OP_C4X ), TC_CLASS_INSN( "mpyshi", 0x28800000, OP_C4X ), A_CLASS_INSN( "mpyuhi", 0x1e000000, OP_C4X ), TC_CLASS_INSN( "mpyuhi", 0x29000000, OP_C4X ), A_CLASS_INSN( "negb", 0x0b000000, OP_C3X ), B_CLASS_INSN( "negf", 0x0b800000, OP_C3X ), P_CLASS_INSN( "negf", "stf", 0xe2000000, OP_C3X ), A_CLASS_INSN( "negi", 0x0c000000, OP_C3X ), P_CLASS_INSN( "negi", "sti", 0xe4000000, OP_C3X ), A2_CLASS_INSN( "nop", 0x0c800000, OP_C3X ), B_CLASS_INSN( "norm", 0x0d000000, OP_C3X ), AU_CLASS_INSN( "not", 0x0d800000, OP_C3X ), P_CLASS_INSN( "not", "sti", 0xe6000000, OP_C3X ), AU_CLASS_INSN( "or", 0x10000000, OP_C3X ), TC_CLASS_INSN( "or", 0x05800000, OP_C3X ), QC_CLASS_INSN( "or", "sti", 0xe8000000, OP_C3X ), R_CLASS_INSN( "pop", 0x0e200000, OP_C3X ), RF_CLASS_INSN( "popf", 0x0ea00000, OP_C3X ), R_CLASS_INSN( "push", 0x0f200000, OP_C3X ), RF_CLASS_INSN( "pushf", 0x0fa00000, OP_C3X ), BA_CLASS_INSN( "rcpf", 0x1d000000, OP_C4X ), { "retiB", 0x78000000, 0xffe00000, "" , OP_C3X }, /* Z_CLASS */ { "reti", 0x78000000, 0xffe00000, "" , OP_C3X }, /* Z_CLASS - Alias for retiu */ { "retiBd", 0x78200000, 0xffe00000, "" , OP_C4X }, /* Z_CLASS */ { "retid", 0x78200000, 0xffe00000, "" , OP_C4X }, /* Z_CLASS - Alias for retiud */ { "retsB", 0x78800000, 0xffe00000, "" , OP_C3X }, /* Z_CLASS */ { "rets", 0x78800000, 0xffe00000, "" , OP_C3X }, /* Z_CLASS - Alias for retsu */ B_CLASS_INSN( "rnd", 0x11000000, OP_C3X ), R_CLASS_INSN( "rol", 0x11e00001, OP_C3X ), R_CLASS_INSN( "rolc", 0x12600001, OP_C3X ), R_CLASS_INSN( "ror", 0x12e0ffff, OP_C3X ), R_CLASS_INSN( "rorc", 0x1360ffff, OP_C3X ), { "rptb", 0x64000000, 0xff000000, "B" , OP_C3X }, /* I2_CLASS */ { "rptb", 0x79000000, 0xff000000, "Q" , OP_C4X }, /* I2_CLASS */ { "rptbd", 0x65000000, 0xff000000, "B" , OP_C4X }, /* I2_CLASS */ { "rptbd", 0x79800000, 0xff000000, "Q" , OP_C4X }, /* I2_CLASS */ A3_CLASS_INSN( "rpts", 0x139b0000, OP_C3X ), B_CLASS_INSN( "rsqrf", 0x1c800000, OP_C4X ), { "sigi", 0x16000000, 0xffe00000, "" , OP_C3X }, /* Z_CLASS */ A6_CLASS_INSN( "sigi", 0x16000000, OP_C4X ), B7_CLASS_INSN( "stf", 0x14000000, OP_C3X ), LS_CLASS_INSN( "stf", 0xc0000000, OP_C3X ), B7_CLASS_INSN( "stfi", 0x14800000, OP_C3X ), A7_CLASS_INSN( "sti", 0x15000000, OP_C3X ), { "sti", 0x15000000, 0xffe00000, "T,@" , OP_C4X }, /* Class A7 - Alias for stik */ { "sti", 0x15600000, 0xffe00000, "T,*" , OP_C4X }, /* Class A7 */ LS_CLASS_INSN( "sti", 0xc2000000, OP_C3X ), A7_CLASS_INSN( "stii", 0x15800000, OP_C3X ), { "stik", 0x15000000, 0xffe00000, "T,@" , OP_C4X }, /* Z_CLASS */ { "stik", 0x15600000, 0xffe00000, "T,*" , OP_C4X }, /* Z_CLASS */ A_CLASS_INSN( "subb", 0x16800000, OP_C3X ), T_CLASS_INSN( "subb", 0x06000000, OP_C3X ), A_CLASS_INSN( "subc", 0x17000000, OP_C3X ), B_CLASS_INSN( "subf", 0x17800000, OP_C3X ), S_CLASS_INSN( "subf", 0x06800000, OP_C3X ), Q_CLASS_INSN( "subf", "stf", 0xea000000, OP_C3X ), A_CLASS_INSN( "subi", 0x18000000, OP_C3X ), T_CLASS_INSN( "subi", 0x07000000, OP_C3X ), Q_CLASS_INSN( "subi", "sti", 0xec000000, OP_C3X ), A_CLASS_INSN( "subrb", 0x18800000, OP_C3X ), B_CLASS_INSN( "subrf", 0x19000000, OP_C3X ), A_CLASS_INSN( "subri", 0x19800000, OP_C3X ), { "swi", 0x66000000, 0xffffffff, "" , OP_C3X }, /* Z_CLASS */ B_CLASS_INSN( "toieee", 0x1b800000, OP_C4X ), P_CLASS_INSN( "toieee","stf", 0xf0000000, OP_C4X ), { "trapB", 0x74000000, 0xffe00000, "V" , OP_C3X }, /* Z_CLASS */ { "trap", 0x74000000, 0xffe00000, "V" , OP_C3X }, /* Z_CLASS - Alias for trapu */ AU_CLASS_INSN( "tstb", 0x1a000000, OP_C3X ), T2C_CLASS_INSN("tstb", 0x07800000, OP_C3X ), AU_CLASS_INSN( "xor", 0x1a800000, OP_C3X ), TC_CLASS_INSN( "xor", 0x08000000, OP_C3X ), QC_CLASS_INSN( "xor", "sti", 0xee000000, OP_C3X ), /* Dummy entry, not included in tic4x_num_insts. This lets code examine entry i + 1 without checking if we've run off the end of the table. */ { "", 0x0, 0x00, "", 0 }};const unsigned int tic4x_num_insts = (((sizeof tic4x_insts) / (sizeof tic4x_insts[0])) - 1);
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -