tic30.h

这个是LINUX下的GDB调度工具的源码

  { "ldinc"  ,2,0x52000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldic"   ,2,0x50800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldinlv" ,2,0x58000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldilv"  ,2,0x58800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldinluf",2,0x59000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldiluf" ,2,0x59800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldizuf" ,2,0x5A000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "ldii"   ,2,0x08800000,AddressMode, { Direct|Indirect, AllReg, 0 }, Imm_None },
  { "ldm"    ,2,0x09000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "ldp"    ,2,0x08700000,0,           { Abs24|Direct, DPReg|NotReq, 0 }, Imm_UInt },
  { "lopower",0,0x10800001,0,           { 0, 0, 0 }, Imm_None }, /* LC31 Only */
  { "lsh"    ,2,0x09800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "lsh3"   ,3,0x24000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { "maxspeed",0,0x10800000,0,          { 0, 0, 0 }, Imm_None }, /* LC31 Only */
  { "mpyf"   ,2,0x0A000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "mpyf3"  ,3,0x24800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
  { "mpyi"   ,2,0x0A800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "mpyi3"  ,3,0x25000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { "negb"   ,2,0x0B000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "negf"   ,2,0x0B800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "negi"   ,2,0x0C000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "nop"    ,1,0x0C800000,AddressMode, { AllReg|Indirect|NotReq, 0, 0 }, Imm_None },
  { "norm"   ,2,0x0D000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float }, /*Check another source*/
  { "not"    ,2,0x0D800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "or"     ,2,0x10000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "or3"    ,3,0x25800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { "pop"    ,1,0x0E200000,StackOp,     { AllReg, 0, 0 }, Imm_None },
  { "popf"   ,1,0x0EA00000,StackOp,     { Rn, 0, 0 }, Imm_None },
  { "push"   ,1,0x0F200000,StackOp,     { AllReg, 0, 0 }, Imm_None },
  { "pushf"  ,1,0x0FA00000,StackOp,     { Rn, 0, 0 }, Imm_None },
  { "reti"   ,0,0x78000000,0,           { 0, 0, 0 }, Imm_None },
  { "retiu"  ,0,0x78000000,0,           { 0, 0, 0 }, Imm_None },
  { "retilo" ,0,0x78010000,0,           { 0, 0, 0 }, Imm_None },
  { "retils" ,0,0x78020000,0,           { 0, 0, 0 }, Imm_None },
  { "retihi" ,0,0x78030000,0,           { 0, 0, 0 }, Imm_None },
  { "retihs" ,0,0x78040000,0,           { 0, 0, 0 }, Imm_None },
  { "retieq" ,0,0x78050000,0,           { 0, 0, 0 }, Imm_None },
  { "retine" ,0,0x78060000,0,           { 0, 0, 0 }, Imm_None },
  { "retilt" ,0,0x78070000,0,           { 0, 0, 0 }, Imm_None },
  { "retile" ,0,0x78080000,0,           { 0, 0, 0 }, Imm_None },
  { "retigt" ,0,0x78090000,0,           { 0, 0, 0 }, Imm_None },
  { "retige" ,0,0x780A0000,0,           { 0, 0, 0 }, Imm_None },
  { "retiz"  ,0,0x78050000,0,           { 0, 0, 0 }, Imm_None },
  { "retinz" ,0,0x78060000,0,           { 0, 0, 0 }, Imm_None },
  { "retip"  ,0,0x78090000,0,           { 0, 0, 0 }, Imm_None },
  { "retin"  ,0,0x78070000,0,           { 0, 0, 0 }, Imm_None },
  { "retinn" ,0,0x780A0000,0,           { 0, 0, 0 }, Imm_None },
  { "retinv" ,0,0x780C0000,0,           { 0, 0, 0 }, Imm_None },
  { "retiv"  ,0,0x780D0000,0,           { 0, 0, 0 }, Imm_None },
  { "retinuf",0,0x780E0000,0,           { 0, 0, 0 }, Imm_None },
  { "retiuf" ,0,0x780F0000,0,           { 0, 0, 0 }, Imm_None },
  { "retinc" ,0,0x78040000,0,           { 0, 0, 0 }, Imm_None },
  { "retic"  ,0,0x78010000,0,           { 0, 0, 0 }, Imm_None },
  { "retinlv",0,0x78100000,0,           { 0, 0, 0 }, Imm_None },
  { "retilv" ,0,0x78110000,0,           { 0, 0, 0 }, Imm_None },
  { "retinluf",0,0x78120000,0,          { 0, 0, 0 }, Imm_None },
  { "retiluf",0,0x78130000,0,           { 0, 0, 0 }, Imm_None },
  { "retizuf",0,0x78140000,0,           { 0, 0, 0 }, Imm_None },
  { "rets"   ,0,0x78800000,0,           { 0, 0, 0 }, Imm_None },
  { "retsu"  ,0,0x78800000,0,           { 0, 0, 0 }, Imm_None },
  { "retslo" ,0,0x78810000,0,           { 0, 0, 0 }, Imm_None },
  { "retsls" ,0,0x78820000,0,           { 0, 0, 0 }, Imm_None },
  { "retshi" ,0,0x78830000,0,           { 0, 0, 0 }, Imm_None },
  { "retshs" ,0,0x78840000,0,           { 0, 0, 0 }, Imm_None },
  { "retseq" ,0,0x78850000,0,           { 0, 0, 0 }, Imm_None },
  { "retsne" ,0,0x78860000,0,           { 0, 0, 0 }, Imm_None },
  { "retslt" ,0,0x78870000,0,           { 0, 0, 0 }, Imm_None },
  { "retsle" ,0,0x78880000,0,           { 0, 0, 0 }, Imm_None },
  { "retsgt" ,0,0x78890000,0,           { 0, 0, 0 }, Imm_None },
  { "retsge" ,0,0x788A0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsz"  ,0,0x78850000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnz" ,0,0x78860000,0,           { 0, 0, 0 }, Imm_None },
  { "retsp"  ,0,0x78890000,0,           { 0, 0, 0 }, Imm_None },
  { "retsn"  ,0,0x78870000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnn" ,0,0x788A0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnv" ,0,0x788C0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsv"  ,0,0x788D0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnuf",0,0x788E0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsuf" ,0,0x788F0000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnc" ,0,0x78840000,0,           { 0, 0, 0 }, Imm_None },
  { "retsc"  ,0,0x78810000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnlv",0,0x78900000,0,           { 0, 0, 0 }, Imm_None },
  { "retslv" ,0,0x78910000,0,           { 0, 0, 0 }, Imm_None },
  { "retsnluf",0,0x78920000,0,          { 0, 0, 0 }, Imm_None },
  { "retsluf",0,0x78930000,0,           { 0, 0, 0 }, Imm_None },
  { "retszuf",0,0x78940000,0,           { 0, 0, 0 }, Imm_None },
  { "rnd"    ,2,0x11000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "rol"    ,1,0x11E00001,Rotate,      { AllReg, 0, 0 }, Imm_None },
  { "rolc"   ,1,0x12600001,Rotate,      { AllReg, 0, 0 }, Imm_None },
  { "ror"    ,1,0x12E0FFFF,Rotate,      { AllReg, 0, 0 }, Imm_None },
  { "rorc"   ,1,0x1360FFFF,Rotate,      { AllReg, 0, 0 }, Imm_None },
  { "rptb"   ,1,0x64000000,0,           { Imm24, 0, 0 }, Imm_UInt },
  { "rpts"   ,1,0x139B0000,AddressMode, { GAddr2, 0, 0 }, Imm_UInt },
  { "sigi"   ,0,0x16000000,0,           { 0, 0, 0 }, Imm_None },
  { "stf"    ,2,0x14000000,AddressMode, { Rn, Direct|Indirect, 0 }, Imm_Float },
  { "stfi"   ,2,0x14800000,AddressMode, { Rn, Direct|Indirect, 0 }, Imm_Float },
  { "sti"    ,2,0x15000000,AddressMode, { AllReg, Direct|Indirect, 0 }, Imm_SInt },
  { "stii"   ,2,0x15800000,AddressMode, { AllReg, Direct|Indirect, 0 }, Imm_SInt },
  { "subb"   ,2,0x16800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "subb3"  ,3,0x26000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { "subc"   ,2,0x17000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "subf"   ,2,0x17800000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "subf3"  ,3,0x26800000,AddressMode, { TAddr1, TAddr2, Rn }, Imm_None },
  { "subi"   ,2,0x18000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "subi3"  ,3,0x27000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { "subrb"  ,2,0x18800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "subrf"  ,2,0x19000000,AddressMode, { GAddr1, Rn, 0 }, Imm_Float },
  { "subri"  ,2,0x19800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_SInt },
  { "swi"    ,0,0x66000000,0,           { 0, 0, 0 }, Imm_None },
  { "trap"   ,1,0x74800020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapu"  ,1,0x74800020,0,           { IVector, 0, 0 }, Imm_None },
  { "traplo" ,1,0x74810020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapls" ,1,0x74820020,0,           { IVector, 0, 0 }, Imm_None },
  { "traphi" ,1,0x74830020,0,           { IVector, 0, 0 }, Imm_None },
  { "traphs" ,1,0x74840020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapeq" ,1,0x74850020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapne" ,1,0x74860020,0,           { IVector, 0, 0 }, Imm_None },
  { "traplt" ,1,0x74870020,0,           { IVector, 0, 0 }, Imm_None },
  { "traple" ,1,0x74880020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapgt" ,1,0x74890020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapge" ,1,0x748A0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapz"  ,1,0x74850020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnz" ,1,0x74860020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapp"  ,1,0x74890020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapn"  ,1,0x74870020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnn" ,1,0x748A0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnv" ,1,0x748C0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapv"  ,1,0x748D0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnuf",1,0x748E0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapuf" ,1,0x748F0020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnc" ,1,0x74840020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapc"  ,1,0x74810020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnlv",1,0x74900020,0,           { IVector, 0, 0 }, Imm_None },
  { "traplv" ,1,0x74910020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapnluf",1,0x74920020,0,          { IVector, 0, 0 }, Imm_None },
  { "trapluf",1,0x74930020,0,           { IVector, 0, 0 }, Imm_None },
  { "trapzuf",1,0x74940020,0,           { IVector, 0, 0 }, Imm_None },
  { "tstb"   ,2,0x1A000000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "tstb3"  ,2,0x27800000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, 0 }, Imm_None },
  { "xor"    ,2,0x1A800000,AddressMode, { GAddr2, AllReg, 0 }, Imm_UInt },
  { "xor3"   ,3,0x28000000,AddressMode, { TAddr1|AllReg, TAddr2|AllReg, AllReg }, Imm_None },
  { ""       ,0,0x00000000,0,           { 0, 0, 0 }, 0 }
};

static const template *const tic30_optab_end =
  tic30_optab + sizeof(tic30_optab)/sizeof(tic30_optab[0]);

typedef struct {
  char *name;
  unsigned int operands_1;
  unsigned int operands_2;
  unsigned int base_opcode;
  unsigned int operand_types[2][3];
  /* Which operand fits into which part of the final opcode word. */
  int oporder;
} partemplate;

/* oporder defines - not very descriptive. */
#define OO_4op1   0
#define OO_4op2   1
#define OO_4op3   2
#define OO_5op1   3
#define OO_5op2   4
#define OO_PField 5

static const partemplate tic30_paroptab[] = {
  { "q_absf_stf",   2,2,0xC8000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_absi_sti",   2,2,0xCA000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_addf3_stf",  3,2,0xCC000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_addi3_sti",  3,2,0xCE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_and3_sti",   3,2,0xD0000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_ash3_sti",   3,2,0xD2000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
	OO_5op2 },
  { "q_fix_sti",    2,2,0xD4000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_float_stf",  2,2,0xD6000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_ldf_ldf",    2,2,0xC4000000, { { Indirect, Rn, 0 }, { Indirect, Rn, 0 } },
	OO_4op2 },
  { "q_ldf_stf",    2,2,0xD8000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_ldi_ldi",    2,2,0xC6000000, { { Indirect, Rn, 0 }, { Indirect, Rn, 0 } },
	OO_4op2 },
  { "q_ldi_sti",    2,2,0xDA000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_lsh3_sti",   3,2,0xDC000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
	OO_5op2 },
  { "q_mpyf3_addf3",3,3,0x80000000, { { Rn | Indirect, Rn | Indirect, Rn },
 	                              { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
  { "q_mpyf3_stf",  3,2,0xDE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_mpyf3_subf3",3,3,0x84000000, { { Rn | Indirect, Rn | Indirect, Rn },
	                              { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
  { "q_mpyi3_addi3",3,3,0x88000000, { { Rn | Indirect, Rn | Indirect, Rn },
	                              { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
  { "q_mpyi3_sti",  3,2,0xE0000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_mpyi3_subi3",3,3,0x8C000000, { { Rn | Indirect, Rn | Indirect, Rn },
	                              { Rn | Indirect, Rn | Indirect, Rn } }, OO_PField },
  { "q_negf_stf",   2,2,0xE2000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_negi_sti",   2,2,0xE4000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_not_sti",    2,2,0xE6000000, { { Indirect, Rn, 0 }, { Rn, Indirect, 0 } },
	OO_4op1 },
  { "q_or3_sti",    3,2,0xE8000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "q_stf_stf",    2,2,0xC0000000, { { Rn, Indirect, 0 }, { Rn, Indirect, 0 } },
	OO_4op3 },
  { "q_sti_sti",    2,2,0xC2000000, { { Rn, Indirect, 0 }, { Rn, Indirect, 0 } },
	OO_4op3 },
  { "q_subf3_stf",  3,2,0xEA000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
	OO_5op2 },
  { "q_subi3_sti",  3,2,0xEC000000, { { Rn, Indirect, Rn }, { Rn, Indirect, 0 } },
	OO_5op2 },
  { "q_xor3_sti",   3,2,0xEE000000, { { Indirect, Rn, Rn }, { Rn, Indirect, 0 } },
	OO_5op1 },
  { "",             0,0,0x00000000, { { 0, 0, 0 }, { 0, 0, 0 } }, 0 }
};

static const partemplate *const tic30_paroptab_end =
  tic30_paroptab + sizeof(tic30_paroptab)/sizeof(tic30_paroptab[0]);

#endif