reloc.texi

这个是LINUX下的GDB调度工具的源码

          @}                                             \
        else                                            \
          @{                                             \
            relocation = symbol->value;                 \
          @}                                             \
      @}                                                 \
  @}

@end example

@findex bfd_get_reloc_size
@subsubsection @code{bfd_get_reloc_size}
@strong{Synopsis}
@example
unsigned int bfd_get_reloc_size (reloc_howto_type *);
@end example
@strong{Description}@*
For a reloc_howto_type that operates on a fixed number of bytes,
this returns the number of bytes operated on.

@findex arelent_chain
@subsubsection @code{arelent_chain}
@strong{Description}@*
How relocs are tied together in an @code{asection}:
@example
typedef struct relent_chain
@{
  arelent relent;
  struct relent_chain *next;
@}
arelent_chain;

@end example

@findex bfd_check_overflow
@subsubsection @code{bfd_check_overflow}
@strong{Synopsis}
@example
bfd_reloc_status_type bfd_check_overflow
   (enum complain_overflow how,
    unsigned int bitsize,
    unsigned int rightshift,
    unsigned int addrsize,
    bfd_vma relocation);
@end example
@strong{Description}@*
Perform overflow checking on @var{relocation} which has
@var{bitsize} significant bits and will be shifted right by
@var{rightshift} bits, on a machine with addresses containing
@var{addrsize} significant bits.  The result is either of
@code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.

@findex bfd_perform_relocation
@subsubsection @code{bfd_perform_relocation}
@strong{Synopsis}
@example
bfd_reloc_status_type bfd_perform_relocation
   (bfd *abfd,
    arelent *reloc_entry,
    void *data,
    asection *input_section,
    bfd *output_bfd,
    char **error_message);
@end example
@strong{Description}@*
If @var{output_bfd} is supplied to this function, the
generated image will be relocatable; the relocations are
copied to the output file after they have been changed to
reflect the new state of the world. There are two ways of
reflecting the results of partial linkage in an output file:
by modifying the output data in place, and by modifying the
relocation record.  Some native formats (e.g., basic a.out and
basic coff) have no way of specifying an addend in the
relocation type, so the addend has to go in the output data.
This is no big deal since in these formats the output data
slot will always be big enough for the addend. Complex reloc
types with addends were invented to solve just this problem.
The @var{error_message} argument is set to an error message if
this return @code{bfd_reloc_dangerous}.

@findex bfd_install_relocation
@subsubsection @code{bfd_install_relocation}
@strong{Synopsis}
@example
bfd_reloc_status_type bfd_install_relocation
   (bfd *abfd,
    arelent *reloc_entry,
    void *data, bfd_vma data_start,
    asection *input_section,
    char **error_message);
@end example
@strong{Description}@*
This looks remarkably like @code{bfd_perform_relocation}, except it
does not expect that the section contents have been filled in.
I.e., it's suitable for use when creating, rather than applying
a relocation.

For now, this function should be considered reserved for the
assembler.


@node howto manager,  , typedef arelent, Relocations
@section The howto manager
When an application wants to create a relocation, but doesn't
know what the target machine might call it, it can find out by
using this bit of code.

@findex bfd_reloc_code_type
@subsubsection @code{bfd_reloc_code_type}
@strong{Description}@*
The insides of a reloc code.  The idea is that, eventually, there
will be one enumerator for every type of relocation we ever do.
Pass one of these values to @code{bfd_reloc_type_lookup}, and it'll
return a howto pointer.

This does mean that the application must determine the correct
enumerator value; you can't get a howto pointer from a random set
of attributes.

Here are the possible values for @code{enum bfd_reloc_code_real}:

@deffn {} BFD_RELOC_64
@deffnx {} BFD_RELOC_32
@deffnx {} BFD_RELOC_26
@deffnx {} BFD_RELOC_24
@deffnx {} BFD_RELOC_16
@deffnx {} BFD_RELOC_14
@deffnx {} BFD_RELOC_8
Basic absolute relocations of N bits.
@end deffn
@deffn {} BFD_RELOC_64_PCREL
@deffnx {} BFD_RELOC_32_PCREL
@deffnx {} BFD_RELOC_24_PCREL
@deffnx {} BFD_RELOC_16_PCREL
@deffnx {} BFD_RELOC_12_PCREL
@deffnx {} BFD_RELOC_8_PCREL
PC-relative relocations.  Sometimes these are relative to the address
of the relocation itself; sometimes they are relative to the start of
the section containing the relocation.  It depends on the specific target.

The 24-bit relocation is used in some Intel 960 configurations.
@end deffn
@deffn {} BFD_RELOC_32_SECREL
Section relative relocations.  Some targets need this for DWARF2.
@end deffn
@deffn {} BFD_RELOC_32_GOT_PCREL
@deffnx {} BFD_RELOC_16_GOT_PCREL
@deffnx {} BFD_RELOC_8_GOT_PCREL
@deffnx {} BFD_RELOC_32_GOTOFF
@deffnx {} BFD_RELOC_16_GOTOFF
@deffnx {} BFD_RELOC_LO16_GOTOFF
@deffnx {} BFD_RELOC_HI16_GOTOFF
@deffnx {} BFD_RELOC_HI16_S_GOTOFF
@deffnx {} BFD_RELOC_8_GOTOFF
@deffnx {} BFD_RELOC_64_PLT_PCREL
@deffnx {} BFD_RELOC_32_PLT_PCREL
@deffnx {} BFD_RELOC_24_PLT_PCREL
@deffnx {} BFD_RELOC_16_PLT_PCREL
@deffnx {} BFD_RELOC_8_PLT_PCREL
@deffnx {} BFD_RELOC_64_PLTOFF
@deffnx {} BFD_RELOC_32_PLTOFF
@deffnx {} BFD_RELOC_16_PLTOFF
@deffnx {} BFD_RELOC_LO16_PLTOFF
@deffnx {} BFD_RELOC_HI16_PLTOFF
@deffnx {} BFD_RELOC_HI16_S_PLTOFF
@deffnx {} BFD_RELOC_8_PLTOFF
For ELF.
@end deffn
@deffn {} BFD_RELOC_68K_GLOB_DAT
@deffnx {} BFD_RELOC_68K_JMP_SLOT
@deffnx {} BFD_RELOC_68K_RELATIVE
Relocations used by 68K ELF.
@end deffn
@deffn {} BFD_RELOC_32_BASEREL
@deffnx {} BFD_RELOC_16_BASEREL
@deffnx {} BFD_RELOC_LO16_BASEREL
@deffnx {} BFD_RELOC_HI16_BASEREL
@deffnx {} BFD_RELOC_HI16_S_BASEREL
@deffnx {} BFD_RELOC_8_BASEREL
@deffnx {} BFD_RELOC_RVA
Linkage-table relative.
@end deffn
@deffn {} BFD_RELOC_8_FFnn
Absolute 8-bit relocation, but used to form an address like 0xFFnn.
@end deffn
@deffn {} BFD_RELOC_32_PCREL_S2
@deffnx {} BFD_RELOC_16_PCREL_S2
@deffnx {} BFD_RELOC_23_PCREL_S2
These PC-relative relocations are stored as word displacements --
i.e., byte displacements shifted right two bits.  The 30-bit word
displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
SPARC.  (SPARC tools generally refer to this as <<WDISP30>>.)  The
signed 16-bit displacement is used on the MIPS, and the 23-bit
displacement is used on the Alpha.
@end deffn
@deffn {} BFD_RELOC_HI22
@deffnx {} BFD_RELOC_LO10
High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
the target word.  These are used on the SPARC.
@end deffn
@deffn {} BFD_RELOC_GPREL16
@deffnx {} BFD_RELOC_GPREL32
For systems that allocate a Global Pointer register, these are
displacements off that register.  These relocation types are
handled specially, because the value the register will have is
decided relatively late.
@end deffn
@deffn {} BFD_RELOC_I960_CALLJ
Reloc types used for i960/b.out.
@end deffn
@deffn {} BFD_RELOC_NONE
@deffnx {} BFD_RELOC_SPARC_WDISP22
@deffnx {} BFD_RELOC_SPARC22
@deffnx {} BFD_RELOC_SPARC13
@deffnx {} BFD_RELOC_SPARC_GOT10
@deffnx {} BFD_RELOC_SPARC_GOT13
@deffnx {} BFD_RELOC_SPARC_GOT22
@deffnx {} BFD_RELOC_SPARC_PC10
@deffnx {} BFD_RELOC_SPARC_PC22
@deffnx {} BFD_RELOC_SPARC_WPLT30
@deffnx {} BFD_RELOC_SPARC_COPY
@deffnx {} BFD_RELOC_SPARC_GLOB_DAT
@deffnx {} BFD_RELOC_SPARC_JMP_SLOT
@deffnx {} BFD_RELOC_SPARC_RELATIVE
@deffnx {} BFD_RELOC_SPARC_UA16
@deffnx {} BFD_RELOC_SPARC_UA32
@deffnx {} BFD_RELOC_SPARC_UA64
SPARC ELF relocations.  There is probably some overlap with other
relocation types already defined.
@end deffn
@deffn {} BFD_RELOC_SPARC_BASE13
@deffnx {} BFD_RELOC_SPARC_BASE22
I think these are specific to SPARC a.out (e.g., Sun 4).
@end deffn
@deffn {} BFD_RELOC_SPARC_64
@deffnx {} BFD_RELOC_SPARC_10
@deffnx {} BFD_RELOC_SPARC_11
@deffnx {} BFD_RELOC_SPARC_OLO10
@deffnx {} BFD_RELOC_SPARC_HH22
@deffnx {} BFD_RELOC_SPARC_HM10
@deffnx {} BFD_RELOC_SPARC_LM22
@deffnx {} BFD_RELOC_SPARC_PC_HH22
@deffnx {} BFD_RELOC_SPARC_PC_HM10
@deffnx {} BFD_RELOC_SPARC_PC_LM22
@deffnx {} BFD_RELOC_SPARC_WDISP16
@deffnx {} BFD_RELOC_SPARC_WDISP19
@deffnx {} BFD_RELOC_SPARC_7
@deffnx {} BFD_RELOC_SPARC_6
@deffnx {} BFD_RELOC_SPARC_5
@deffnx {} BFD_RELOC_SPARC_DISP64
@deffnx {} BFD_RELOC_SPARC_PLT32
@deffnx {} BFD_RELOC_SPARC_PLT64
@deffnx {} BFD_RELOC_SPARC_HIX22
@deffnx {} BFD_RELOC_SPARC_LOX10
@deffnx {} BFD_RELOC_SPARC_H44
@deffnx {} BFD_RELOC_SPARC_M44
@deffnx {} BFD_RELOC_SPARC_L44
@deffnx {} BFD_RELOC_SPARC_REGISTER
SPARC64 relocations
@end deffn
@deffn {} BFD_RELOC_SPARC_REV32
SPARC little endian relocation
@end deffn
@deffn {} BFD_RELOC_SPARC_TLS_GD_HI22
@deffnx {} BFD_RELOC_SPARC_TLS_GD_LO10
@deffnx {} BFD_RELOC_SPARC_TLS_GD_ADD
@deffnx {} BFD_RELOC_SPARC_TLS_GD_CALL
@deffnx {} BFD_RELOC_SPARC_TLS_LDM_HI22
@deffnx {} BFD_RELOC_SPARC_TLS_LDM_LO10
@deffnx {} BFD_RELOC_SPARC_TLS_LDM_ADD
@deffnx {} BFD_RELOC_SPARC_TLS_LDM_CALL
@deffnx {} BFD_RELOC_SPARC_TLS_LDO_HIX22
@deffnx {} BFD_RELOC_SPARC_TLS_LDO_LOX10
@deffnx {} BFD_RELOC_SPARC_TLS_LDO_ADD
@deffnx {} BFD_RELOC_SPARC_TLS_IE_HI22
@deffnx {} BFD_RELOC_SPARC_TLS_IE_LO10
@deffnx {} BFD_RELOC_SPARC_TLS_IE_LD
@deffnx {} BFD_RELOC_SPARC_TLS_IE_LDX
@deffnx {} BFD_RELOC_SPARC_TLS_IE_ADD
@deffnx {} BFD_RELOC_SPARC_TLS_LE_HIX22
@deffnx {} BFD_RELOC_SPARC_TLS_LE_LOX10
@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD32
@deffnx {} BFD_RELOC_SPARC_TLS_DTPMOD64
@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF32
@deffnx {} BFD_RELOC_SPARC_TLS_DTPOFF64
@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF32
@deffnx {} BFD_RELOC_SPARC_TLS_TPOFF64
SPARC TLS relocations
@end deffn
@deffn {} BFD_RELOC_ALPHA_GPDISP_HI16
Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
"addend" in some special way.
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol.  The
addend is the displacement in bytes of the "lda" instruction from
the "ldah" instruction (which is at the address of this reloc).
@end deffn
@deffn {} BFD_RELOC_ALPHA_GPDISP_LO16
For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
with GPDISP_HI16 relocs.  The addend is ignored when writing the
relocations out, and is filled in with the file's GP value on
reading, for convenience.
@end deffn
@deffn {} BFD_RELOC_ALPHA_GPDISP
The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
relocation except that there is no accompanying GPDISP_LO16
relocation.
@end deffn
@deffn {} BFD_RELOC_ALPHA_LITERAL
@deffnx {} BFD_RELOC_ALPHA_ELF_LITERAL
@deffnx {} BFD_RELOC_ALPHA_LITUSE
The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
the assembler turns it into a LDQ instruction to load the address of
the symbol, and then fills in a register in the real instruction.

The LITERAL reloc, at the LDQ instruction, refers to the .lita
section symbol.  The addend is ignored when writing, but is filled
in with the file's GP value on reading, for convenience, as with the
GPDISP_LO16 reloc.

The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
It should refer to the symbol to be referenced, as with 16_GOTOFF,
but it generates output not based on the position within the .got
section, but relative to the GP value chosen for the file during the
final link stage.

The LITUSE reloc, on the instruction using the loaded address, gives
information to the linker that it might be able to use to optimize
away some literal section references.  The symbol is ignored (read
as the absolute section symbol), and the "addend" indicates the type
of instruction using the register:
1 - "memory" fmt insn
2 - byte-manipulation (byte offset reg)
3 - jsr (target of branch)
@end deffn
@deffn {} BFD_RELOC_ALPHA_HINT
The HINT relocation indicates a value that should be filled into the
"hint" field of a jmp/jsr/ret instruction, for possible branch-
prediction logic which may be provided on some processors.
@end deffn
@deffn {} BFD_RELOC_ALPHA_LINKAGE
The LINKAGE relocation outputs a linkage pair in the object file,
which is filled by the linker.
@end deffn
@deffn {} BFD_RELOC_ALPHA_CODEADDR
The CODEADDR relocation outputs a STO_CA in the object file,
which is filled by the linker.
@end deffn
@deffn {} BFD_RELOC_ALPHA_GPREL_HI16
@deffnx {} BFD_RELOC_ALPHA_GPREL_LO16
The GPREL_HI/LO relocations together form a 32-bit offset from the
GP register.
@end deffn
@deffn {} BFD_RELOC_ALPHA_BRSGP
Like BFD_RELOC_23_PCREL_S2, except that the source and target must
share a common GP, and the target address is adjusted for
STO_ALPHA_STD_GPLOAD.
@end deffn
@deffn {} BFD_RELOC_ALPHA_TLSGD
@deffnx {} BFD_RELOC_ALPHA_TLSLDM
@deffnx {} BFD_RELOC_ALPHA_DTPMOD64
@deffnx {} BFD_RELOC_ALPHA_GOTDTPREL16
@deffnx {} BFD_RELOC_ALPHA_DTPREL64
@deffnx {} BFD_RELOC_ALPHA_DTPREL_HI16
@deffnx {} BFD_RELOC_ALPHA_DTPREL_LO16
@deffnx {} BFD_RELOC_ALPHA_DTPREL16
@deffnx {} BFD_RELOC_ALPHA_GOTTPREL16
@deffnx {} BFD_RELOC_ALPHA_TPREL64
@deffnx {} BFD_RELOC_ALPHA_TPREL_HI16
@deffnx {} BFD_RELOC_ALPHA_TPREL_LO16
@deffnx {} BFD_RELOC_ALPHA_TPREL16
Alpha thread-local storage relocations.
@end deffn
@deffn {} BFD_RELOC_MIPS_JMP
Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise.
@end deffn
@deffn {} BFD_RELOC_MIPS16_JMP
The MIPS16 jump instruction.
@end deffn
@deffn {} BFD_RELOC_MIPS16_GPREL
MIPS16 GP relative reloc.
@end deffn
@deffn {} BFD_RELOC_HI16
High 16 bits of 32-bit value; simple reloc.
@end deffn