drv_defs.h

基于S3C2440处理器的sd卡驱动程序

#define	UMSTAT0     (*(volatile unsigned *)(UART0_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define	UTXH0       (*(volatile unsigned char *)(UART0_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define	URXH0       (*(volatile unsigned char *)(UART0_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define	UBRDIV0     (*(volatile unsigned *)(UART0_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */

#define UART1_BASE  0x50004000                                  /* UART1 registers base */
#define	ULCON1      (*(volatile unsigned *)UART1_BASE)          /* UART LINE CONTROL REGISTER */
#define	UCON1       (*(volatile unsigned *)(UART1_BASE + 0x04)) /* UART CONTROL REGISTER */
#define	UFCON1      (*(volatile unsigned *)(UART1_BASE + 0x08)) /* UART FIFO CONTROL REGISTER */
#define	UMCON1      (*(volatile unsigned *)(UART1_BASE + 0x0c)) /* UART MODEM CONTROL REGISTER */
#define	UTRSTAT1    (*(volatile unsigned *)(UART1_BASE + 0x10)) /* UART TX/RX STATUS REGISTER */
#define	UERSTAT1    (*(volatile unsigned *)(UART1_BASE + 0x14)) /* UART ERROR STATUS REGISTER */
#define	UFSTAT1     (*(volatile unsigned *)(UART1_BASE + 0x18)) /* UART FIFO STATUS REGISTER */
#define	UMSTAT1     (*(volatile unsigned *)(UART1_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define	UTXH1       (*(volatile unsigned char *)(UART1_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define	URXH1       (*(volatile unsigned char *)(UART1_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define	UBRDIV1     (*(volatile unsigned *)(UART1_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */

#define UART2_BASE  0x50008000                                  /* UART2 registers base */
#define	ULCON2      (*(volatile unsigned *)UART2_BASE)          /* UART LINE CONTROL REGISTER */
#define	UCON2       (*(volatile unsigned *)(UART2_BASE + 0x04)) /* UART CONTROL REGISTER */
#define	UFCON2      (*(volatile unsigned *)(UART2_BASE + 0x08)) /* UART FIFO CONTROL REGISTER */
#define	UMCON2      (*(volatile unsigned *)(UART2_BASE + 0x0c)) /* UART MODEM CONTROL REGISTER */
#define	UTRSTAT2    (*(volatile unsigned *)(UART2_BASE + 0x10)) /* UART TX/RX STATUS REGISTER */
#define	UERSTAT2    (*(volatile unsigned *)(UART2_BASE + 0x14)) /* UART ERROR STATUS REGISTER */
#define	UFSTAT2     (*(volatile unsigned *)(UART2_BASE + 0x18)) /* UART FIFO STATUS REGISTER */
#define	UMSTAT2     (*(volatile unsigned *)(UART2_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define	UTXH2       (*(volatile unsigned char *)(UART2_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define	URXH2       (*(volatile unsigned char *)(UART2_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define	UBRDIV2     (*(volatile unsigned *)(UART2_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */


/*-----------------------------------------------------------------------------
                    USB DEVICE CONTROLLER SPECIAL REGISTERS
------------------------------------------------------------------------------*/


/*-----------------------------------------------------------------------------
                    INTERRUPT CONTROLLER SPECIAL REGISTERS and vector
------------------------------------------------------------------------------*/
#define INT_BASE    0x4A000000                                 
#define	SRCPND      (*(volatile unsigned *)INT_BASE)          /* Indicate the interrupt request status */
#define	INTMOD      (*(volatile unsigned *)(INT_BASE + 0x04)) /* Interrupt mode regiseter */
#define	INTMSK      (*(volatile unsigned *)(INT_BASE + 0x08)) /* INTERRUPT MASK (INTMSK) REGISTER */
#define	PRIORITY    (*(volatile unsigned *)(INT_BASE + 0x0c)) /* IRQ priority control register */
#define	INTPND      (*(volatile unsigned *)(INT_BASE + 0x10)) /* Indicate the interrupt request status. */
#define	INTOFFSET   (*(volatile unsigned *)(INT_BASE + 0x14)) /* Indicate the IRQ interrupt request source */
#define	SUBSRCPND   (*(volatile unsigned *)(INT_BASE + 0x18)) /* Indicate the interrupt request status */
#define	INTSUBMSK   (*(volatile unsigned *)(INT_BASE + 0x1c)) /* INTERRUPT SUB MASK (INTSUBMSK) REGISTER */
/* vector define */
#define IRQ_VECTOR_EINT0             0
#define IRQ_VECTOR_EINT1             1
#define IRQ_VECTOR_EINT2             2
#define IRQ_VECTOR_EINT3             3
#define IRQ_VECTOR_EINT4_7           4
#define IRQ_VECTOR_EINT8_23          5
#define IRQ_VECTOR_CAM               6
#define IRQ_VECTOR_BATT_FLT          7
#define IRQ_VECTOR_TICK              8
#define IRQ_VECTOR_WDT_AC97          9
#define IRQ_VECTOR_TIMER0           10
#define IRQ_VECTOR_TIMER1           11
#define IRQ_VECTOR_TIMER2           12
#define IRQ_VECTOR_TIMER3           13
#define IRQ_VECTOR_TIMER4           14
#define IRQ_VECTOR_UART2            15
#define IRQ_VECTOR_LCD              16
#define IRQ_VECTOR_DMA0             17
#define IRQ_VECTOR_DMA1             18
#define IRQ_VECTOR_DMA2             19
#define IRQ_VECTOR_DMA3             20
#define IRQ_VECTOR_SDI              21
#define IRQ_VECTOR_SPI0             22
#define IRQ_VECTOR_UART1            23
#define IRQ_VECTOR_NFCON            24
#define IRQ_VECTOR_USBD             25
#define IRQ_VECTOR_USBH             26
#define IRQ_VECTOR_IIC              27
#define IRQ_VECTOR_UART0            28
#define IRQ_VECTOR_SPI1             29
#define IRQ_VECTOR_RTC              30
#define IRQ_VECTOR_ADC              31
        
        
/*-----------------------------------------------------------------------------
                    LCD CONTROLLER SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define LCD_BASE    0x4D000000
#define	LCDCON1     (*(volatile unsigned *)LCD_BASE)          /* LCD Control 1 Register */
#define	LCDCON2     (*(volatile unsigned *)(LCD_BASE + 0x04)) /* LCD Control 2 Register */
#define	LCDCON3     (*(volatile unsigned *)(LCD_BASE + 0x08)) /* LCD Control 3 Register */
#define	LCDCON4     (*(volatile unsigned *)(LCD_BASE + 0x0c)) /* LCD Control 4 Register */
#define	LCDCON5     (*(volatile unsigned *)(LCD_BASE + 0x10)) /* LCD Control 5 Register */
#define	LCDSADDR1   (*(volatile unsigned *)(LCD_BASE + 0x14)) /* FRAME BUFFER START ADDRESS 1 REGISTER */
#define	LCDSADDR2   (*(volatile unsigned *)(LCD_BASE + 0x18)) /* FRAME Buffer Start Address 2 Register */
#define	LCDSADDR3   (*(volatile unsigned *)(LCD_BASE + 0x1c)) /* FRAME Buffer Start Address 3 Register */
#define	REDLUT      (*(volatile unsigned *)(LCD_BASE + 0x20)) /* RED Lookup Table Register */
#define	GREENLUT    (*(volatile unsigned *)(LCD_BASE + 0x24)) /* GREEN Lookup Table Register */
#define	BLUELUT     (*(volatile unsigned *)(LCD_BASE + 0x28)) /* BLUE Lookup Table Register */
#define	DITHMODE    (*(volatile unsigned *)(LCD_BASE + 0x4c)) /* Dithering Mode Register */
#define	TPAL        (*(volatile unsigned *)(LCD_BASE + 0x50)) /* Temp Palette Register */
#define	LCDINTPND   (*(volatile unsigned *)(LCD_BASE + 0x54)) /* LCD Interrupt Pending Register */
#define	LCDSRCPND   (*(volatile unsigned *)(LCD_BASE + 0x58)) /* LCD Source Pending Register */
#define	LCDINTMSK   (*(volatile unsigned *)(LCD_BASE + 0x5c)) /* LCD Interrupt Mask Register */
#define	TCONSEL     (*(volatile unsigned *)(LCD_BASE + 0x60)) /* TCON Control Register */



/*-----------------------------------------------------------------------------
                    REAL TIME CLOCK SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define RTC_BASE    0x57000000
#define	RTCCON      (*(volatile unsigned char *)(RTC_BASE + 0x40)) /* RTC control register */
#define	TICNT       (*(volatile unsigned char *)(RTC_BASE + 0x44)) /* Tick time count register */
#define	RTCALM      (*(volatile unsigned char *)(RTC_BASE + 0x50)) /* RTC alarm control register */
#define	ALMSEC      (*(volatile unsigned char *)(RTC_BASE + 0x54)) /* Alarm second data register */
#define	ALMMIN      (*(volatile unsigned char *)(RTC_BASE + 0x58)) /* Alarm minute data register */
#define	ALMHOUR     (*(volatile unsigned char *)(RTC_BASE + 0x5C)) /* Alarm hour data register */
#define	ALMDATE     (*(volatile unsigned char *)(RTC_BASE + 0x60)) /* Alarm date data register */
#define	ALMMON      (*(volatile unsigned char *)(RTC_BASE + 0x64)) /* Alarm month data register */
#define	ALMYEAR     (*(volatile unsigned char *)(RTC_BASE + 0x68)) /* Alarm year data register */
#define	BCDSEC      (*(volatile unsigned char *)(RTC_BASE + 0x70)) /* BCD second register */
#define	BCDMIN      (*(volatile unsigned char *)(RTC_BASE + 0x74)) /* BCD minute register */
#define	BCDHOUR     (*(volatile unsigned char *)(RTC_BASE + 0x78)) /* BCD hour register */
#define	BCDDATE     (*(volatile unsigned char *)(RTC_BASE + 0x7C)) /* BCD date register */
#define	BCDDAY      (*(volatile unsigned char *)(RTC_BASE + 0x80)) /* BCD a day of the week register */
#define	BCDMON      (*(volatile unsigned char *)(RTC_BASE + 0x84)) /* BCD month register */
#define	BCDYEAR     (*(volatile unsigned char *)(RTC_BASE + 0x88)) /* BCD year register */

/* date time data struct, use BCD code */
typedef struct DATE_TIME {
	unsigned char second;        /* second */
	unsigned char minute;        /* minute */
	unsigned char hour;          /* hour   */
	unsigned char day;           /* day    */
	unsigned char week;          /* week   */
	unsigned char month;         /* month  */
	unsigned char year;          /* year   */
} TDATE_TIME, *pDATE_TIME;

/* RTC value type */
typedef enum RTC_TYPE 
{
	RTC_SECOND = 2,	   
	RTC_MINUTE,