📄 common.c
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#ifdef CPU_ATmega128
u16 SRAM_Test(void)
{
u8 j;
register u16 i;
register u8 b;
register u8 *p;
for (j = 0; j < 8; j++) // do it 16 times
{
Reset_WD();
// fill the ram up with data
p = &SRAM;
b = j;
SRAM_Enable;
for (i = 0; i < 32768; i++) *p++ = b--;
SRAM_Disable;
Reset_WD();
// now see if the data is as should be
p = &SRAM;
b = j;
SRAM_Enable;
for (i = 0; i < 32768; i++)
{
if (*p++ != b--)
{
SRAM_Disable;
Reset_WD();
return i; // return the bad address
}
}
SRAM_Disable;
Reset_WD();
}
return 0xffff; // past it's test
}
#endif
// *********************************************************************************
u32 htonl(u32 hostlong)
{
#ifdef CPU_ATmega128
return ByteSwap4(hostlong);
#else
return hostlong;
#endif
}
u16 htons(u16 hostshort)
{
#ifdef CPU_ATmega128
return ByteSwap2(hostshort);
#else
return hostshort;
#endif
}
u32 ntohl(u32 netlong)
{
return htonl(netlong);
}
u16 ntohs(u16 netshort)
{
return htons(netshort);
}
// *********************************************************************************
// convert an IP into a string
int IP_Str(char *buf, u32 IP)
{
T_IP_Addr ip;
if (!buf) return 0;
ip.ip32 = IP;
return sprintf(buf, "%u.%u.%u.%u", ip.ip8[0], ip.ip8[1], ip.ip8[2], ip.ip8[3]);
}
// *********************************************************************************
// Work out how many bytes are free in a RING BUFFER.
// We must always leave 1 free byte for a ring buffer to work
int RingBufBytesFree(int BufSize, int Rd, int Wr)
{
if (BufSize <= 0) return 0; // doh!
while (Rd >= BufSize) Rd -= BufSize; // rap around
while (Wr >= BufSize) Wr -= BufSize; // " "
if (Wr == Rd) return BufSize - 1; // buffer is empty
while (Wr > Rd) Wr -= BufSize; //
return (Rd - Wr) - 1; // number of bytes free
}
// *********************************************************************************
// Work out how many bytes are present in a RING BUFFER.
int RingBufBytes(int BufSize, int Rd, int Wr)
{
if (BufSize <= 0) return 0; // doh!
while (Rd >= BufSize) Rd -= BufSize; // rap around
while (Wr >= BufSize) Wr -= BufSize; // " "
if (Wr == Rd) return 0; // buffer is empty
while (Wr < Rd) Wr += BufSize; //
return Wr - Rd; // number of bytes present
}
// *********************************************************************************
// flash (rom) stuff
int rstrlen(RomChar *s)
{ // return the length of a string in rom
int len = 0;
if (s)
{
for (; *s; s++) len++;
}
return len;
}
void rstrcpy(char *dest, RomChar *src)
{ // copy a flash (rom) string into data memory
if (!dest) return; // tut tut
if (src)
{
for (; *src; ) *dest++ = *src++;
}
*dest = 0; // null terminate it
}
void rmemcpy(char *dest, RomChar *src, int len)
{ // copy a block of data from flash (rom) into data memory
if (!dest) return;
if (!src) return;
for (; len; len--) *dest++ = *src++;
}
// *********************************************************************************
// SPI stuff
void SPI_Init(void)
{ // setup the spi
#ifdef CPU_eZ8
// PCAF = 0x3c; // Enable Port C for SPI functions
// PCADDR = 0; // protect sub registers
// SPICTL = PHASE_ONE | MMEN_MASTER | SPI_ENABLE; // SCK Phase One, SPI Master, SPI enable,
// CLK Polarity=0->falling edge for internal strobe
// SPIMODE = SSIO_OUTPUT; // SS pin select as an output, SS pin low
// SPIBRH = 0x00; // BRG High
// SPIBRL = 0x9c; // BRG Low
asm("nop");
#endif
#ifdef CPU_ATmega128
// SPI initialisation
// clock rate: 3686400hz (with 7.3728Mhz xtal)
SPCR = 0; // disable SPI
SPSR = (1 << SPI2X); // 2X
SPCR = (1 << SPE) | (1 << MSTR); // enable SPI ... no interrupt, SPI enable, MSB 1st, Master mode, Fosc/2
// SPDR = 0x55; // sends a 0x55 byte out the spi
// while (bit_is_clr(SPSR, SPIF)); // wait for transmission to finish
// c = SPDR; // this is needed
// SPDR = 0; // write a dummy byte - this is to generate the SCK for reading
// while (bit_is_clr(SPSR, SPIF)); // wait for rx byte to arrive
// c = SPDR; // reads a rx'ed byte
#endif
}
u8 SPI_TxRxByte(u8 o)
{ // send and receive bytes to/from the spi
u8 i; //
#ifdef CPU_eZ8
i = 0;
#endif
#ifdef CPU_ATmega128
SPDR = o; // send byte down spi
while (!(SPSR & (1<<SPIF))); // wait for byte to go
i = SPDR; // get byte from spi
#endif
return i; // return byte got
}
// *********************************************************************************
// uart stuff
#ifdef CPU_eZ8
void InitUart(char port, unsigned long baud)
{
unsigned long brg;
// calculate the divider value
brg = MainClk / (baud * 16);
switch (port)
{
case UART0 : // set the baud-rate generater
U0BRH = brg >> 8;
U0BRL = brg & 0xFF;
// configure GPIO for alternate function
PAAF |= 0x30; // enable the UART0 Rx/Tx with the AF register
PAADDR = 0; // clear to protect sub-regiters
// configure UART control register 1
U0CTL1 = 0x00; // clear for normal non-Multiprocessor operation
// configure UART control register 1
U0CTL0 = 0xc0; // Transmit enable, Receive Enable, No Parity, 1 Stop
break;
case UART1 : // set the baud-rate generater
U1BRH = brg >> 8;
U1BRL = brg & 0xFF;
// configure GPIO for alternate function
PDAF |= 0x30; // enable the UART1 Rx/Tx with the AF register
PDADDR = 0; // clear to protect sub-regiters
// configure UART control register 1
U1CTL1 = 0x00; // clear for normal non-Multiprocessor operation
// configure UART control register 1
U1CTL0 = 0xc0; // Transmit enable, Receive Enable, No Parity, 1 Stop
break;
}
}
#endif
#ifdef CPU_ATmega128
void InitUart(char port, unsigned long baud)
{
u16 brg;
// calculate the divider value
brg = (MainClk / (baud * 8)) - 1; // double speed formula
switch (port)
{
case UART0 : // 8-bit 1-stop no-parity async ... 7 = 115200 baud
UCSR0B = 0; // disable while setting it up
UBRR0H = (u8)(brg >> 8); // set baud rate hi
UBRR0L = (u8)(brg & 0xff); // set baud rate lo
UCSR0A = (1<<U2X0); // double speed
UCSR0C = (1<<UCSZ00)|(1<<UCSZ01)|(1<<UCSZ00); // 8-bit 1-stop
UCSR0B = (1<<RXCIE0)|(1<<RXEN0)|(1<<TXEN0); // enable Tx/Rx
break;
case UART1 : // 8-bit 1-stop no-parity async .. 47 = 19200 baud
UCSR1B = 0; // disable while setting baud rate
UBRR1H = (u8)(brg >> 8); //set baud rate hi
UBRR1L = (u8)(brg & 0xff); //set baud rate lo
UCSR1A = (1<<U2X1); // double speed
UCSR1C = (1<<UCSZ10)|(1<<UCSZ11)|(1<<UCSZ10); // 8-bit 1-stop
UCSR1B = (1<<RXCIE1)|(1<<RXEN1)|(1<<TXEN1); // enable Tx/Rx
break;
}
}
#endif
bool SendUartByte(char c, char Uart)
{ // send a byte down a uart
u16 UART_TimeOut = 10000;
switch (Uart)
{
case UART0 : while (true)
{
UART_TimeOut--;
if (!UART_TimeOut) return false; // timed out
#ifdef ConsoleHandShaking
if (CTS0) continue; // other end not yet ready
#endif
#ifdef CPU_eZ8
if (U0STAT0 & 0x04) break; // clear to send another byte
#endif
#ifdef CPU_ATmega128
if (UCSR0A & (1 << UDRE0)) break; // clear to send another byte
#endif
}
#ifdef CPU_eZ8
U0D = c; // Send byte
#endif
#ifdef CPU_ATmega128
UDR0 = c; // Send byte
#endif
break;
case UART1 : while (true)
{
UART_TimeOut--;
if (!UART_TimeOut) return false; // timed out
#ifdef ModemHandShaking
if (CTS1) continue; // other end not yet ready
#endif
#ifdef CPU_eZ8
if (U1STAT0 & 0x04) break; // clear to send another byte
#endif
#ifdef CPU_ATmega128
if (UCSR1A & (1 << UDRE1)) break; // clear to send another byte
#endif
}
#ifdef CPU_eZ8
U1D = c; // Send byte
#endif
#ifdef CPU_ATmega128
UDR1 = c; // Send byte
#endif
break;
default : return false; //
}
return true;
}
void HardwareFlowControl(char Uart)
{ // do some hardware flow control - ie, set their CTS line accordingly
int i;
switch (Uart)
{
case UART0 : i = RingBufBytesFree(sizeof(UART0_RxBuffer), UART0_RxBufferRd, UART0_RxBufferWr); // work out how many bytes we have free in our buffer
if (i > 18) // this value seems to have to be at least as big as the fifo buffer on the pc's uart
RTS0_OK; // we're ok to rx more data
else //
RTS0_STOP; // tell em to stop sending data
break; //
case UART1 : i = RingBufBytesFree(sizeof(UART1_RxBuffer), UART1_RxBufferRd, UART1_RxBufferWr); // work out how many bytes we have free in our buffer
if (i > 18) // this value seems to have to be at least as big as the fifo buffer on the pc's uart
RTS1_OK; // we're ok to rx more data
else //
RTS1_STOP; // tell em to stop sending data
break;
}
}
bool SendUartStr(char *s, char Uart)
{ // Send a string down a uart
char c;
if (!s) return true;
for (;*s;)
{
c = *s++;
if (c == '\n')
{ // insert a CR (\r) before the LF (\n)
if (!SendUartByte('\r', Uart)) return false; // Send byte
}
if (!SendUartByte(c, Uart)) return false; // Send byte
}
return true;
}
bool SendUartRStr(RomChar *s, char Uart)
{ // send a string from rom
char c;
if (!s) return true;
for (;*s;)
{
c = *s++;
if (c == '\n')
{ // insert a CR (\r) before the LF (\n)
if (!SendUartByte('\r', Uart)) return false; // Send byte
}
if (!SendUartByte(c, Uart)) return false; // Send byte
}
return true;
}
bool SendUartData(char *s, u16 len, char Uart)
{ // Send data down a uart
char c;
if (!s) return true;
for (; len; len--)
{
c = *s++;
if (!SendUartByte(c, Uart)) return false; // Send byte
}
return true;
}
bool SendConsoleByte(char c)
{ // send a byte
return SendUartByte(c, ConsoleUart);
}
bool SendConsoleStr(char *s)
{ // send a string from ram
return SendUartStr(s, ConsoleUart);
}
bool SendConsoleRStr(RomChar *s)
{ // send a string from rom
return SendUartRStr(s, ConsoleUart);
}
bool SendConsoleData(char *d, u16 len)
{ // send data from ram
return SendUartData(d, len, ConsoleUart);
}
#ifdef Debug
bool SendDebugByte(char c)
{ // send a byte
if (!(Flags1 & (1<<Flags1_Debug))) return true; // don't bother with debug unless the debug flag is set
return SendUartByte(c, ConsoleUart);
}
bool SendDebugStr(char *s)
{ // send a string from ram
if (!(Flags1 & (1<<Flags1_Debug))) return true; // don't bother with debug unless the debug flag is set
return SendUartStr(s, ConsoleUart);
}
bool SendDebugRStr(RomChar *s)
{ // send a string from rom
if (!(Flags1 & (1<<Flags1_Debug))) return true; // don't bother with debug unless the debug flag is set
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