📄 drv_defs.h
字号:
#ifndef _DRV_DEFS_H_
#define _DRV_DEFS_H_
/*-----------------------------------------------------------------------------
DMA SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define DMA0_BASE 0x4B000000 /* DMA 0 registers base */
#define DISRC0 (*(volatile unsigned *)DMA0_BASE) /* DMA 0 initial source register */
#define DISRCC0 (*(volatile unsigned *)(DMA0_BASE + 0x04)) /* DMA 0 initial source control register */
#define DIDST0 (*(volatile unsigned *)(DMA0_BASE + 0x08)) /* DMA 0 initial destination register */
#define DIDSTC0 (*(volatile unsigned *)(DMA0_BASE + 0x0c)) /* DMA 0 initial destination control register */
#define DCON0 (*(volatile unsigned *)(DMA0_BASE + 0x10)) /* DMA 0 control register */
#define DSTAT0 (*(volatile unsigned *)(DMA0_BASE + 0x14)) /* DMA 0 count register */
#define DCSRC0 (*(volatile unsigned *)(DMA0_BASE + 0x18)) /* DMA 0 current source register */
#define DCDST0 (*(volatile unsigned *)(DMA0_BASE + 0x1c)) /* DMA 0 current destination register */
#define DMASKTRIG0 (*(volatile unsigned *)(DMA0_BASE + 0x20)) /* DMA 0 mask trigger register */
#define DMA1_BASE 0x4B000040 /* DMA 1 registers base */
#define DISRC1 (*(volatile unsigned *)DMA1_BASE) /* DMA 1 initial source register */
#define DISRCC1 (*(volatile unsigned *)(DMA1_BASE + 0x04)) /* DMA 1 initial source control register */
#define DIDST1 (*(volatile unsigned *)(DMA1_BASE + 0x08)) /* DMA 1 initial destination register */
#define DIDSTC1 (*(volatile unsigned *)(DMA1_BASE + 0x0c)) /* DMA 1 initial destination control register */
#define DCON1 (*(volatile unsigned *)(DMA1_BASE + 0x10)) /* DMA 1 control register */
#define DSTAT1 (*(volatile unsigned *)(DMA1_BASE + 0x14)) /* DMA 1 count register */
#define DCSRC1 (*(volatile unsigned *)(DMA1_BASE + 0x18)) /* DMA 1 current source register */
#define DCDST1 (*(volatile unsigned *)(DMA1_BASE + 0x1c)) /* DMA 1 current destination register */
#define DMASKTRIG1 (*(volatile unsigned *)(DMA1_BASE + 0x20)) /* DMA 1 mask trigger register */
#define DMA2_BASE 0x4B000080 /* DMA 2 registers base */
#define DISRC2 (*(volatile unsigned *)DMA2_BASE) /* DMA 2 initial source register */
#define DISRCC2 (*(volatile unsigned *)(DMA2_BASE + 0x04)) /* DMA 2 initial source control register */
#define DIDST2 (*(volatile unsigned *)(DMA2_BASE + 0x08)) /* DMA 2 initial destination register */
#define DIDSTC2 (*(volatile unsigned *)(DMA2_BASE + 0x0c)) /* DMA 2 initial destination control register */
#define DCON2 (*(volatile unsigned *)(DMA2_BASE + 0x10)) /* DMA 2 control register */
#define DSTAT2 (*(volatile unsigned *)(DMA2_BASE + 0x14)) /* DMA 2 count register */
#define DCSRC2 (*(volatile unsigned *)(DMA2_BASE + 0x18)) /* DMA 2 current source register */
#define DCDST2 (*(volatile unsigned *)(DMA2_BASE + 0x1c)) /* DMA 2 current destination register */
#define DMASKTRIG2 (*(volatile unsigned *)(DMA2_BASE + 0x20)) /* DMA 2 mask trigger register */
#define DMA3_BASE 0x4B0000C0 /* DMA 3 registers base */
#define DISRC3 (*(volatile unsigned *)DMA3_BASE) /* DMA 3 initial source register */
#define DISRCC3 (*(volatile unsigned *)(DMA3_BASE + 0x04)) /* DMA 3 initial source control register */
#define DIDST3 (*(volatile unsigned *)(DMA3_BASE + 0x08)) /* DMA 3 initial destination register */
#define DIDSTC3 (*(volatile unsigned *)(DMA3_BASE + 0x0c)) /* DMA 3 initial destination control register */
#define DCON3 (*(volatile unsigned *)(DMA3_BASE + 0x10)) /* DMA 3 control register */
#define DSTAT3 (*(volatile unsigned *)(DMA3_BASE + 0x14)) /* DMA 3 count register */
#define DCSRC3 (*(volatile unsigned *)(DMA3_BASE + 0x18)) /* DMA 3 current source register */
#define DCDST3 (*(volatile unsigned *)(DMA3_BASE + 0x1c)) /* DMA 3 current destination register */
#define DMASKTRIG3 (*(volatile unsigned *)(DMA3_BASE + 0x20)) /* DMA 3 mask trigger register */
/*-----------------------------------------------------------------------------
@_@ I/O PORT CONTROL SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define PORT_BASE 0x56000000
#define GPACON (*(volatile unsigned *)PORT_BASE) /* PORTA CONFIGURATION REGISTER */
#define GPADAT (*(volatile unsigned *)(PORT_BASE + 0x04)) /* PORT DATA REGISTER */
#define GPBCON (*(volatile unsigned *)(PORT_BASE + 0x10)) /* Configures the pins of port B */
#define GPBDAT (*(volatile unsigned *)(PORT_BASE + 0x14)) /* The data register for port B */
#define GPBUP (*(volatile unsigned *)(PORT_BASE + 0x18)) /* pull-up disable register for port B */
#define GPCCON (*(volatile unsigned *)(PORT_BASE + 0x20)) /* Configures the pins of port C */
#define GPCDAT (*(volatile unsigned *)(PORT_BASE + 0x24)) /* The data register for port C */
#define GPCUP (*(volatile unsigned *)(PORT_BASE + 0x28)) /* pull-up disable register for port C */
#define GPDCON (*(volatile unsigned *)(PORT_BASE + 0x30)) /* Configures the pins of port D */
#define GPDDAT (*(volatile unsigned *)(PORT_BASE + 0x34)) /* The data register for port D */
#define GPDUP (*(volatile unsigned *)(PORT_BASE + 0x38)) /* pull-up disable register for port D */
#define GPECON (*(volatile unsigned *)(PORT_BASE + 0x40)) /* Configures the pins of port E */
#define GPEDAT (*(volatile unsigned *)(PORT_BASE + 0x44)) /* The data register for port E */
#define GPEUP (*(volatile unsigned *)(PORT_BASE + 0x48)) /* pull-up disable register for port E */
#define GPFCON (*(volatile unsigned *)(PORT_BASE + 0x50)) /* Configures the pins of port F */
#define GPFDAT (*(volatile unsigned *)(PORT_BASE + 0x54)) /* The data register for port F */
#define GPFUP (*(volatile unsigned *)(PORT_BASE + 0x58)) /* pull-up disable register for port F */
#define GPGCON (*(volatile unsigned *)(PORT_BASE + 0x60)) /* Configures the pins of port G */
#define GPGDAT (*(volatile unsigned *)(PORT_BASE + 0x64)) /* The data register for port G */
#define GPGUP (*(volatile unsigned *)(PORT_BASE + 0x68)) /* pull-up disable register for port G */
#define GPHCON (*(volatile unsigned *)(PORT_BASE + 0x70)) /* Configures the pins of port H */
#define GPHDAT (*(volatile unsigned *)(PORT_BASE + 0x74)) /* The data register for port H */
#define GPHUP (*(volatile unsigned *)(PORT_BASE + 0x78)) /* pull-up disable register for port H */
#define MISCCR (*(volatile unsigned *)(PORT_BASE + 0x80)) /* Miscellaneous control register */
#define DCLKCON (*(volatile unsigned *)(PORT_BASE + 0x84)) /* DCLK0/1 Control Register */
#define EXTINT0 (*(volatile unsigned *)(PORT_BASE + 0x88)) /* External Interrupt control Register 0 */
#define EXTINT1 (*(volatile unsigned *)(PORT_BASE + 0x8C)) /* External Interrupt control Register 1 */
#define EXTINT2 (*(volatile unsigned *)(PORT_BASE + 0x90)) /* External Interrupt control Register 2 */
#define EINTFLT0 (*(volatile unsigned *)(PORT_BASE + 0x94)) /* External Interrupt Filter Register 2 */
#define EINTFLT1 (*(volatile unsigned *)(PORT_BASE + 0x98)) /* External Interrupt Filter Register 3 */
#define EINTFLT2 (*(volatile unsigned *)(PORT_BASE + 0x9C)) /* External Interrupt Filter Register 2 */
#define EINTFLT3 (*(volatile unsigned *)(PORT_BASE + 0xA0)) /* External Interrupt Filter Register 3 */
#define EINTMASK (*(volatile unsigned *)(PORT_BASE + 0xA4)) /* External interupt mask Register */
#define EINTPEND (*(volatile unsigned *)(PORT_BASE + 0xA8)) /* External interupt pending Register */
#define GSTATUS0 (*(volatile unsigned *)(PORT_BASE + 0xAC)) /* External pin status */
#define GSTATUS1 (*(volatile unsigned *)(PORT_BASE + 0xB0)) /* Chip ID */
#define GSTATUS2 (*(volatile unsigned *)(PORT_BASE + 0xB4)) /* Reset Status */
#define GSTATUS3 (*(volatile unsigned *)(PORT_BASE + 0xB8)) /* Inform register */
#define GSTATUS4 (*(volatile unsigned *)(PORT_BASE + 0xBC)) /* Inform register */
/*-----------------------------------------------------------------------------
I/O PORT READ/WRITE MACROS
------------------------------------------------------------------------------*/
/* GPIOA */
#define gpio_a_ctrl(pnum,mode) do{\
GPACON &= ~(0x1 << pnum);\
GPACON |= (mode << pnum);}while(0)
#define set_gpio_a(pnum) GPADAT |= (1<<pnum)
#define clr_gpio_a(pnum) GPADAT &= ~(1<<pnum)
/* GPIOB */
#define gpio_b_ctrl(pnum,mode,pullup) do{\
GPBCON &= ~(0x3 << (pnum * 2));\
GPBCON |= (mode << (pnum * 2));\
GPBUP &= ~(0x1 << pnum);\
GPBUP |= (pullup << pnum);}while(0)
#define set_gpio_b(pnum) GPBDAT |= (1<<pnum)
#define clr_gpio_b(pnum) GPBDAT &= ~(1<<pnum)
/* GPIOC */
#define gpio_c_ctrl(pnum,mode,pullup) do{\
GPCCON &= ~(0x3 << (pnum * 2));\
GPCCON |= (mode << (pnum * 2));\
GPCUP &= ~(0x1 << pnum);\
GPCUP |= (pullup << pnum);}while(0)
#define set_gpio_c(pnum) GPCDAT |= (1<<pnum)
#define clr_gpio_c(pnum) GPCDAT &= ~(1<<pnum)
/* GPIOD */
#define gpio_d_ctrl(pnum,mode,pullup) do{\
GPDCON &= ~(0x3 << (pnum * 2));\
GPDCON |= (mode << (pnum * 2));\
GPDUP &= ~(0x1 << pnum);\
GPDUP |= (pullup << pnum);}while(0)
#define set_gpio_d(pnum) GPDDAT |= (1<<pnum)
#define clr_gpio_d(pnum) GPDDAT &= ~(1<<pnum)
/* GPIOE */
#define gpio_e_ctrl(pnum,mode,pullup) do{\
GPECON &= ~(0x3 << (pnum * 2));\
GPECON |= (mode << (pnum * 2));\
GPEUP &= ~(0x1 << pnum);\
GPEUP |= (pullup << pnum);}while(0)
#define set_gpio_e(pnum) GPEDAT |= (1<<pnum)
#define clr_gpio_e(pnum) GPEDAT &= ~(1<<pnum)
/* GPIOF */
#define gpio_f_ctrl(pnum,mode,pullup) do{\
GPFCON &= ~(0x3 << (pnum * 2));\
GPFCON |= (mode << (pnum * 2));\
GPFUP &= ~(0x1 << pnum);\
GPFUP |= (pullup << pnum);}while(0)
#define set_gpio_f(pnum) GPFDAT |= (1<<pnum)
#define clr_gpio_f(pnum) GPFDAT &= ~(1<<pnum)
/* GPIOG */
#define gpio_g_ctrl(pnum,mode,pullup) do{\
GPGCON &= ~(0x3 << (pnum * 2));\
GPGCON |= (mode << (pnum * 2));\
GPGUP &= ~(0x1 << pnum);\
GPGUP |= (pullup << pnum);}while(0)
#define set_gpio_g(pnum) GPGDAT |= (1<<pnum)
#define clr_gpio_g(pnum) GPGDAT &= ~(1<<pnum)
/* GPIOH */
#define gpio_h_ctrl(pnum,mode,pullup) do{\
GPHCON &= ~(0x3 << (pnum * 2));\
GPHCON |= (mode << (pnum * 2));\
GPHUP &= ~(0x1 << pnum);\
GPHUP |= (pullup << pnum);}while(0)
#define set_gpio_h(pnum) GPHDAT |= (1<<pnum)
#define clr_gpio_h(pnum) GPHDAT &= ~(1<<pnum)
/* Input contact record status */
typedef enum _MIC_SPEAK
{
MS_DEFAULT = 0, /* on hook status */
MS_VOICE_HANDSET, /* voice call use handset */
MS_VOICE_HANDFREE, /* voice call hand free */
MS_VIDEO_HANDSET, /* video call use handset */
MS_VIDEO_HANDFREE, /* video call hand free */
MS_SPK_HANDSET, /* handset speaker, used when playing */
MS_SPK_HANDFREE, /* handfree speaker, used when playing */
MS_MIC_HANDSET, /* handset mic, used when recording */
MS_MIC_HANDFREE, /* handfree mic, used when recording */
} TMIC_SPEAK;
/*-----------------------------------------------------------------------------
@_@ UART SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define UART0_BASE 0x50000000 /* UART0 registers base */
#define ULCON0 (*(volatile unsigned *)UART0_BASE) /* UART LINE CONTROL REGISTER */
#define UCON0 (*(volatile unsigned *)(UART0_BASE + 0x04)) /* UART CONTROL REGISTER */
#define UFCON0 (*(volatile unsigned *)(UART0_BASE + 0x08)) /* UART FIFO CONTROL REGISTER */
#define UMCON0 (*(volatile unsigned *)(UART0_BASE + 0x0c)) /* UART MODEM CONTROL REGISTER */
#define UTRSTAT0 (*(volatile unsigned *)(UART0_BASE + 0x10)) /* UART TX/RX STATUS REGISTER */
#define UERSTAT0 (*(volatile unsigned *)(UART0_BASE + 0x14)) /* UART ERROR STATUS REGISTER */
#define UFSTAT0 (*(volatile unsigned *)(UART0_BASE + 0x18)) /* UART FIFO STATUS REGISTER */
#define UMSTAT0 (*(volatile unsigned *)(UART0_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define UTXH0 (*(volatile unsigned char *)(UART0_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define URXH0 (*(volatile unsigned char *)(UART0_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define UBRDIV0 (*(volatile unsigned *)(UART0_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */
#define UART1_BASE 0x50004000 /* UART1 registers base */
#define ULCON1 (*(volatile unsigned *)UART1_BASE) /* UART LINE CONTROL REGISTER */
#define UCON1 (*(volatile unsigned *)(UART1_BASE + 0x04)) /* UART CONTROL REGISTER */
#define UFCON1 (*(volatile unsigned *)(UART1_BASE + 0x08)) /* UART FIFO CONTROL REGISTER */
#define UMCON1 (*(volatile unsigned *)(UART1_BASE + 0x0c)) /* UART MODEM CONTROL REGISTER */
#define UTRSTAT1 (*(volatile unsigned *)(UART1_BASE + 0x10)) /* UART TX/RX STATUS REGISTER */
#define UERSTAT1 (*(volatile unsigned *)(UART1_BASE + 0x14)) /* UART ERROR STATUS REGISTER */
#define UFSTAT1 (*(volatile unsigned *)(UART1_BASE + 0x18)) /* UART FIFO STATUS REGISTER */
#define UMSTAT1 (*(volatile unsigned *)(UART1_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define UTXH1 (*(volatile unsigned char *)(UART1_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define URXH1 (*(volatile unsigned char *)(UART1_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define UBRDIV1 (*(volatile unsigned *)(UART1_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */
#define UART2_BASE 0x50008000 /* UART2 registers base */
#define ULCON2 (*(volatile unsigned *)UART2_BASE) /* UART LINE CONTROL REGISTER */
#define UCON2 (*(volatile unsigned *)(UART2_BASE + 0x04)) /* UART CONTROL REGISTER */
#define UFCON2 (*(volatile unsigned *)(UART2_BASE + 0x08)) /* UART FIFO CONTROL REGISTER */
#define UMCON2 (*(volatile unsigned *)(UART2_BASE + 0x0c)) /* UART MODEM CONTROL REGISTER */
#define UTRSTAT2 (*(volatile unsigned *)(UART2_BASE + 0x10)) /* UART TX/RX STATUS REGISTER */
#define UERSTAT2 (*(volatile unsigned *)(UART2_BASE + 0x14)) /* UART ERROR STATUS REGISTER */
#define UFSTAT2 (*(volatile unsigned *)(UART2_BASE + 0x18)) /* UART FIFO STATUS REGISTER */
#define UMSTAT2 (*(volatile unsigned *)(UART2_BASE + 0x1c)) /* UART MODEM STATUS REGISTER */
#define UTXH2 (*(volatile unsigned char *)(UART2_BASE + 0x20)) /* UART TRANSMIT BUFFER REGISTER */
#define URXH2 (*(volatile unsigned char *)(UART2_BASE + 0x24)) /* UART RECEIVE BUFFER REGISTER */
#define UBRDIV2 (*(volatile unsigned *)(UART2_BASE + 0x28)) /* UART BAUD RATE DIVISOR REGISTER */
/*-----------------------------------------------------------------------------
USB DEVICE CONTROLLER SPECIAL REGISTERS
------------------------------------------------------------------------------*/
#define USBD_BASE 0x52000000 /* USB Device registers base */
#define FUNC_ADDR_REG (*(volatile unsigned char *)(USBD_BASE + 0x140)) /* Function address */
#define PWR_REG (*(volatile unsigned char *)(USBD_BASE + 0x144)) /* Power management register */
#define EP_INT_REG (*(volatile unsigned char *)(USBD_BASE + 0x148)) /* EP interrupt pending/clear register */
#define USB_INT_REG (*(volatile unsigned char *)(USBD_BASE + 0x158)) /* USB interrupt pending/clear register */
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -