mx21_defs.s

基于Freescale的MX21处理器的bootloader程序

;************************************************************************
;************************************************************************
;*  Name: MX21_defs.s
;*  Description: MC9328MX21 Register definition
;*  Author: wyf
;*  Date: 2006.07.11
;************************************************************************
;************************************************************************

;**********************************
;* Arm mode                       *
;**********************************
Mode_MASK       EQU     0x1F
Mode_USR        EQU     0x10
Mode_FIQ        EQU     0x11
Mode_IRQ        EQU     0x12
Mode_SVC        EQU     0x13
Mode_ABT        EQU     0x17
Mode_UND        EQU     0x1B
Mode_SYS        EQU     0x1F ; available on ARM Arch 4 and later
I_Bit           EQU     0x80 ; when I bit is set, IRQ is disabled
F_Bit           EQU     0x40 ; when F bit is set, FIQ is disabled

;**********************************
;* CP15                           *
;**********************************

CB              EQU     0xc

;**********************************
;* PLL Module                     *
;**********************************
CSCR          EQU  0x10027000  ; Clock Source Control Register
MPCTL0        EQU  0x10027004  ; MPLL Control Register 0
MPCTL1        EQU  0x10027008  ; MPLL Control Register 1
SPCTL0        EQU  0x1002700c  ; SPLL Control Register 0
SPCTL1        EQU  0x10027010  ; SPLL Control Register 1
OSC26MCTL     EQU  0x10027014  ; Oscillator 26M Register
PCDR0         EQU  0x10027018  ; Peripheral Clock Divider Register 0
PCDR1         EQU  0x1002701c  ; Peripheral Clock Divider Register 1
PCCR0         EQU  0x10027020  ; Peripheral Clock Control Register 0
PCCR1         EQU  0x10027024  ; Peripheral Clock Control Register 1
CCSR          EQU  0x10027028  ; Clock Control Status Register
PMCTL         EQU  0x1002702c  ; PMOS Switch Control Register
PMCOUNT       EQU  0x10027030  ; PMOS Switch Counter Register
WKGDCTL       EQU  0x10027034  ; Wakeup Guard Mode Control Register

;**********************************
;* AITC (interrupt)Control Module *
;**********************************
INTCNTL       EQU  0x10040000
NIMASK        EQU  0x10040004
INTENNUM      EQU  0x10040008
INTDISNUM     EQU  0x1004000c
INTENABLEH    EQU  0x10040010
INTENABLEL    EQU  0x10040014
INTTYPEH      EQU  0x10040018
INTTYPEL      EQU  0x1004001c
NIPRIORITY7   EQU  0x10040020
NIPRIORITY6   EQU  0x10040024
NIPRIORITY5   EQU  0x10040028
NIPRIORITY4   EQU  0x1004002c
NIPRIORITY3   EQU  0x10040030
NIPRIORITY2   EQU  0x10040034
NIPRIORITY1   EQU  0x10040038
NIPRIORITY0   EQU  0x1004003c
NIVECSR       EQU  0x10040040
FIVECSR       EQU  0x10040044
INTSRCH       EQU  0x10040048
INTSRCL       EQU  0x1004004c
INTFRCH       EQU  0x10040050
INTFRCL       EQU  0x10040054
NIPNDH        EQU  0x10040058
NIPNDL        EQU  0x1004005c
FIPNDH        EQU  0x10040060
FIPNDL        EQU  0x10040064

;**********************************
;* General Propose Timer Module   *
;**********************************
TCTL1         EQU  0x10003000
TCTL2         EQU  0x10004000
TCTL3         EQU  0x10005000
TPRER1        EQU  0x10003004
TPRER2        EQU  0x10004004
TPRER3        EQU  0x10005004
TCMP1         EQU  0x10003008
TCMP2         EQU  0x10004008
TCMP3         EQU  0x10005008
TCR1          EQU  0x1000300c
TCR2          EQU  0x1000400c
TCR3          EQU  0x1000500c
TCN1          EQU  0x10003010
TCN2          EQU  0x10004010
TCN3          EQU  0x10005010
TSTAT1        EQU  0x10003014
TSTAT2        EQU  0x10004014
TSTAT3        EQU  0x10005014

;**********************************
;* Multilayer AHP Crossbar Module    *
;**********************************
MPR0          EQU  0x1003f000  ; 
MPR1          EQU  0x1003f100  ; 
MPR2          EQU  0x1003f200  ; 
MPR3          EQU  0x1003f300  ; 

;**********************************
;* SDRAM Memory Control Module    *
;**********************************
SDCTL0        EQU  0xdf000000  ; Sdram 0 Control Register
SDCTL1        EQU  0xdf000004  ; Sdram 1 Control Register
SDRST         EQU  0xdf000018  ; Sdram Reset Register
MISCELLANEOUS EQU  0xdf000014  ; Miscellaneous Register

;**********************************
;* External Interface Module      *
;**********************************
CS0U          EQU  0xdf001000
CS0L          EQU  0xdf001004
CS1U          EQU  0xdf001008
CS1L          EQU  0xdf00100c
CS2U          EQU  0xdf001010
CS2L          EQU  0xdf001014
CS3U          EQU  0xdf001018
CS3L          EQU  0xdf00101c
CS4U          EQU  0xdf001020
CS4L          EQU  0xdf001024
CS5U          EQU  0xdf001028
CS5L          EQU  0xdf00102c
EIM_CNF       EQU  0xdf001030



	END