📄 drv_flash.c
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//
//
// Parameters: U32 sAddress start address for read
// void* pData data to read
// U32 nData number of bytes to read
//
// Return Value: U32 ?
//
// ***************************************************************************
#if 0
// ***************************************************************************
// function implementations
// ***************************************************************************
// ***************************************************************************
//
// Function: FlashConfigBurst
//
// This function configures the flash burst mode parameters.
//
// Parameters: BOOL bBurstMode burst mode on/off
// BOOL bRisingClock use rising CLK edge?
// BOOL bEarlyReady RDY one CLK before data?
// U32 nWaitStates wait states (2..7)
// U32 sAddress base Address of the Flash
//
// Return Value: void
// BOOL fBurst Burst Mode Status
// (True - Sync | False - Async)
//
// ***************************************************************************
void FlashConfigBurst(int bBurstMode,
int bRisingClock,
int bEarlyReady,
u32 nClk,
u32 sAddress)
{
volatile u32* pBase;
u32 nAddr;
u32 fWsc;
u32 nTiacc = TIACC;
// Calculate Configuration Register address based on mode
// ******************************************************
if (bBurstMode)
{
fWsc = (((TIACC +10) * nClk + 999) / 1000);
nAddr = (0 << 19) | // synchronous mode
((bEarlyReady ? 0 : 1) << 18) | // RDY one CLK before?
((bRisingClock ? 1 : 0) << 17) | // CLK edge
(0 << 15) | // continuous mode
((fWsc - 2) << 12); // wait state bits
}
else
{
nAddr = (1 << 19) | // asynchronous mode
0x555; // fixed
}
// Reset flash devices before writing configuration sequence
// *********************************************************
pBase = (volatile u32*) sAddress;
*(pBase + 0x000) = 0x00f000f0;
*(pBase + 0x555) = 0x00aa00aa;
*(pBase + 0x2aa) = 0x00550055;
*(pBase + nAddr) = 0x00c000c0;
}
// ***************************************************************************
//
// Function: BoardControlBurstMode
//
// This function enabled or disables burst mode with the
// MX1 processor and with the memory.
//
// Parameters: BOOL bOnOff burst mode on/off
// U32 sAddress Base Address of the Flash
//
// Return Value: BOOL TRUE if successful, FALSE on error
//
// ***************************************************************************
int BoardControlBurstMode(int bOnOff, u32 sAddress)
{
//BOOL bResult;
u32 nWait;
u32 nCsHi;
u32 nCsLo;
u32 nWsc;
u32 nBcd = 0;
u32 nOea;
u32 nClk = 0;
if (bOnOff)
{
// Calculate MX1 burst clock divisor based on HCLK frequency and
// input memory clock frequency parameter. Adjust used memory clock.
// *************************************************************
nBcd = (HCLK + (FCLK - 1)) / FCLK;
nClk = (HCLK / nBcd);
// Calculate number of CLK cycles required for delaying by Tacc
// in Tclk increments.
// ************************************************************
nWsc = (((TIACC + 10) * HCLK + 999) / 1000);
nWait = MAX(MIN(((TIACC * FCLK + 999) / 1000), 7), 2);
// Enable OE only one half-clock before sampling data (one half
// clock plus first CLK plus wait states minus one half clock)
// ************************************************************
nOea = MIN((nWait + 1) * 2, 0x0f);
}
else
{
nWsc = ((TACC * HCLK + 999) / 1000) + 40;
nWait = 0;
}
// Configure burst mode with flash memory. Use the number of wait
// states calculated above. For this board, we use the rising CLK
// edge and configure the RDY pin to become active with the data.
// **************************************************************
FlashConfigBurst(bOnOff,TRUE,FALSE,nClk,sAddress);
// Configure burst mode with MX1 (chip select registers)
// *****************************************************
if (bOnOff)
{
// Chip select control register for synchronous mode
// *************************************************
nCsHi = (0 << (63 - 32)) | // DTACK_SEL
((nBcd - 1) << (60 - 32)) | // BCD
(0 << (56 - 32)) | // BCS
(0 << (54 - 32)) | // PSZ
(0 << (53 - 32)) | // PME
(1 << (52 - 32)) | // SYNC
(1 << (48 - 32)) | // DOL
(0 << (46 - 32)) | // CNC
((nWsc - 1) << (40 - 32)) | // WSC
(0 << (36 - 32)) | // WWS
(1 << (32 - 32)); // EDC
nCsLo = (nOea << 28) | // OEA
(0 << 24) | // OEN
(0 << 20) | // WEA
(0 << 16) | // WEN
(0 << 12) | // CSA
(1 << 11) | // EBC
(6 << 8) | // DSZ
(0 << 6) | // SP
(0 << 4) | // WP
(0 << 1) | // PA
(1 << 0); // CSEN
}
else
{
// Chip select control register for asynchronous mode
// **************************************************
nCsHi = (0 << (63 - 32)) | // DTACK_SEL
(0 << (60 - 32)) | // BCD
(0 << (56 - 32)) | // BCS
(0 << (54 - 32)) | // PSZ
(0 << (53 - 32)) | // PME
(0 << (52 - 32)) | // SYNC
(0 << (48 - 32)) | // DOL
(0 << (46 - 32)) | // CNC
((62) << (40 - 32)) | // WSC
//((nWsc - 1) << (40 - 32)) | // WSC
(0 << (36 - 32)) | // WWS
(0 << (32 - 32)); // EDC
//(1 << (32 - 32)); // EDC
nCsLo = (0 << 28) | // OEA
(0 << 24) | // OEN
(0 << 20) | // WEA
(0 << 16) | // WEN
(0 << 12) | // CSA
(0 << 11) | // EBC
// (1 << 11) | // EBC
(6 << 8) | // DSZ
(0 << 6) | // SP
(0 << 4) | // WP
(0 << 1) | // PA
(1 << 0); // CSEN
}
*(volatile u32*)WEIM_CS0U = nCsHi;
*(volatile u32*)WEIM_CS0L = nCsLo;
return bOnOff;
}
u32* FlashRead(u32 sAddress, u32* pData, u32 nData)
{
u32 nWalk;
u32 nAddress;
u32* dWalk;
u32* sWalk;
u32 i;
nWalk = sAddress;
nAddress = sAddress + nData;
dWalk = (u32*)sAddress;
sWalk = pData;
while (nWalk < nAddress){
i++;
if ((i & 0xFFFF) == 0){
printf("R");
}
*dWalk = *sWalk;
dWalk++;
sWalk++;
nWalk +=sizeof(*dWalk);
}
return (u32*)sAddress;
}
// ***************************************************************************
//
// Function: FlashVerify
//
//
//
// Parameters: U32 rAddress RAM starting address
// U32 fAddress Flash starting address to be verified
// U32 nWords number of words to check
//
// Return Value: U32 Errors number of programming errors
// in word
//
// ***************************************************************************
// ***************************************************************************
//
// Function: FlashLoader
//
//
//
// Parameters: U32 rAddress RAM starting address
// U32 fAddress Flash starting address to be programmmed
// U32 nWords number of words to write
//
// Return Value: void
//
// ***************************************************************************
void FlashLoader(U32 fAddress, U32 rAddress, U32 nWords)
{
U32 nAddress;
U32 Errors;
U32 HAB_Status;
// Status Code
U32 FlashComplete = 0x67676767;
U32 FlashTimeOut = 0x57575757;
U32 FlashError = 0x47474747;
#ifdef DEBUG
printf("\nStarting Flash Programming\n");
#endif
nAddress = fAddress + (nWords - 1) * sizeof(fAddress);
FlashSectorErase(fAddress,nAddress);
FlashWrite(fAddress, (U32*)rAddress, nWords);
Errors = FlashVerify(fAddress,rAddress,nWords);
if (Errors)
{
#ifdef DEBUG
printf("\nFlash Programming Error:\n");
printf("Total no. of Errors: %d words\n",Errors);
#else
CheckFlashComplete(FlashError);
#endif
}
else
{
#ifdef DEBUG
printf("\nFlash Programming Complete\n");
#else
CheckFlashComplete(FlashComplete);
#endif
}
return;
}
#endif
/*
// ***************************************************************************
//
// Function: FlashTest
// Fill the internal RAM with a test pattern and then the
// Flash Routine would copy this test pattern into the Flash
//
// Parameters: BOOL Burst BurstMode??
// U32 sAddress base address of the Flash
// U32 tPat test pattern
// U32 dSize data size in word
// U32 rAddress RAM start address
//
// Return Value: U32 ?
//
// ***************************************************************************
U32 FlashTest(BOOL Burst, U32 sAddress, U32 tPat, U32 dSize, U32 rAddress)
{
U32 nWalk;
U32* rWalk;
U32 dAddress;
U32 nError = 0;
rWalk = (U32*) rAddress;
nWalk = rAddress;
dAddress = rAddress + dSize;
// fill the RAM with the test pattern
//***********************************
while (nWalk < dAddress)
//for (nWalk = 1; nWalk <= dSize/4; nWalk++)
{
*rWalk = tPat;
rWalk++;
nWalk+=sizeof(*rWalk);
}
BoardControlBurstMode(Burst, sAddress);
FlashChipErase(sAddress);
// FlashSectorErase(0xC8000000, 0xC8001000);
// copy filled RAM into Flash
// **********************************
FlashWrite(sAddress, (void*)rAddress, dSize);
// Read the filled Flash and check for
// data integrity
// **********************************
FlashRead(dAddress, (U32*) sAddress, dSize);
for (nWalk = 1; nWalk <= dSize; nWalk++)
{
if (*(U32*)rAddress != *(U32*)dAddress)
{
nError++;
}
rAddress ++;
dAddress ++;
}
return nError;
}
// ***************************************************************************
//
// Function: Flash_Full_Test - 32Mbytes
// Fill the SDRAM with a test pattern and then the
// Flash Routine copy them from RAM into the Flash
//
// Parameters: BOOL Burst BurstMode??
//
// Return Value: U32 Success Test Pass/Fail
//
// ***************************************************************************
BOOL Flash_Full_Test(BOOL Burst)
{
U32 SourceAddress = 0xC2000000;
U32 TargetAddress = 0xC8000000;
U32 WordSize = 8*1024*1024;
U32 Testpat = 0x55AA55AA;
U32 Error = 0;
BOOL BurstOn = FALSE;
BOOL Success;
printf("\nFlash Full Test\n");
Memory_Fill_U32(SourceAddress,WordSize,Testpat);
// BoardControlBurstMode(BurstOn,TargetAddress);
FlashChipErase(TargetAddress);
FlashWrite(TargetAddress, (U32*)SourceAddress, WordSize);
Error = MemCheck_U32(TargetAddress,WordSize,Testpat);
printf("\nFlash Full Test Complete\n");
return Error ? FALSE:TRUE;
}
// ***************************************************************************
//
// Function: Flash_Quick_Test - 1Mbytes at each bank
// Fill the internal RAM with a test pattern and then the
// Flash Routine copy this test pattern into the Flash
//
// Parameters: BOOL Burst BurstMode??
//
// Return Value: U32 Success Test Pass/Fail
//
// ***************************************************************************
BOOL Flash_Quick_Test(BOOL BurstOn)
{
U32 SourceAddress = 0xC2000000;
U32 TargetAddress = 0xC8000000;
U32 Bank_one = TargetAddress;
U32 Bank_two = Bank_one + (8*4*1024+31*32*1024)*4;
U32 Bank_three = Bank_two + (96*32*1024)*4;
U32 Bank_four = Bank_three + (96*32*1024)*4;
U32 WordSize = 0x40000;
U32 Testpat = 0x55AA55AA;
U32 Error = 0;
U32 Total_errors = 0;
U32 i = 0;
printf("\nFlash Quick Test\n");
Memory_Fill_U32(SourceAddress,WordSize,Testpat);
// BoardControlBurstMode(BurstOn,TargetAddress);
for (i = 1;i <= 4; i++)
{
switch (i)
{
case (1):
printf("\nBank One of Flash Memory:\n");
FlashSectorErase(Bank_one, Bank_one + (4*WordSize));
printf("\nBlank Check at Bank one\n");
MemCheck_U32(Bank_one,WordSize,0xFFFFFFFF);
FlashWrite(Bank_one, (U32*)SourceAddress, WordSize);
Error = MemCheck_U32(Bank_one,WordSize,Testpat);
if (Error)
{
printf("Flash Memory fail at Bank 1\n");
}
else
{
printf("Flash Memory pass at Bank 1\n");
}
break;
case (2):
printf("\nBank Two of Flash Memory:\n");
FlashSectorErase(Bank_two, Bank_two + (4*WordSize));
printf("\nBlank Check at Bank two\n");
MemCheck_U32(Bank_two,WordSize,0xFFFFFFFF);
FlashWrite(Bank_two, (U32*)SourceAddress, WordSize);
Error = MemCheck_U32(Bank_two,WordSize,Testpat);
if (Error)
{
printf("Flash Memory fail at Bank 2\n");
}
else
{
printf("Flash Memory pass at Bank 2\n");
}
break;
case (3):
printf("\nBank Three of Flash Memory:\n");
FlashSectorErase(Bank_three, Bank_three + (4*WordSize));
printf("\nBlank Check at Bank three\n");
MemCheck_U32(Bank_three,WordSize,0xFFFFFFFF);
FlashWrite(Bank_three, (U32*)SourceAddress, WordSize);
Error = MemCheck_U32(Bank_three,WordSize,Testpat);
if (Error)
{
printf("Flash Memory fail at Bank 3\n");
}
else
{
printf("Flash Memory pass at Bank 3\n");
}
break;
case (4):
printf("\nBank Four of Flash Memory:\n");
FlashSectorErase(Bank_four, Bank_four + (4*WordSize));
printf("\nBlank Check at Bank four\n");
MemCheck_U32(Bank_four,WordSize,0xFFFFFFFF);
FlashWrite(Bank_four, (U32*)SourceAddress, WordSize);
Error = MemCheck_U32(Bank_four,WordSize,Testpat);
if (Error)
{
printf("Flash Memory fail at Bank 4\n");
}
else
{
printf("Flash Memory pass at Bank 4\n");
}
break;
}
Total_errors += Error * sizeof(Error);
}
if (Total_errors)
{
printf("\nFlash Quick Test Fail\n");
printf("Total no. of Errors is %dbytes\n", Total_errors);
}
else
{
printf("\nFlash Quick Test Complete\n");
}
return Total_errors ? FALSE:TRUE;
}*/
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