📄 bsp.c
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*
* Description : Get the status of the joystick.
*
* Argument(s) : none
*
* Return(s) : The return value indicates the direction currently indicated by the joystick:
*
* JOYSTICK_LEFT indicates the joystick is toggled LEFT
* JOYSTICK_RIGHT indicates the joystick is toggled RIGHT
* JOYSTICK_UP indicates the joystick is toggled UP
* JOYSTICK_DOWN indicates the joystick is toggled DOWN
* JOYSTICK_NONE indicates the joystick is NOT toggled
*********************************************************************************************************
*/
CPU_INT32U Joystick_GetStatus (void)
{
CPU_INT32U status;
status = JOYSTICK_NONE;
if ((AT91C_BASE_PIOB->PIO_PDSR & GPIOB_JOY_LEFT) == 0) {
status = JOYSTICK_LEFT;
} else if ((AT91C_BASE_PIOB->PIO_PDSR & GPIOB_JOY_RIGHT) == 0) {
status = JOYSTICK_RIGHT;
} else if ((AT91C_BASE_PIOB->PIO_PDSR & GPIOB_JOY_UP) == 0) {
status = JOYSTICK_UP;
} else if ((AT91C_BASE_PIOB->PIO_PDSR & GPIOB_JOY_DOWN) == 0) {
status = JOYSTICK_DOWN;
}
return (status);
}
/*
*********************************************************************************************************
*********************************************************************************************************
** uC/OS-View FUNCTIONS
*********************************************************************************************************
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* OSView_TmrInit()
*
* Description : Select & initialize a timer for use with uC/OS-View.
*
* Argument(s) : none.
*
* Return(s) : none.
*********************************************************************************************************
*/
#if (OS_VIEW_MODULE > 0)
void OSView_TmrInit (void)
{
#if (OS_VIEW_TIMER_SEL == 0)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC0; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_01; /* TC0 timer disabled */
AT91C_BASE_TCB->TCB_TC0.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_00; /* TC0 timer enabled */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
#if (OS_VIEW_TIMER_SEL == 1)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC1; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_01; /* TC1 timer disabled */
AT91C_BASE_TCB->TCB_TC1.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_00; /* TC1 timer enabled */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
#if (OS_VIEW_TIMER_SEL == 2)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC2; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_01; /* TC2 timer disabled */
AT91C_BASE_TCB->TCB_TC2.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_00; /* TC2 timer enabled */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
}
#endif
/*
*********************************************************************************************************
* OSView_TmrRd()
*
* Description : Read the current counts of a 16-bit free running timer.
*
* Argument(s) : none.
*
* Return(s) : The 16 bit counts (in a 32 bit variable) of the timer.
*********************************************************************************************************
*/
#if (OS_VIEW_MODULE > 0)
CPU_INT32U OSView_TmrRd (void)
{
CPU_INT32U cnts;
#if (OS_VIEW_TIMER_SEL == 0)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC0.TC_CV & 0x0000FFFF); /* Read timer 0 */
#endif
#if (OS_VIEW_TIMER_SEL == 1)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC1.TC_CV & 0x0000FFFF); /* Read timer 1 */
#endif
#if (OS_VIEW_TIMER_SEL == 2)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC2.TC_CV & 0x0000FFFF); /* Read timer 2 */
#endif
return (cnts);
}
#endif
/*
*********************************************************************************************************
*********************************************************************************************************
* uC/Probe PLUG-IN FOR uC/OS-II FUNCTIONS
*********************************************************************************************************
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* OSProbe_TmrInit()
*
* Description : Select & initialize a timer for use with the uC/Probe Plug-In for uC/OS-II.
*
* Argument(s) : none.
*
* Return(s) : none.
*********************************************************************************************************
*/
#if (uC_PROBE_OS_PLUGIN > 0) && (OS_PROBE_HOOKS_EN == 1)
void OSProbe_TmrInit (void)
{
#if (OS_PROBE_TIMER_SEL == 0)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC0; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_01; /* TC0 timer disabled */
AT91C_BASE_TCB->TCB_TC0.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_00; /* TC0 timer enabled */
AT91C_BASE_TCB->TCB_TC0.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
#if (OS_PROBE_TIMER_SEL == 1)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC1; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_01; /* TC1 timer disabled */
AT91C_BASE_TCB->TCB_TC1.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_00; /* TC1 timer enabled */
AT91C_BASE_TCB->TCB_TC1.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
#if (OS_PROBE_TIMER_SEL == 2)
AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_TC2; /* Enable the peripheral clk */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_01; /* TC2 timer disabled */
AT91C_BASE_TCB->TCB_TC2.TC_CMR &= ~(7 << 0); /* TIMER_CLOCK1 is input clk */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_00; /* TC2 timer enabled */
AT91C_BASE_TCB->TCB_TC2.TC_CCR = DEF_BIT_02; /* SWTRG to reset and start */
#endif
}
#endif
/*
*********************************************************************************************************
* OSProbe_TmrRd()
*
* Description : Read the current counts of a 16-bit free running timer.
*
* Argument(s) : none.
*
* Return(s) : The 16 bit counts (in a 32 bit variable) of the timer.
*********************************************************************************************************
*/
#if (uC_PROBE_OS_PLUGIN > 0) && (OS_PROBE_HOOKS_EN == 1)
CPU_INT32U OSProbe_TmrRd (void)
{
CPU_INT32U cnts;
#if (OS_PROBE_TIMER_SEL == 0)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC0.TC_CV & 0x0000FFFF); /* Read timer 0 */
#endif
#if (OS_PROBE_TIMER_SEL == 1)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC1.TC_CV & 0x0000FFFF); /* Read timer 1 */
#endif
#if (OS_PROBE_TIMER_SEL == 2)
cnts = (CPU_INT32U)(AT91C_BASE_TCB->TCB_TC2.TC_CV & 0x0000FFFF); /* Read timer 2 */
#endif
return (cnts);
}
#endif
/*
*********************************************************************************************************
*********************************************************************************************************
** uC/OS-II TIMER FUNCTIONS
*********************************************************************************************************
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* Tmr_TickInit()
*
* Description : Initialize uC/OS-II's tick source; for the AT91SAM, the Periodic Interval Timer (PIT).
*
* Argument(s) : none.
*
* Return(s) : none.
*
* Note(s) : (1) PIT Interrupt frequency:
*
* MCLK 1
* Freq = ---- * -----------
* 16 (PIV + 1)
*
*
* MCLK 1
* PIV = ( ---- * ------ ) - 1
* 16 Freq
*
* Where:
*
* MCLK = Master Clock
* Freq = Desired frequency (i.e. OS_TICKS_PER_SEC)
*********************************************************************************************************
*/
static void Tmr_TickInit (void)
{
CPU_INT32U counts;
CPU_INT32U cpu_freq;
/* Determine the number of counts per tick */
cpu_freq = BSP_CPU_ClkFreq();
counts = ((cpu_freq) / 16 / OS_TICKS_PER_SEC) - 1;
/* Set the vector address for PIT */
AT91C_BASE_AIC->AIC_SVR[AT91C_ID_SYS] = (CPU_INT32U)Tmr_TickISR_Handler;
AT91C_BASE_AIC->AIC_SMR[AT91C_ID_SYS] = AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL
| AT91C_AIC_PRIOR_LOWEST;
AT91C_BASE_AIC->AIC_ICCR = 1 << AT91C_ID_SYS;
AT91C_BASE_AIC->AIC_IECR = 1 << AT91C_ID_SYS;
/* Enable the PIT with the correct compare value */
AT91C_BASE_PITC->PITC_PIMR = AT91C_PITC_PITEN | AT91C_PITC_PITIEN | counts;
}
/*
*********************************************************************************************************
* Tmr_TickISR_Handler()
*
* Description : Handle the PIT interrupt that is used to generate TICKs for uC/OS-II.
*
* Argument(s) : none.
*
* Return(s) : none.
*********************************************************************************************************
*/
static void Tmr_TickISR_Handler (void)
{
CPU_INT32U status;
AT91C_BASE_AIC->AIC_IVR = 0; /* Write the IVR, as required in Protection Mode */
status = AT91C_BASE_PITC->PITC_PIVR;
(void)status; /* Prevent compiler warning about status set & not used */
OSTimeTick(); /* Tell uC/OS-II about clock tick */
AT91C_BASE_AIC->AIC_ICCR = 1 << AT91C_ID_SYS;
}
/*
*********************************************************************************************************
*********************************************************************************************************
** Serial Port Communications
*********************************************************************************************************
*********************************************************************************************************
*/
/*
*********************************************************************************************************
* Ser_Init()
*
* Description : Initialize a serial port for communication.
*
* Argument(s) : none.
*
* Return(s) : none.
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