hvwdefines.h

Asuro小车示例源码 L-R tracksensor controls L-R breakled

#define	PB2_L		(0x04<<8)
#define	PB2_H		(0x04)
#define	PB1_L		(0x02<<8)
#define	PB1_H		(0x02)
#define	PB0_L		(0x01<<8)
#define	PB0_H		(0x01)

#define PB7_I     	PB7_L
#define PB7_O     	PB7_H
#define PB6_I     	PB6_L
#define PB6_O     	PB6_H
#define PB5_I     	PB5_L
#define PB5_O     	PB5_H
#define PB4_I     	PB4_L
#define PB4_O     	PB4_H
#define PB3_I     	PB3_L
#define PB3_O     	PB3_H
#define PB2_I     	PB2_L
#define PB2_O     	PB2_H
#define PB1_I     	PB1_L
#define PB1_O     	PB1_H
#define PB0_I     	PB0_L
#define PB0_O     	PB0_H

#define REV_RGT_L	PB5_L	//the WHEEL (not the ENGINE) is turning reverse if REV signal is LOW
#define REV_RGT_H	PB5_H
#define FWD_RGT_L	PB4_L
#define FWD_RGT_H	PB4_H
#define IR_TXD1_L	PB3_L
#define IR_TXD1_H	PB3_H
#define SPD_RGT_L	PB2_L
#define SPD_RGT_H	PB2_H
#define SPD_LFT_L	PB1_L
#define SPD_LFT_H	PB1_H
#define SLD_GRN_L	PB0_L
#define SLD_GRN_H	PB0_H

#define REV_RGT_I	PB5_L
#define REV_RGT_O	PB5_H
#define FWD_RGT_I	PB4_L
#define FWD_RGT_O	PB4_H
#define IR_TXD1_I	PB3_L
#define IR_TXD1_O	PB3_H
#define SPD_RGT_I	PB2_L
#define SPD_RGT_O	PB2_H
#define SPD_LFT_I	PB1_L
#define SPD_LFT_O	PB1_H
#define SLD_GRN_I	PB0_L
#define SLD_GRN_O	PB0_H

#define REV_RGT_N	PB5_L
#define REV_RGT_P	PB5_H
#define FWD_RGT_N	PB4_L
#define FWD_RGT_P	PB4_H
#define IR_TXD1_N	PB3_L
#define IR_TXD1_P	PB3_H
#define SPD_RGT_N	PB2_L
#define SPD_RGT_P	PB2_H
#define SPD_LFT_N	PB1_L
#define SPD_LFT_P	PB1_H
#define SLD_GRN_N	PB0_L
#define SLD_GRN_P	PB0_H

#define	OC2_I		PB3_L
#define	OC2_O		PB3_H
#define	OC1B_L		PB2_L
#define	OC1B_H		PB2_H
#define	OC1A_L		PB1_L
#define	OC1A_H		PB1_H

//PORTC
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|  PC7  |  PC6  |  PC5  |  PC4  |  PC3  |  PC2  |  PC1  |  PC0  | port name
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|   7   |   6   |   5   |   4   |   3   |    2  |    1  |   0   | bit number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|   -   |   1   |  28   |  27   |  26   |   25  |   24  |  23   | pin number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|   -   | RESET |VPL_SNS|SWI_JNC|TRS_LFT|TRS_RGT|BOD_LFT|BOD_RGT| signal name (hvw)
//+-------+-------+-------+-------+-------+-------+-------+-------+
#define	PC7_L		(0x80<<8)
#define	PC7_H		(0x80)
#define	PC6_L		(0x40<<8)
#define	PC6_H		(0x40)
#define	PC5_L		(0x20<<8)
#define	PC5_H		(0x20)
#define	PC4_L		(0x10<<8)
#define	PC4_H		(0x10)
#define	PC3_L		(0x08<<8)
#define	PC3_H		(0x08)
#define	PC2_L		(0x04<<8)
#define	PC2_H		(0x04)
#define	PC1_L		(0x02<<8)
#define	PC1_H		(0x02)
#define	PC0_L		(0x01<<8)
#define	PC0_H		(0x01)

#define PC7_I		PC7_L
#define PC7_O		PC7_H
#define PC6_I		PC6_L
#define PC6_O		PC6_H
#define PC5_I		PC5_L
#define PC5_O		PC5_H
#define PC4_I		PC4_L
#define PC4_O		PC4_H
#define PC3_I		PC3_L
#define PC3_O		PC3_H
#define PC2_I		PC2_L
#define PC2_O		PC2_H
#define PC1_I		PC1_L
#define PC1_O		PC1_H
#define PC0_I		PC0_L
#define PC0_O		PC0_H

#define VPL_SNS_L	PC5_L
#define VPL_SNS_H	PC5_H
#define SWI_JNC_L	PC4_L
#define SWI_JNC_H	PC4_H
#define TRS_LFT_L	PC3_L
#define TRS_LFT_H	PC3_H
#define TRS_RGT_L	PC2_L
#define TRS_RGT_H	PC2_H
#define BOD_LFT_L	PC1_L
#define BOD_LFT_H	PC1_H
#define BOD_RGT_L	PC0_L
#define BOD_RGT_H	PC0_H

#define VPL_SNS_I	PC5_L
#define VPL_SNS_O	PC5_H
#define SWI_JNC_I	PC4_L
#define SWI_JNC_O	PC4_H
#define TRS_LFT_I	PC3_L
#define TRS_LFT_O	PC3_H
#define TRS_RGT_I	PC2_L
#define TRS_RGT_O	PC2_H
#define BOD_LFT_I	PC1_L
#define BOD_LFT_O	PC1_H
#define BOD_RGT_I	PC0_L
#define BOD_RGT_O	PC0_H

#define VPL_SNS_N	PC5_L
#define VPL_SNS_P	PC5_H
#define SWI_JNC_N	PC4_L
#define SWI_JNC_P	PC4_H
#define TRS_LFT_N	PC3_L
#define TRS_LFT_P	PC3_H
#define TRS_RGT_N	PC2_L
#define TRS_RGT_P	PC2_H
#define BOD_LFT_N	PC1_L
#define BOD_LFT_P	PC1_H
#define BOD_RGT_N	PC0_L
#define BOD_RGT_P	PC0_H




/*
#define VPS_L		(0x20<<8)
#define VPS_H		(0x20)
#define SWS_L		(0x10<<8)
#define SWS_H		(0x10)
#define TSL_L		(0x08<<8)
#define TSL_H		(0x08)
#define TSR_L		(0x04<<8)
#define TSR_H		(0x04)
#define OML_L		(0x02<<8)		//low
#define OML_H		(0x02)			//high
#define OML_I		OML_L				//input
#define OML_O		OML_H				//output
#define OML_N		OML_L				//no pull_up
#define OML_P		OML_H				//pull_up
#define OMR_L		(0x01<<8)
#define OMR_H		(0x01)
#define OMR_I		OMR_L
#define OMR_O		OMR_H
#define OMR_N		OMR_L
#define OMR_P		OMR_H
*/
/*
//PORTD
#define OMD_L		(0x80<<8)			//odo meter driver
#define OMD_H		(0x80)
#define OMD_I		OMD_L
#define OMD_O		OMD_H
#define	TLD_L		(0x40<<8)			//tracking light driver
#define	TLD_H		(0x40)	
#define	TLD_I		TLD_L
#define	TLD_O		TLD_H
#define	TLD_N		TLD_L
#define	TLD_P		TLD_H
#define	SLR_L		(0x04<<8)			//system led red
#define	SLR_H		(0x04)
*/
//PORTD
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|  PD7  |  PD6  |  PD5  |  PD4  |  PD3  |  PD2  |  PD1  |  PD0  | port name
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|   7   |   6   |   5   |   4   |   3   |    2  |    1  |   0   | bit number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|  13   |  12   |  11   |   6   |   5   |    4  |    3  |   2   | pin number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|BOD_COM|TRK_LED|REV_LFT|FWD_LFT|SWITCH |SLD_RED|IR_TXD2|IR_RXD | signal name (hvw)
//+-------+-------+-------+-------+-------+-------+-------+-------+
#define	PD7_L		(0x80<<8)
#define	PD7_H		(0x80)
#define	PD6_L		(0x40<<8)
#define	PD6_H		(0x40)
#define	PD5_L		(0x20<<8)
#define	PD5_H		(0x20)
#define	PD4_L		(0x10<<8)
#define	PD4_H		(0x10)
#define	PD3_L		(0x08<<8)
#define	PD3_H		(0x08)
#define	PD2_L		(0x04<<8)
#define	PD2_H		(0x04)
#define	PD1_L		(0x02<<8)
#define	PD1_H		(0x02)
#define	PD0_L		(0x01<<8)
#define	PD0_H		(0x01)

#define PD7_I		PD7_L
#define PD7_O		PD7_H
#define PD6_I		PD6_L
#define PD6_O		PD6_H
#define PD5_I		PD5_L
#define PD5_O		PD5_H
#define PD4_I		PD4_L
#define PD4_O		PD4_H
#define PD3_I		PD3_L
#define PD3_O		PD3_H
#define PD2_I		PD2_L
#define PD2_O		PD2_H
#define PD1_I		PD1_L
#define PD1_O		PD1_H
#define PD0_I		PD0_L
#define PD0_O		PD0_H

#define BOD_COM_L	PD7_L
#define BOD_COM_H	PD7_H
#define TRK_LED_L	PD6_L
#define TRK_LED_H	PD6_H
#define REV_LFT_L	PD5_L	//remember: signal is active when LOW
#define REV_LFT_H	PD5_H
#define FWD_LFT_L	PD4_L	//remember: signal is active when LOW
#define FWD_LFT_H	PD4_H
#define SWI_IAC_L	PD3_L
#define SWI_IAC_H	PD3_H
#define SLD_RED_L	PD2_L
#define SLD_RED_H	PD2_H
#define IR_TXD2_L	PD1_L
#define IR_TXD2_H	PD1_H
#define IR_RXD_L 	PD0_L
#define IR_RXD_H 	PD0_H

#define BOD_COM_I	PD7_L
#define BOD_COM_O	PD7_H
#define TRK_LED_I	PD6_L
#define TRK_LED_O	PD6_H
#define REV_LFT_I	PD5_L
#define REV_LFT_O	PD5_H
#define FWD_LFT_I	PD4_L
#define FWD_LFT_O	PD4_H
#define SWI_IAC_I	PD3_L
#define SWI_IAC_O	PD3_H
#define SLD_RED_I	PD2_L
#define SLD_RED_O	PD2_H
#define IR_TXD2_I	PD1_L
#define IR_TXD2_O	PD1_H
#define IR_RXD_I	PD0_L
#define IR_RXD_O	PD0_H

#define BOD_COM_N	PD7_L
#define BOD_COM_P	PD7_H
#define TRK_LED_N	PD6_L
#define TRK_LED_P	PD6_H
#define REV_LFT_N	PD5_L
#define REV_LFT_P	PD5_H
#define FWD_LFT_N	PD4_L
#define FWD_LFT_P	PD4_H
#define SWI_IAC_N	PD3_L
#define SWI_IAC_P	PD3_H
#define SLD_RED_N	PD2_L
#define SLD_RED_P	PD2_H
#define IR_TXD2_N	PD1_L
#define IR_TXD2_P	PD1_H
#define IR_RXD_N	PD0_L
#define IR_RXD_P	PD0_H

#define BIT_RATE_2400_BAUD     207
#define BIT_RATE_4800_BAUD     103
#define BIT_RATE_9600_BAUD     51
#define BIT_RATE_14400_BAUD    34
#define BIT_RATE_19200_BAUD    25
#define BIT_RATE_28800_BAUD    16
#define BIT_RATE_38400_BAUD    12
#define BIT_RATE_57600_BAUD    8
#define BIT_RATE_76800_BAUD    6
#define BIT_RATE_115200_BAUD   3
#define BIT_RATE_230400_BAUD   1
#define BIT_RATE_250000_BAUD   1
#define BIT_RATE_500000_BAUD   0

//PIND  Remember: reading normal pin status use PIND not PORTD
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|  PD7  |  PD6  |  PD5  |  PD4  |  PD3  |  PD2  |  PD1  |  PD0  | port name
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|   7   |   6   |   5   |   4   |   3   |    2  |    1  |   0   | bit number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|  13   |  12   |  11   |   6   |   5   |    4  |    3  |   2   | pin number
//+-------+-------+-------+-------+-------+-------+-------+-------+
//|BOD_COM|TRK_LED|REV_LFT|FWD_LFT|SWITCH |SLD_RED|IR_TXD2|IR_RXD | signal name (hvw)
//+-------+-------+-------+-------+-------+-------+-------+-------+
#define PIND7_L		PD7_L
#define PIND7_H		PD7_H
#define PIND6_L		PD6_L
#define PIND6_H		PD6_H
#define PIND5_L		PD5_L
#define PIND5_H		PD5_H
#define PIND4_L		PD4_L
#define PIND4_H		PD4_H
#define PIND3_L		PD3_L
#define PIND3_H		PD3_H
#define PIND2_L		PD2_L
#define PIND2_H		PD2_H
#define PIND1_L		PD1_L
#define PIND1_H		PD1_H
#define PIND0_L		PD0_L
#define PIND0_H		PD0_H



#define SFR_LEFT_ENGINE_SPEED OCR1A
#define SFR_RGHT_ENGINE_SPEED OCR1B


//Set and Clear Special Function Register bits
#define SFRX(Sfr,Msk) (Sfr=(Sfr&~((Msk)>>8))|(Msk))
// - a Mask (Msk) is 16 bits wide
// - the left  8 bits represents the bits to be cleared (each 1-bit means that corresponding registerbit must be cleared)
// - the right 8 bits represents the bits to be set     (each 1-bit means that corresponding registerbit must be set    )
// a Msk example:
// 7654 3210 7654 3210  (bitnumbers)
// 0010 0000 0000 0100
//   x                  bit 6 must be cleared
//                 x    bit 2 must be set
// p = previous result
// ((Msk)>>8)       => shift clear-bits from the high-byte to the low-byte (1-bits means that corresponding bit must be cleared)
// ~(p)             => invert clear-bits, meaning, bits that must be cleared are now '0' and must not be cleared are now '1' in low-byte
// Sfr&p            => get register data and 'and' it with 'p' so:
//                     1. reg 0 and clr 0 => reg 0 (a cleared bit that must be cleared stays cleared)
//                     2. reg 1 and clr 0 => reg 0 (a set bit that must be cleared is cleared)
//                     3. reg 0 and clr 1 => reg 0 (an cleared bit that must not be cleared stays cleared)
//                     4. reg 1 and clr 1 => reg 1 (an set bit that must not be cleared stays set)
// p|(Msk)          => to-be-set bits in low-byte are just prepaired to be set in register
// Sfr=p            => execute settings





//Write Special Function Register byte
#define SFRW(Sfr,Msk) (Sfr=(Msk))

//Test on mask bits 1 being set and mask bits 0 being cleared (do not test unmasked bits)
//	(Msk)>>8)				=> shift 'clr' mask 8 bits to the right
//	| ((Msk)&0xFF) 	=> 'Or' shifted 'clr' mask with 'set' mask: now all 'clr' and 'set' bits are set to '1'
//  & Sfr						=> Retrieve all 'clr' and 'set' bits from Sfr
//  ^((Msk&0xFF))		=> Get 'set' bitmask, force all 'set' masked '1' bits from Sfr to go '0', leaving errornous bits resulting as '1'
//  !               => invert (any '1' bit is error = boolean pass) to (any '1' bit is error = boolean fail)
#define SFRQ(Sfr,Msk)  (!((((((Msk)>>8)|((Msk)&0xFF)) ) & Sfr)^((Msk)&0xFF))) //werkt!	


//================================================================================


//#define SFRQ(Sfr,Msk)     (((Msk)^Sfr) | ((~((Msk)>>8))&Sfr))

#define	SET_TRACK_LED_OUTPUT    (SFRX(DDRD, TRK_LED_O))
#define	SET_TRACK_LED_ON        (SFRX(PORTD,TRK_LED_H))
#define	SET_TRACK_LED_OFF       (SFRX(PORTD,TRK_LED_L))
#define CHK_TRACK_LED_ON        (SFRT(PORTD,TRK_LED_H))

#define SET_LEFT_BRAKE_LED_ON   (SFRX(PORTC,BOD_LFT_H))
#define SET_LEFT_BRAKE_LED_OFF  (SFRX(PORTC,BOD_LFT_L))
#define SET_RGHT_BRAKE_LED_ON   (SFRX(PORTC,BOD_RGT_H))
#define SET_RGHT_BRAKE_LED_OFF  (SFRX(PORTC,BOD_RGT_L))

#define CHK_LEFT_BRAKE_LED_ON   ( SFRT(PORTC,BOD_LFT_H))
#define CHK_LEFT_BRAKE_LED_OFF  (!SFRT(PORTC,BOD_LFT_H))
#define CHK_RGHT_BRAKE_LED_ON   ( SFRT(PORTC,BOD_RGT_H))
#define CHK_RGHT_BRAKE_LED_OFF  (!SFRT(PORTC,BOD_RGT_H))

#define	SFR_TST(Sfr,Msk)        (Sfr&Msk)
#define	SFRT(Sfr,Msk)           (Sfr&Msk)

#define	TST_TRACK_LED_ON        (SFRT(PORTD,PD6_H))


#define SET_RED_SYSTM_LED_ON		(SFRX(PORTD,SLD_RED_H))
#define SET_RED_SYSTM_LED_OFF		(SFRX(PORTD,SLD_RED_L))
#define SET_GRN_SYSTM_LED_ON		(SFRX(PORTB,SLD_GRN_H))
#define SET_GRN_SYSTM_LED_OFF		(SFRX(PORTB,SLD_GRN_L))

//Set and Clear Bits in Byte
#define BYTE_BIT(Byt,Bit)		(Byt=(Byt&~((Bit)>>8))|(Bit))


#define SET_BYTE_BITS(Byt,Bit)		(Byt=(Byt|Bit))
#define SET_BYTE_BIT(Byt,Bit)		(Byt=(Byt|Bit))
#define CLR_BYTE_BITS(Byt,Bit)		(Byt=(Byt&~(Bit)))
#define CLR_BYTE_BIT(Byt,Bit)		(Byt=(Byt&~(Bit)))
#define CHK_BYTE_BIT_SET(Byt,Bit)	(Byt&Bit)
#define CHK_BYTE_BIT_CLR(Byt,Bit)	(~(Byt&Bit))	// Byt&(Bit) selects bit, 


#define byte unsigned char


#define SFR_ADMUX_MUX_ADC_LEFT_TRACK_SENSOR (MUX2_H|MUX1_H)	//mux3
#define SFR_ADMUX_MUX_ADC_RGHT_TRACK_SENSOR (MUX1_H)				//mux2


#define SET_LEFT_ENGINE_DIRECTION_TO_FORWARD SFRX(PORTD,PD4_L|PD5_H)
#define SET_LEFT_ENGINE_DIRECTION_TO_REVERSE SFRX(PORTD,PD4_H|PD5_L)
#define SET_RGHT_ENGINE_DIRECTION_TO_FORWARD SFRX(PORTB,PB4_L|PB5_H)
#define SET_RGHT_ENGINE_DIRECTION_TO_REVERSE SFRX(PORTB,PB4_H|PB5_L)
#define SET_LEFT_ENGINE_SPEED(LftEngSpd) (OCR1A=LftEngSpd)
#define SET_RGHT_ENGINE_SPEED(RgtEngSpd) (OCR1B=RgtEngSpd)



#endif //_MY_DEFINES_H_