asuro 017, build 001, l-r tracksensor controls l-r breakled.c

Asuro小车示例源码 L-R tracksensor controls L-R breakled

  //|                                                                                           |
  //| CSnn = Clock Source                                                                       |
  //|                                                                                           |
  //+-------------------------------------------------------------------------------------------+
  //| use clkio/1024 that makes freerunning frequency of 30.52Hz                                |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|bit number |    7    |    6    |    5    |    4    |    3    |     2   |     1   |    0    |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|           |    -    |    -    |    -    |    -    |    -    | Timer0  | Timer0  | Timer0  |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //| TCCR0     |RESERVED |RESERVED |RESERVED |RESERVED |RESERVED | CS02_X  | CS01_X  | CS00_X  |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  SFRX ( TCCR0  ,RESERVED |RESERVED |RESERVED |RESERVED |RESERVED | CS02_H  | CS01_L  | CS00_H  );
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  // 0MHz                                                              n         n         n    = 000 = No clock source (Timer/Counter stopped).
  // 8MHz/   1 = 8.000.000Hz => /256 = 31250.00Hz =     32us           n         n         n    = 001 = clkI/O/(No prescaling)
  // 8MHz/   8 = 1.000.000Hz => /256 =  3906.25Hz =    256us           n         n         n    = 010 = clkI/O/8 (From prescaler)
  // 8MHz/  64 =   125.000Hz => /256 =   488.28Hz =   2048us           n         n         n    = 011 = clkI/O/64 (From prescaler)
  // 8MHz/ 256 =    31.250Hz => /256 =   122.07Hz =  8.192us           n         n         n    = 100 = clkI/O/256 (From prescaler)
  // 8MHz/1024 =     7.813Hz => /256 =    30.52Hz = 32.768us           n         n         n    = 101 = clkI/O/1024 (From prescaler)
  //                                                                   n         n         n    = 110 = External clock source on T0 pin. Clock on falling edge.
  //                                                                   n         n         n    = 111 = External clock source on T0 pin. Clock on rising edge.
  //+-------------------------------------------------------------------------------------------+

	
  //+-------------------------------------------------------------------------------------------+
  //| TIMSK = Timer/Counter Interrupt Mask Register                                             |
  //+-------------------------------------------------------------------------------------------+
  //|                                                                                           |
  //| OCIE2    = timer/counter2, output-compare-match interrupt enable                          |
  //| TOIE2    = timer/counter2, overflow interrupt enable                                      |
  //| TICIE1   = timer/counter1, input-capture interrupt enable                                 |
  //| OCIE1A   = timer/counter1, equal to output-compare-A-match register, interrupt enable     |
  //| OCIE1B   = timer/counter1, equal to output-compare-B-match register, interrupt enable     |
  //| TOIE1    = timer/counter1 overflow interrupt enable                                       |
  //| RESERVED = unused                                                                         |
  //| TOIE0    = timer/counter0 overflow interrupt enable                                       |
  //|                                                                                           |
  //+-------------------------------------------------------------------------------------------+
  //| enable timer/counter0 interrupt                                                           |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|           | Timer2  | Timer2  | Timer1  | Timer1  | Timer1  | Timer1  |    -    | Timer0  |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|bit number |    7    |    6    |    5    |    4    |    3    |     2   |     1   |    0    |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|signal name| OCIE2_X | TOIE2_X |TICIE1_X |OCIE1A_X |OCIE1B_X | TOIE1_X |RESERVED | TOIE0_X |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  SFRX ( TIMSK  ,                                                                       TOIE0_H ); //Timer0 overflow (0xFF->0x00) interrupt enable
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
	
	
	
  //+-------------------------------------------------------------------------------------------+
  //| TCNT0 = Timer/Counter0 Register                                                           |
  //+-------------------------------------------------------------------------------------------+
  //|                                                                                           |
  //|                                                                                           |
  //|                                                                                           |
  //+-------------------------------------------------------------------------------------------+
  //| timer/counter 0 read/write counter value                                                  |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|bit number |    7    |    6    |    5    |    4    |    3    |     2   |     1   |    0    |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //|           | Timer0  | Timer0  | Timer0  | Timer0  | Timer0  | Timer0  | Timer0  | Timer0  |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  //| TCT0      |  bit7   |  bit6   |  bit5   |  bit4   |  bit3   |  bit2   |  bit1   |  bit0   |
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
  SFRW ( TCNT0  , 0x00                                                                          ); //clear timer/counter0
  //+-----------+---------+---------+---------+---------+---------+---------+---------+---------+
}
//================================================================================
//	MAIN
//================================================================================
int main(void){

	//stop the 36KHz timer2 (left active by boot sector) but does not harm anything
	SFRX(TCCR2,CS22_L|CS21_L|CS20_L);

	//---init-green-system-led---//
	//set green system led UC-pin as low (led off)
	SFRX(PORTB,SLD_GRN_L);
	//set green system led UC-pin as output
	SFRX(DDRB ,SLD_GRN_O);

	//---init-red-system-led---//
	//set red system led UC-pin as low (led off)
	SFRX(PORTD,SLD_RED_L);
	//set red system led UC-pin as output
	SFRX(DDRD ,SLD_RED_O); 

	//---init-track-led---//
	//set tracking led UC-pin as low (led off)
	SFRX(PORTD,TRK_LED_L);
	//set tracking led UC-pin as output
	SFRX(DDRD, TRK_LED_O);
	
	//---init-break-leds---//
	//set brake leds common kathode UC-pin to low
	SFRX(PORTD,BOD_COM_L);
	//set brake leds common kathode UC-pin to output
	SFRX(DDRD ,BOD_COM_O);
	//set both brake leds anode UC-pins to low (leds off)
	SFRX(PORTC,BOD_LFT_L|BOD_RGT_L);
	//set both brake leds anode UC-pins to outpouts
	SFRX(DDRC ,BOD_LFT_O|BOD_RGT_O);

	//init unused io-ports
	vInitUnusedIoPorts();
	
	//init timer/counter1 to generate two different interrupts depending on two compare-values
	vInitTimerCounter1Mode10();

	//define timer/counter1 max count value (write high byte first!)
	ICR1H=0x00;
	ICR1L=0xFF;

	//enable global interrupt
	vEnableGlobalInterrupt();

	//init ad-converter using interrupt
	vInitAdConverterUsingInterrupt();

	//select left tracking sensor as ad-converter measurement-input
	SFRX(ADMUX,MUX3_L|MUX2_L|MUX1_H|MUX0_H);

	//start timer/counter0
	vSetupFreeRunningTimer0UsingOverflowInterrupt();

	//endless loop
	while(1);

	//exit function
	return 0;
	
}
//================================================================================
// interrupt handler for timer/counter0 overflow
// #define SIG_OVERFLOW0 _VECTOR(9)
// Enable bit: Register TIMSK, Bit TOIE0 (bit0)
//================================================================================
SIGNAL (SIG_OVERFLOW0){
	//start ad-conversion
	SFRX(ADCSRA,ADSC_H);
}
//================================================================================
// interrupt handler, timer/counter1 output compare A
// enable bit: register TIMSK bit OCIE1A
// #define SIG_OUTPUT_COMPARE1A	_VECTOR(6)
//================================================================================
SIGNAL(SIG_OUTPUT_COMPARE1A){
	//toggle left brake led
	vToggleLeftBrakeLed();
}
//================================================================================
// interrupt handler, timer/counter1 output compare B
// enable bit: register TIMSK bit OCIE1B
// #define SIG_OUTPUT_COMPARE1B _VECTOR(7)
//================================================================================
SIGNAL(SIG_OUTPUT_COMPARE1B){
	//toggle right brake led
	vToggleRightBrakeLed();
}
//================================================================================
// interrupt handler, timer/counter1 overflow
// enable bit: register TIMSK bit TOIE1
// #define SIG_OVERFLOW1 _VECTOR(8)
//================================================================================
SIGNAL(SIG_OVERFLOW1){
	//copy measured left track-sensor value into compare A register
	OCR1A=gyCurLftTrkSnsVal^0xff;
	//copy measured right track-sensor value inverted into compare B register
	OCR1B=gyCurRgtTrkSnsVal;
}
//================================================================================
// interrupt handler, ad-conversion finished
// enable bit: register ADCSRA bit ADIE
// #define SIG_ADC _VECTOR(14)
//================================================================================
SIGNAL (SIG_ADC){
	//switch tracking led off
	//SFRX(PORTD,TRK_LED_L);
	//if left tracking sensor AD-Converter is selected
	if(SFRQ(ADMUX,MUX3_L|MUX2_L|MUX1_H|MUX0_H)){
		//store left track AD-converter value in global variable (used left-justified mode only needs reading ADCH)
		gyCurLftTrkSnsVal=ADCH;
		//OCR1A=ADCH;
		//now select right track sensor
		SFRX(ADMUX,MUX3_L|MUX2_L|MUX1_H|MUX0_L);
	}//if
	//if right tracking sensor AD-Converter is selected
	else{
		//store left track AD-converter value in global variable (used left-justified mode only needs reading ADCH)
		gyCurRgtTrkSnsVal=ADCH;
		//OCR1B=ADCH;
		//now select left track sensor
		SFRX(ADMUX,MUX3_L|MUX2_L|MUX1_H|MUX0_H);
	}//else
}