hwcfr.lst

最新单片机1211的源程序代码

A51 MACRO ASSEMBLER  HWCFR                                                                08/18/2006 11:05:50 PAGE     1


MACRO ASSEMBLER A51 V7.10
OBJECT MODULE PLACED IN HWCfr.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE HWCfr.a51 SET(SMALL) DEBUG EP

LOC  OBJ            LINE     SOURCE

                       1     ;
                       2     ; Copyright 2002 Texas Instruments
                       3     ;
                       4     ; Define HCR0 and HCR1 while download Flash Programming
                       5     ; -----------------------------------------------------
                       6     ;
                       7     ; EPMA: Enable Programming Memory Access (Security Bit) (HCR0.7):
  0001                 8     _EPMA    EQU    1       ; 0 = After reset in programming modes, Flash Memory can not be rea
                             d or written
                       9     ;                       ; 1 = Fully Accessible (default)
                      10     ;
                      11     ; PML:  Program Memory Lock. (PML has Priority Over RSL)(HCR0.6):
  0000                12     _PML     EQU    0       ; 0 = Enable all Flash Programming Modes in program mode, can be wr
                             itten in UAM
                      13     ;                       ; 1 = Enable read only for program mode, can抰 be written in UAM (d
                             efault)
                      14     ;
                      15     ; RSL:  Reset Sector Lock. (HCR0.5):
  0000                16     _RSL     EQU    0       ; 0 = Enable Reset Sector Writing
                      17     ;                       ; 1 = Enable Read Only Mode for Reset Sector (4kB) (default)
                      18     ;
                      19     ; EBR:  Enable Boot Rom. (HCR0.4):
                      20     ; Note: Boot Rom is 2kB of code located in ROM, not to be confused with the 4kB Boot Sector
                              located in Flash Memory.
  0000                21     _EBR     EQU    0       ; 0 = Disable Internal Boot Rom
                      22     ;                       ; 1 = Enable Internal Boot Rom (default)
                      23     ;
                      24     ; EWDR: Enable Watchdog Reset. (HCR0.3):
  0000                25     _EWDR    EQU    0       ; 0 = Disable Watchdog Reset
                      26     ;                       ; 1 = Enable Watchdog Reset (default)
                      27     ;
                      28     ; DFSEL: Data Flash Memory Size. (HCR0.0 .. HCR0.2):
  0007                29     _DFSEL   EQU    7       ; 0 = Reserved
                      30     ;                       ; 1 = 32kB, 16kB, 8kB, or 4kB Data Flash Memory
                      31     ;                       ; 2 = 16kB, 8kB, or 4kB Data Flash Memory
                      32     ;                       ; 3 = 8kB, or 4kB Data Flash Memory
                      33     ;                       ; 4 = 4kB Data Flash Memory
                      34     ;                       ; 5 = 2kB Data Flash Memory
                      35     ;                       ; 6 = 1kB Data Flash Memory
                      36     ;                       ; 7 = No Data Flash Memory (default)
                      37     ;
                      38     ; DBLSEL: Digital Brownout Level Select. (HCR1.6 .. HCR1.7):
  0003                39     _DBLSEL  EQU    3       ; 0 = 4.5V
                      40     ;                       ; 1 = 4.2V
                      41     ;                       ; 2 = 2.7V
                      42     ;                       ; 3 = 2.5V (default)
                      43     ;
                      44     ; ABLSEL: Analog Brownout Level Select. (HCR1.4 .. HCR1.5):
  0003                45     _ABLSEL  EQU    3       ; 0 = 4.5V
                      46     ;                       ; 1 = 4.2V
                      47     ;                       ; 2 = 2.7V
                      48     ;                       ; 3 = 2.5V (default)
                      49     ;
                      50     ; DAB: Disable Analog Power-Supply Brownout Detection. (HCR1.3):
  0001                51     _DAB     EQU    1       ; 0 = Enable Analog Brownout Detection
                      52     ;                       ; 1 = Disable Analog Brownout Detection (default)
                      53     ;
                      54     ; DDB: Disable Digital Power-Supply Brownout Detection. (HCR1.2):
A51 MACRO ASSEMBLER  HWCFR                                                                08/18/2006 11:05:50 PAGE     2

  0001                55     _DDB     EQU    1       ; 0 = Enable Digital Brownout Detection
                      56     ;                       ; 1 = Disable Digital Brownout Detection (default)
                      57     ;
                      58     ; EGP0: Enable General-Purpose I/O for Port 0. (HCR1.1):
  0001                59     _EGP0    EQU    1       ; 0 = Port 0 is Used for External Memory
                      60     ;                       ; 1 = Port 0 is Used as General-Purpose I/O (default)
                      61     ;
                      62     ; EGP23: Enable General-Purpose I/O for Ports 2 and 3. (HCR1.0):
  0001                63     _EGP23   EQU    1      ; 0 = Port 2 is Used for External Memory, P3.6 and P3.7 Used for WR 
                             and RD
                      64     ;                       ; 1 = Port 2 and Port3 are Used as General-Purpose I/O (default)
                      65     ;
                      66     
  0087                67     HCR1     EQU     (_EPMA SHL 7) OR (_PML SHL 6) OR (_RSL SHL 5) OR (_EBR SHL 4) OR (_EWDR SH
                             L 3) OR _DFSEL
                      68     
  00FF                69     HCR0     EQU     (_DBLSEL SHL 6) OR (_ABLSEL SHL 4) OR (_DAB SHL 3) OR (_DDB SHL 2) OR (_EG
                             P0 SHL 1) OR _EGP23
                      70     
----                  71              CSEG AT 0807EH
807E FF               72              DB      HCR0
807F 87               73              DB      HCR1
                      74              END
                             
A51 MACRO ASSEMBLER  HWCFR                                                                08/18/2006 11:05:50 PAGE     3

SYMBOL TABLE LISTING
------ ----- -------


N A M E             T Y P E  V A L U E   ATTRIBUTES

HCR0 . . . . . . .  N NUMB   00FFH   A   
HCR1 . . . . . . .  N NUMB   0087H   A   
_ABLSEL. . . . . .  N NUMB   0003H   A   
_DAB . . . . . . .  N NUMB   0001H   A   
_DBLSEL. . . . . .  N NUMB   0003H   A   
_DDB . . . . . . .  N NUMB   0001H   A   
_DFSEL . . . . . .  N NUMB   0007H   A   
_EBR . . . . . . .  N NUMB   0000H   A   
_EGP0. . . . . . .  N NUMB   0001H   A   
_EGP23 . . . . . .  N NUMB   0001H   A   
_EPMA. . . . . . .  N NUMB   0001H   A   
_EWDR. . . . . . .  N NUMB   0000H   A   
_PML . . . . . . .  N NUMB   0000H   A   
_RSL . . . . . . .  N NUMB   0000H   A   


REGISTER BANK(S) USED: 0 


ASSEMBLY COMPLETE.  0 WARNING(S), 0 ERROR(S)