📄 595j.c
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#include "iodefine.h"
#include "machine.h"
#include "io_init.c"
#define uint unsigned int
#define uchar unsigned char
void delay(uint time)
{
uchar i;
do{
for(i=20;i!=0;i--);//2us
} while(--time!=0);
}
union int_word_def
{
struct int_bit_def
{
uchar b15:1;
uchar b14:1;
uchar b13:1;
uchar b12:1;
uchar b11:1;
uchar b10:1;
uchar b9:1;
uchar b8:1;
uchar b7:1;
uchar b6:1;
uchar b5:1;
uchar b4:1;
uchar b3:1;
uchar b2:1;
uchar b1:1;
uchar b0:1;
}bit;
unsigned int word;
} Si_Word;
void SER_data_transfer(uint data)
{
uchar i=0;
P1.DR.BIT.B2=0;
P1.DR.BIT.B3=0;
Si_Word.word=data;
for(i=0;i<16;i++)
{
Si_Word.word=Si_Word.word>>1;
delay(3);
P1.DR.BIT.B2=1;
delay(2);
P1.DR.BIT.B1=Si_Word.bit.b0;
delay(2);
P1.DR.BIT.B2=0;
}
P1.DR.BIT.B3=1;
delay(3);
P1.DR.BIT.B3=0;
delay(3);
P2.DR.BIT.B5=0;
P2.DR.BIT.B4=0;
}
//=============================================================================
//
// Main Program
//
//=============================================================================
void main(void)
{
// MSTP.CRA.BIT.ACSE =0; //Release All-module-clock-stop mode
// MDCR.BIT.MDS =0x40;
//system control setting
SYSCR.WORD = 0xD103; //MAC Saturation Operation Control: non-saturation
//Instruction Fetch Mode Select: 32-bit mode
//External Bus Mode Enable: disable
//RAM Enable: enable
//system clock setting
SCKCR.BIT.ICK=0x01; //System clock select
SCKCR.BIT.PCK=0x02; //Peripheral module clock select 16M
SCKCR.BIT.BCK=0x03; //External clock select
SCKCR.BIT.PSTOP1=0x00;
SCKCR.BIT.POSEL1=0x00;
io_init();
while(1)
{
SER_data_transfer(0x9999);
delay(60000);
delay(60000);
delay(60000);
SER_data_transfer(0x6666);
delay(60000);
delay(60000);
delay(60000);
}
}
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