📄 i386-dis.c
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{ "rclA", Eb, XX, XX },
{ "rcrA", Eb, XX, XX },
{ "shlA", Eb, XX, XX },
{ "shrA", Eb, XX, XX },
{ "(bad)", XX, XX, XX },
{ "sarA", Eb, XX, XX },
},
/* GRP2S_one */
{
{ "rolQ", Ev, XX, XX },
{ "rorQ", Ev, XX, XX },
{ "rclQ", Ev, XX, XX },
{ "rcrQ", Ev, XX, XX },
{ "shlQ", Ev, XX, XX },
{ "shrQ", Ev, XX, XX },
{ "(bad)", XX, XX, XX},
{ "sarQ", Ev, XX, XX },
},
/* GRP2b_cl */
{
{ "rolA", Eb, CL, XX },
{ "rorA", Eb, CL, XX },
{ "rclA", Eb, CL, XX },
{ "rcrA", Eb, CL, XX },
{ "shlA", Eb, CL, XX },
{ "shrA", Eb, CL, XX },
{ "(bad)", XX, XX, XX },
{ "sarA", Eb, CL, XX },
},
/* GRP2S_cl */
{
{ "rolQ", Ev, CL, XX },
{ "rorQ", Ev, CL, XX },
{ "rclQ", Ev, CL, XX },
{ "rcrQ", Ev, CL, XX },
{ "shlQ", Ev, CL, XX },
{ "shrQ", Ev, CL, XX },
{ "(bad)", XX, XX, XX },
{ "sarQ", Ev, CL, XX }
},
/* GRP3b */
{
{ "testA", Eb, Ib, XX },
{ "(bad)", Eb, XX, XX },
{ "notA", Eb, XX, XX },
{ "negA", Eb, XX, XX },
{ "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
{ "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
{ "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
{ "idivA", Eb, XX, XX } /* and idiv for consistency. */
},
/* GRP3S */
{
{ "testQ", Ev, Iv, XX },
{ "(bad)", XX, XX, XX },
{ "notQ", Ev, XX, XX },
{ "negQ", Ev, XX, XX },
{ "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
{ "imulQ", Ev, XX, XX },
{ "divQ", Ev, XX, XX },
{ "idivQ", Ev, XX, XX },
},
/* GRP4 */
{
{ "incA", Eb, XX, XX },
{ "decA", Eb, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
},
/* GRP5 */
{
{ "incQ", Ev, XX, XX },
{ "decQ", Ev, XX, XX },
{ "callT", indirEv, XX, XX },
{ "lcallT", indirEv, XX, XX },
{ "jmpT", indirEv, XX, XX },
{ "ljmpT", indirEv, XX, XX },
{ "pushU", Ev, XX, XX },
{ "(bad)", XX, XX, XX },
},
/* GRP6 */
{
{ "sldtQ", Ev, XX, XX },
{ "strQ", Ev, XX, XX },
{ "lldt", Ew, XX, XX },
{ "ltr", Ew, XX, XX },
{ "verr", Ew, XX, XX },
{ "verw", Ew, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX }
},
/* GRP7 */
{
{ "sgdtQ", M, XX, XX },
{ "sidtQ", M, XX, XX },
{ "lgdtQ", M, XX, XX },
{ "lidtQ", M, XX, XX },
{ "smswQ", Ev, XX, XX },
{ "(bad)", XX, XX, XX },
{ "lmsw", Ew, XX, XX },
{ "invlpg", Ew, XX, XX },
},
/* GRP8 */
{
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "btQ", Ev, Ib, XX },
{ "btsQ", Ev, Ib, XX },
{ "btrQ", Ev, Ib, XX },
{ "btcQ", Ev, Ib, XX },
},
/* GRP9 */
{
{ "(bad)", XX, XX, XX },
{ "cmpxchg8b", Ev, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
},
/* GRP10 */
{
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "psrlw", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
{ "psraw", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
{ "psllw", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
},
/* GRP11 */
{
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "psrld", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
{ "psrad", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
{ "pslld", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
},
/* GRP12 */
{
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "psrlq", MS, Ib, XX },
{ "psrldq", MS, Ib, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "psllq", MS, Ib, XX },
{ "pslldq", MS, Ib, XX },
},
/* GRP13 */
{
{ "fxsave", Ev, XX, XX },
{ "fxrstor", Ev, XX, XX },
{ "ldmxcsr", Ev, XX, XX },
{ "stmxcsr", Ev, XX, XX },
{ "(bad)", XX, XX, XX },
{ "lfence", None, XX, XX },
{ "mfence", None, XX, XX },
{ "sfence", None, XX, XX },
/* FIXME: the sfence with memory operand is clflush! */
},
/* GRP14 */
{
{ "prefetchnta", Ev, XX, XX },
{ "prefetcht0", Ev, XX, XX },
{ "prefetcht1", Ev, XX, XX },
{ "prefetcht2", Ev, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
},
/* GRPAMD */
{
{ "prefetch", Eb, XX, XX },
{ "prefetchw", Eb, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
{ "(bad)", XX, XX, XX },
}
};
static const struct dis386 prefix_user_table[][4] = {
/* PREGRP0 */
{
{ "addps", XM, EX, XX },
{ "addss", XM, EX, XX },
{ "addpd", XM, EX, XX },
{ "addsd", XM, EX, XX },
},
/* PREGRP1 */
{
{ "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
{ "", XM, EX, OPSIMD },
{ "", XM, EX, OPSIMD },
{ "", XM, EX, OPSIMD },
},
/* PREGRP2 */
{
{ "cvtpi2ps", XM, EM, XX },
{ "cvtsi2ssY", XM, Ev, XX },
{ "cvtpi2pd", XM, EM, XX },
{ "cvtsi2sdY", XM, Ev, XX },
},
/* PREGRP3 */
{
{ "cvtps2pi", MX, EX, XX },
{ "cvtss2siY", Gv, EX, XX },
{ "cvtpd2pi", MX, EX, XX },
{ "cvtsd2siY", Gv, EX, XX },
},
/* PREGRP4 */
{
{ "cvttps2pi", MX, EX, XX },
{ "cvttss2siY", Gv, EX, XX },
{ "cvttpd2pi", MX, EX, XX },
{ "cvttsd2siY", Gv, EX, XX },
},
/* PREGRP5 */
{
{ "divps", XM, EX, XX },
{ "divss", XM, EX, XX },
{ "divpd", XM, EX, XX },
{ "divsd", XM, EX, XX },
},
/* PREGRP6 */
{
{ "maxps", XM, EX, XX },
{ "maxss", XM, EX, XX },
{ "maxpd", XM, EX, XX },
{ "maxsd", XM, EX, XX },
},
/* PREGRP7 */
{
{ "minps", XM, EX, XX },
{ "minss", XM, EX, XX },
{ "minpd", XM, EX, XX },
{ "minsd", XM, EX, XX },
},
/* PREGRP8 */
{
{ "movups", XM, EX, XX },
{ "movss", XM, EX, XX },
{ "movupd", XM, EX, XX },
{ "movsd", XM, EX, XX },
},
/* PREGRP9 */
{
{ "movups", EX, XM, XX },
{ "movss", EX, XM, XX },
{ "movupd", EX, XM, XX },
{ "movsd", EX, XM, XX },
},
/* PREGRP10 */
{
{ "mulps", XM, EX, XX },
{ "mulss", XM, EX, XX },
{ "mulpd", XM, EX, XX },
{ "mulsd", XM, EX, XX },
},
/* PREGRP11 */
{
{ "rcpps", XM, EX, XX },
{ "rcpss", XM, EX, XX },
{ "(bad)", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP12 */
{
{ "rsqrtps", XM, EX, XX },
{ "rsqrtss", XM, EX, XX },
{ "(bad)", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP13 */
{
{ "sqrtps", XM, EX, XX },
{ "sqrtss", XM, EX, XX },
{ "sqrtpd", XM, EX, XX },
{ "sqrtsd", XM, EX, XX },
},
/* PREGRP14 */
{
{ "subps", XM, EX, XX },
{ "subss", XM, EX, XX },
{ "subpd", XM, EX, XX },
{ "subsd", XM, EX, XX },
},
/* PREGRP15 */
{
{ "(bad)", XM, EX, XX },
{ "cvtdq2pd", XM, EX, XX },
{ "cvttpd2dq", XM, EX, XX },
{ "cvtpd2dq", XM, EX, XX },
},
/* PREGRP16 */
{
{ "cvtdq2ps", XM, EX, XX },
{ "cvttps2dq",XM, EX, XX },
{ "cvtps2dq",XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP17 */
{
{ "cvtps2pd", XM, EX, XX },
{ "cvtss2sd", XM, EX, XX },
{ "cvtpd2ps", XM, EX, XX },
{ "cvtsd2ss", XM, EX, XX },
},
/* PREGRP18 */
{
{ "maskmovq", MX, MS, XX },
{ "(bad)", XM, EX, XX },
{ "maskmovdqu", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP19 */
{
{ "movq", MX, EM, XX },
{ "movdqu", XM, EX, XX },
{ "movdqa", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP20 */
{
{ "movq", EM, MX, XX },
{ "movdqu", EX, XM, XX },
{ "movdqa", EX, XM, XX },
{ "(bad)", EX, XM, XX },
},
/* PREGRP21 */
{
{ "(bad)", EX, XM, XX },
{ "movq2dq", XM, MS, XX },
{ "movq", EX, XM, XX },
{ "movdq2q", MX, XS, XX },
},
/* PREGRP22 */
{
{ "pshufw", MX, EM, Ib },
{ "pshufhw", XM, EX, Ib },
{ "pshufd", XM, EX, Ib },
{ "pshuflw", XM, EX, Ib },
},
/* PREGRP23 */
{
{ "movd", Ed, MX, XX },
{ "movq", XM, EX, XX },
{ "movd", Ed, XM, XX },
{ "(bad)", Ed, XM, XX },
},
/* PREGRP24 */
{
{ "(bad)", MX, EX, XX },
{ "(bad)", XM, EX, XX },
{ "punpckhqdq", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
/* PREGRP25 */
{
{ "movntq", Ev, MX, XX },
{ "(bad)", Ev, XM, XX },
{ "movntdq", Ev, XM, XX },
{ "(bad)", Ev, XM, XX },
},
/* PREGRP26 */
{
{ "(bad)", MX, EX, XX },
{ "(bad)", XM, EX, XX },
{ "punpcklqdq", XM, EX, XX },
{ "(bad)", XM, EX, XX },
},
};
static const struct dis386 x86_64_table[][2] = {
{
{ "arpl", Ew, Gw, XX },
{ "movs{||lq|xd}", Gv, Ed, XX },
},
};
#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
static void
ckprefix ()
{
int newrex;
rex = 0;
prefixes = 0;
used_prefixes = 0;
rex_used = 0;
while (1)
{
FETCH_DATA (the_info, codep + 1);
newrex = 0;
switch (*codep)
{
/* REX prefixes family. */
case 0x40:
case 0x41:
case 0x42:
case 0x43:
case 0x44:
case 0x45:
case 0x46:
case 0x47:
case 0x48:
case 0x49:
case 0x4a:
case 0x4b:
case 0x4c:
case 0x4d:
case 0x4e:
case 0x4f:
if (mode_64bit)
newrex = *codep;
else
return;
break;
case 0xf3:
prefixes |= PREFIX_REPZ;
break;
case 0xf2:
prefixes |= PREFIX_REPNZ;
break;
case 0xf0:
prefixes |= PREFIX_LOCK;
break;
case 0x2e:
prefixes |= PREFIX_CS;
break;
case 0x36:
prefixes |= PREFIX_SS;
break;
case 0x3e:
prefixes |= PREFIX_DS;
break;
case 0x26:
prefixes |= PREFIX_ES;
break;
case 0x64:
prefixes |= PREFIX_FS;
break;
case 0x65:
prefixes |= PREFIX_GS;
break;
case 0x66:
prefixes |= PREFIX_DATA;
break;
case 0x67:
prefixes |= PREFIX_ADDR;
break;
case FWAIT_OPCODE:
/* fwait is really an instruction. If there are prefixes
before the fwait, they belong to the fwait, *not* to the
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