lcd_top_ba.v

液晶屏lcd1602的使用历程

        \U3/I_38_0 , \U3/I_45_0 , \U3/I_66 , \U3/I_84 , \U3/I_91 , 
        \U3/I_98 , \U3/I_129 , \U3/I_156 , \U3/N_4 , 
        \U3/U1.DWACT_FINC_E[29] , \U3/U1.DWACT_FINC_E[13] , 
        \U3/U1.DWACT_FINC_E[18] , \U3/U1.DWACT_FINC_E[15] , 
        \U3/U1.DWACT_FINC_E[17] , \U3/N_11 , \U3/U1.DWACT_FINC_E[33] , 
        \U3/U1.DWACT_FINC_E[34] , \U3/U1.DWACT_FINC_E[2] , 
        \U3/U1.DWACT_FINC_E[5] , \U3/N_20 , \U3/U1.DWACT_FINC_E[28] , 
        \U3/U1.DWACT_FINC_E[16] , \U3/N_25 , \U3/N_30 , 
        \U3/U1.DWACT_FINC_E[14] , \U3/N_35 , \U3/U1.DWACT_FINC_E[9] , 
        \U3/U1.DWACT_FINC_E[12] , \U3/N_40 , \U3/U1.DWACT_FINC_E[10] , 
        \U3/N_47 , \U3/U1.DWACT_FINC_E[11] , \U3/N_52 , \U3/N_57 , 
        \U3/N_62 , \U3/U1.DWACT_FINC_E[8] , \U3/N_67 , \U3/N_75 , 
        \U3/N_82 , \U3/U1.DWACT_FINC_E[3] , \U3/N_90 , \U3/N_95 , 
        \U3/N_100 , \U3/U1.DWACT_FINC_E[1] , \U3/N_105 , \U3/N_113 , 
        \U1/clk_BUF_i , \U1/count[1]_net_1 , \U1/count[0]_net_1 , 
        \U1/count[3]_net_1 , \U1/U1.DWACT_FINC_E[0] , 
        \U1/count[8]_net_1 , \U1/U1.DWACT_FINC_E[4] , \U1/clk_BUF6_6 , 
        \U1/clk_BUF6_4 , \U1/count[4]_net_1 , \U1/clk_BUF6_5 , 
        \U1/count[5]_net_1 , \U1/clk_BUF6_2 , \U1/count[7]_net_1 , 
        \U1/count[9]_net_1 , \U1/count[6]_net_1 , \U1/count[2]_net_1 , 
        \U1/clk_BUF6 , \U1/count_3[9] , \U1/I_52 , \U1/count_3[8] , 
        \U1/count_3[7] , \U1/count_3[6] , \U1/count_3[5] , 
        \U1/count_3[0] , \U1/count_3[3] , \U1/clk_counter , \U1/I_5 , 
        \U1/I_9 , \U1/I_20 , \U1/U1.DWACT_FINC_E[2] , 
        \U1/U1.DWACT_FINC_E[3] , \U1/N_9 , \U1/N_14 , \U1/N_19 , 
        \U1/U1.DWACT_FINC_E[1] , \U1/N_24 , \U1/N_32 , 
        \LED_pad[0]/U0/NET1 , \LED_pad[0]/U0/NET2 , 
        \LED_pad[3]/U0/NET1 , \LED_pad[3]/U0/NET2 , 
        \LED_pad[2]/U0/NET1 , \LED_pad[2]/U0/NET2 , 
        \LED_pad[6]/U0/NET1 , \LED_pad[6]/U0/NET2 , 
        \DB8_pad[6]/U0/NET1 , \DB8_pad[6]/U0/NET2 , 
        \LCD_EN_pad/U0/NET1 , \LCD_EN_pad/U0/NET2 , 
        \DB8_pad[5]/U0/NET1 , \DB8_pad[5]/U0/NET2 , 
        \LED_pad[1]/U0/NET1 , \LED_pad[1]/U0/NET2 , 
        \DB8_pad[4]/U0/NET1 , \DB8_pad[4]/U0/NET2 , 
        \DB8_pad[3]/U0/NET1 , \DB8_pad[3]/U0/NET2 , 
        \LED_pad[5]/U0/NET1 , \LED_pad[5]/U0/NET2 , 
        \DB8_pad[7]/U0/NET1 , \DB8_pad[7]/U0/NET2 , 
        \LED_pad[7]/U0/NET1 , \LED_pad[7]/U0/NET2 , \RW_pad/U0/NET1 , 
        \RW_pad/U0/NET2 , \rst_pad/U0/NET1 , \clk_48M_pad/U0/NET1 , 
        \LED_pad[4]/U0/NET1 , \LED_pad[4]/U0/NET2 , 
        \DB8_pad[1]/U0/NET1 , \DB8_pad[1]/U0/NET2 , 
        \DB8_pad[2]/U0/NET1 , \DB8_pad[2]/U0/NET2 , \RS_pad/U0/NET1 , 
        \RS_pad/U0/NET2 , \reset_pad/U0/NET1 , \DB8_pad[0]/U0/NET1 , 
        \DB8_pad[0]/U0/NET2 , VCC, \U2/DB8[4]/Y , \U3/LED[1]/Y , 
        \U2/disp_count[1]/Y , \U2/DB8[6]/Y , \U3/LED[0]/Y , 
        \U3/LED[5]/Y , \U2/DB8[3]/Y , \U2/disp_count[2]/Y , 
        \U2/DB8[7]/Y , \U3/LED[7]/Y , \U2/DB8[0]/Y , \U2/RS/Y , 
        \U2/DB8[1]/Y , \U3/LED[6]/Y , \U2/disp_count[0]/Y , 
        \U2/DB8[2]/Y , GND, \U1/clk_BUF/Y , \U3/LED[3]/Y , 
        \U2/DB8[5]/Y , \U3/LED[4]/Y , \U2/disp_count[3]/Y , 
        \U3/LED[2]/Y , AFLSDF_VCC, AFLSDF_GND, AFLSDF_INV_0_net_1;
    wire GND_power_net1;
    wire VCC_power_net1;
    assign GND = GND_power_net1;
    assign AFLSDF_GND = GND_power_net1;
    assign VCC = VCC_power_net1;
    assign AFLSDF_VCC = VCC_power_net1;
    
    NOR2A \U2/Data_First_Buf_RNO[51]  (.A(
        \U2/Data_First_Buf[43]_net_1 ), .B(\U2/state[4]_net_1 ), .Y(
        \U2/Data_First_Buf_5[51] ));
    NOR2A \U2/Data_Second_Buf_RNISH51[3]  (.A(\U2/Data_Second_Buf[0] ), 
        .B(\U2/state[5]_net_1 ), .Y(\U2/Data_Second_Buf_6[8] ));
    NOR2A \U2/Data_First_Buf_RNO[35]  (.A(
        \U2/Data_First_Buf[27]_net_1 ), .B(\U2/state[4]_net_1 ), .Y(
        \U2/Data_First_Buf_5[35] ));
    NOR2A \U2/Data_Second_Buf_RNO[100]  (.A(
        \U2/Data_Second_Buf[92]_net_1 ), .B(\U2/state[5]_net_1 ), .Y(
        \U2/Data_Second_Buf_6[100] ));
    OR2 \U2/Data_Second_Buf_RNO[35]  (.A(\U2/state[5]_net_1 ), .B(
        \U2/Data_Second_Buf[27]_net_1 ), .Y(\U2/N_232 ));
    DFN1E0 \U2/Data_Second_Buf[93]  (.D(\U2/Data_Second_Buf_6[93] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[93]_net_1 ));
    NOR3C \U3/cnt_RNIPQQ6[4]  (.A(\U3/cnt[6]_net_1 ), .B(
        \U3/cnt[4]_net_1 ), .C(\U3/clk_ena_8 ), .Y(\U3/clk_ena_16 ));
    DFN1C1 \U3/cnt[24]  (.D(\U3/cnt_3[24] ), .CLK(clk_48M_c), .CLR(
        reset_c), .Q(\U3/cnt[24]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[62]  (.D(\U2/Data_First_Buf_5[62] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[62]_net_1 ));
    AND2 \U3/un6_cnt_I_94  (.A(\U3/U1.DWACT_FINC_E[7] ), .B(
        \U3/U1.DWACT_FINC_E[9] ), .Y(\U3/U1.DWACT_FINC_E[10] ));
    DFN1C1 \U2/DB8[7]/U1  (.D(\U2/DB8[7]/Y ), .CLK(clk_LCD), .CLR(
        rst_c), .Q(\DB8_c[7] ));
    NOR2A \U2/Data_First_Buf_RNO[26]  (.A(
        \U2/Data_First_Buf[18]_net_1 ), .B(\U2/state[4]_net_1 ), .Y(
        \U2/Data_First_Buf_5[26] ));
    DFN1E0 \U2/Data_Second_Buf[56]  (.D(\U2/Data_Second_Buf_6[56] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[56]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[64]  (.D(\U2/Data_First_Buf_5[64] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[64]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[37]  (.D(\U2/Data_First_Buf_5[37] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[37]_net_1 ));
    IOPAD_TRI \DB8_pad[4]/U0/U0  (.D(\DB8_pad[4]/U0/NET1 ), .E(
        \DB8_pad[4]/U0/NET2 ), .PAD(DB8[4]));
    IOTRI_OB_EB \RS_pad/U0/U1  (.D(RS_c), .E(VCC), .DOUT(
        \RS_pad/U0/NET1 ), .EOUT(\RS_pad/U0/NET2 ));
    OR2 \U2/Data_Second_Buf_RNO[65]  (.A(\U2/state[5]_net_1 ), .B(
        \U2/Data_Second_Buf[57]_net_1 ), .Y(\U2/N_227 ));
    IOPAD_IN \clk_48M_pad/U0/U0  (.PAD(clk_48M), .Y(
        \clk_48M_pad/U0/NET1 ));
    BUFF rst_pad_RNI106 (.A(rst_c), .Y(rst_c_0));
    NOR2A \U2/Data_Second_Buf_RNO[92]  (.A(
        \U2/Data_Second_Buf[84]_net_1 ), .B(\U2/state[5]_net_1 ), .Y(
        \U2/Data_Second_Buf_6[92] ));
    NOR2B \U2/LCD_EN_Sel_RNI1JT2  (.A(clk_LCD), .B(
        \U2/LCD_EN_Sel_net_1 ), .Y(\U2.N_23 ));
    OR2 \U2/Data_Second_Buf_RNO[28]  (.A(\U2/state[5]_net_1 ), .B(
        \U2/Data_Second_Buf[20]_net_1 ), .Y(\U2/N_235 ));
    CLKSRC \U2/state_RNIOSR4_0[4]/U_CLKSRC  (.A(
        \U2/state_RNIOSR4[4]_net_1 ), .Y(\U2/state_RNIOSR4_0[4] ));
    MX2 \U2/disp_count[0]/U0  (.A(\U2/disp_count_n0 ), .B(
        \U2/disp_count_c0 ), .S(\U2/N_534 ), .Y(\U2/disp_count[0]/Y ));
    IOTRI_OB_EB \LED_pad[1]/U0/U1  (.D(\LED_c[1] ), .E(VCC), .DOUT(
        \LED_pad[1]/U0/NET1 ), .EOUT(\LED_pad[1]/U0/NET2 ));
    DFN1E0 \U2/Data_First_Buf[53]  (.D(\U2/Data_First_Buf_5[53] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[53]_net_1 ));
    XOR2 \U3/un6_cnt_I_24  (.A(\U3/N_105 ), .B(\U3/cnt[5]_net_1 ), .Y(
        \U3/I_24_0 ));
    OR2 \U2/Data_First_Buf_RNO[62]  (.A(\U2/state[4]_net_1 ), .B(
        \U2/Data_First_Buf[54]_net_1 ), .Y(\U2/Data_First_Buf_5[62] ));
    DFN1E0 \U2/Data_First_Buf[14]  (.D(\U2/state[4]_net_1 ), .CLK(
        clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[14]_net_1 ));
    IOTRI_OB_EB \RW_pad/U0/U1  (.D(GND), .E(VCC), .DOUT(
        \RW_pad/U0/NET1 ), .EOUT(\RW_pad/U0/NET2 ));
    NOR2A \U2/Data_Second_Buf_RNO[98]  (.A(
        \U2/Data_Second_Buf[90]_net_1 ), .B(\U2/state[5]_net_1 ), .Y(
        \U2/Data_Second_Buf_6[98] ));
    NOR2A \U2/Data_First_Buf_RNO[68]  (.A(
        \U2/Data_First_Buf[60]_net_1 ), .B(\U2/state[4]_net_1 ), .Y(
        \U2/Data_First_Buf_5[68] ));
    DFN1E0 \U2/Data_First_Buf[88]  (.D(\U2/Data_First_Buf_5[88] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[88]_net_1 ));
    NOR2A \U2/Data_First_Buf_RNO[50]  (.A(
        \U2/Data_First_Buf[42]_net_1 ), .B(\U2/state[4]_net_1 ), .Y(
        \U2/Data_First_Buf_5[50] ));
    DFN1E0 \U2/Data_Second_Buf[98]  (.D(\U2/Data_Second_Buf_6[98] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[98]_net_1 ));
    XA1 \U1/count_RNO[7]  (.A(\U1/N_14 ), .B(\U1/count[7]_net_1 ), .C(
        \U1/clk_BUF6 ), .Y(\U1/count_3[7] ));
    IOPAD_TRI \LED_pad[2]/U0/U0  (.D(\LED_pad[2]/U0/NET1 ), .E(
        \LED_pad[2]/U0/NET2 ), .PAD(LED[2]));
    AND3 \U3/un6_cnt_I_69  (.A(\U3/cnt[9]_net_1 ), .B(
        \U3/cnt[10]_net_1 ), .C(\U3/cnt[11]_net_1 ), .Y(
        \U3/U1.DWACT_FINC_E[7] ));
    OR2 \U2/Data_Second_Buf_RNO[12]  (.A(\U2/state[5]_net_1 ), .B(
        \U2/Data_Second_Buf[0] ), .Y(\U2/N_240 ));
    AND3 \U3/un6_cnt_I_55  (.A(\U3/U1.DWACT_FINC_E[4] ), .B(
        \U3/cnt[8]_net_1 ), .C(\U3/cnt[9]_net_1 ), .Y(\U3/N_82 ));
    IOPAD_TRI \DB8_pad[2]/U0/U0  (.D(\DB8_pad[2]/U0/NET1 ), .E(
        \DB8_pad[2]/U0/NET2 ), .PAD(DB8[2]));
    DFN1E0 \U2/Data_First_Buf[56]  (.D(\U2/Data_First_Buf_5[56] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[56]_net_1 ));
    XOR2 \U3/un6_cnt_I_45  (.A(\U3/N_90 ), .B(\U3/cnt[8]_net_1 ), .Y(
        \U3/I_45_0 ));
    DFN1E0 \U2/Data_First_Buf[90]  (.D(\U2/Data_First_Buf_5[90] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[90]_net_1 ));
    XA1 \U3/cnt_RNO[24]  (.A(\U3/N_4 ), .B(\U3/cnt[24]_net_1 ), .C(
        \U3/clk_ena ), .Y(\U3/cnt_3[24] ));
    DFN1E0 \U2/Data_Second_Buf[108]  (.D(\U2/Data_Second_Buf_6[108] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[108]_net_1 ));
    IOPAD_TRI \LED_pad[3]/U0/U0  (.D(\LED_pad[3]/U0/NET1 ), .E(
        \LED_pad[3]/U0/NET2 ), .PAD(LED[3]));
    IOTRI_OB_EB \LCD_EN_pad/U0/U1  (.D(\U2.N_23 ), .E(VCC), .DOUT(
        \LCD_EN_pad/U0/NET1 ), .EOUT(\LCD_EN_pad/U0/NET2 ));
    DFN1E0 \U2/Data_Second_Buf[59]  (.D(\U2/Data_Second_Buf_6[59] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[59]_net_1 ));
    AND3 \U3/un6_cnt_I_37  (.A(\U3/U1.DWACT_FINC_E[0] ), .B(
        \U3/U1.DWACT_FINC_E[2] ), .C(\U3/cnt[6]_net_1 ), .Y(\U3/N_95 ));
    DFN1E0 \U2/Data_Second_Buf[105]  (.D(\U2/Data_Second_Buf_6[105] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[105]_net_1 ));
    DFN1E0 \U2/Data_Second_Buf[8]  (.D(\U2/Data_Second_Buf_6[8] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[8]_net_1 ));
    NOR3C \U1/count_RNIKIS5[9]  (.A(\U1/count[7]_net_1 ), .B(
        \U1/count[9]_net_1 ), .C(\U1/count[3]_net_1 ), .Y(
        \U1/clk_BUF6_4 ));
    INV \U2/disp_count_RNI2J14_0[2]  (.A(
        \U2/disp_count_RNI2J14[2]_net_1 ), .Y(\U2/N_572_i ));
    MX2 \U2/disp_count[1]/U0  (.A(\U2/N_7 ), .B(\U2/disp_count[1] ), 
        .S(\U2/N_534 ), .Y(\U2/disp_count[1]/Y ));
    NOR3A \U2/DB8_RNO[6]  (.A(\U2/state[5]_net_1 ), .B(
        \U2/state[6]_net_1 ), .C(\U2/N_580 ), .Y(\U2/N_131 ));
    DFN1E0 \U2/Data_Second_Buf[74]  (.D(\U2/Data_Second_Buf_6[74] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[74]_net_1 ));
    NOR3C \U3/cnt_RNIRPD9[10]  (.A(\U3/clk_ena_4 ), .B(\U3/clk_ena_3 ), 
        .C(\U3/clk_ena_13 ), .Y(\U3/clk_ena_19 ));
    AND3 \U3/un6_cnt_I_83  (.A(\U3/U1.DWACT_FINC_E[6] ), .B(
        \U3/U1.DWACT_FINC_E[7] ), .C(\U3/U1.DWACT_FINC_E[8] ), .Y(
        \U3/N_62 ));
    AX1C \U1/un6_count_1_I_9  (.A(\U1/count[1]_net_1 ), .B(
        \U1/count[0]_net_1 ), .C(\U1/count[2]_net_1 ), .Y(\U1/I_9 ));
    IOPAD_IN \reset_pad/U0/U0  (.PAD(reset), .Y(\reset_pad/U0/NET1 ));
    AND2 \U1/un6_count_1_I_41  (.A(\U1/count[6]_net_1 ), .B(
        \U1/count[7]_net_1 ), .Y(\U1/U1.DWACT_FINC_E[3] ));
    DFN1E0 \U2/Data_Second_Buf[82]  (.D(\U2/Data_Second_Buf_6[82] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[82]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[30]  (.D(\U2/Data_First_Buf_5[30] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[30]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[5]  (.D(\U2/N_10 ), .CLK(clk_LCD), .E(
        \U2/state_RNIOSR4_0[4] ), .Q(\U2/Data_First_Buf[5]_net_1 ));
    MX2 \U2/DB8_RNO[1]  (.A(\U2/state[3]_net_1 ), .B(\U2/N_160 ), .S(
        \U2/N_156 ), .Y(\U2/N_121 ));
    DFN1C1 \U3/cnt[5]  (.D(\U3/I_24_0 ), .CLK(clk_48M_c), .CLR(reset_c)
        , .Q(\U3/cnt[5]_net_1 ));
    DFN1E0 \U2/Data_First_Buf[49]  (.D(\U2/Data_First_Buf_5[49] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIOSR4_0[4] ), .Q(
        \U2/Data_First_Buf[49]_net_1 ));
    DFN1E0 \U2/Data_Second_Buf[42]  (.D(\U2/Data_Second_Buf_6[42] ), 
        .CLK(clk_LCD), .E(\U2/state_RNIQSR4_0[6] ), .Q(
        \U2/Data_Second_Buf[42]_net_1 ));
    DFN1E0 \U2/Data_Second_Buf[109]  (.D(\U2/Data_Second_Buf_6[109] ),