stdout.log

液晶屏lcd1602的使用历程

License checkout: synplify_pc

Starting:    D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1\bin\mbin\synplify.exe
Install:     D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1
Date:        Thu Jan 29 17:09:13 2009
Version:     9.4A1


Arguments:   -product synplify LCD_Top_syn.prj
ProductType: synplify

License checkout: synplify_pc
License: synplify_pc node-locked 



Running synthesis on LCD_Top_syn:synthesis

log file: "D:\Actelprj\LCD_1602\synthesis\LCD_Top.srr"


Running Verilog Compiler...

Job: "Verilog Compiler" terminated with error status: 2.
See log file: "D:\Actelprj\LCD_1602\synthesis\LCD_Top.srr"
Return Code: 2


Verilog Compiler exited with errors

Opening object souirce file d:\actelprj\lcd_1602\hdl\lcd_top.v

Running synthesis on LCD_Top_syn:synthesis

log file: "D:\Actelprj\LCD_1602\synthesis\LCD_Top.srr"


Running Verilog Compiler...

Running synthesis on LCD_Top_syn:synthesis

log file: "D:\Actelprj\LCD_1602\synthesis\LCD_Top.srr"


Verilog Compiler Completed
Return Code: 0


Running Fusion Mapper...

Fusion Mapper Completed with warnings
Return Code: 1


Running Verilog Compiler_1...

Verilog Compiler_1 Completed
Return Code: 0


Running Fusion Mapper_1...

Fusion Mapper_1 Completed with warnings
Return Code: 1


exit status=0