lcd_top.tlg

液晶屏lcd1602的使用历程

Selecting top level module LCD_Top
@N: CG364 :"D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1\lib\proasic\fusion.v":2043:7:2043:9|Synthesizing module VCC

@N: CG364 :"D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1\lib\proasic\fusion.v":1224:7:1224:9|Synthesizing module GND

@N: CG364 :"D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1\lib\proasic\fusion.v":2974:7:2974:9|Synthesizing module PLL

@N: CG364 :"D:\Actel\Libero\Libero_v8.4\Synplify\synplify_94A1\lib\proasic\fusion.v":260:7:260:12|Synthesizing module PLLINT

@N: CG364 :"D:\Actelprj\LCD_1602\smartgen\PLL_1M\PLL_1M.v":5:7:5:12|Synthesizing module PLL_1M

@N: CG364 :"D:\Actelprj\LCD_1602\hdl\Clock_Gen.v":4:7:4:15|Synthesizing module Clock_Gen

@N: CG179 :"D:\Actelprj\LCD_1602\hdl\Clock_Gen.v":34:27:34:33|Removing redundant assignment
@W: CS148 :"D:\Actelprj\LCD_1602\hdl\Clock_Gen.v":14:12:14:13|Undriven input OADIVRST, tying to 0
@N: CG364 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":6:7:6:16|Synthesizing module LCD_Driver

@A:"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Feedback mux created for signal Data_Second_Buf[111:0]. Did you forget the set/reset assignment for this signal? Specifying a reset value will improve timing and area
@A:"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Feedback mux created for signal Data_First_Buf[111:0]. Did you forget the set/reset assignment for this signal? Specifying a reset value will improve timing and area
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[0] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[4] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[6] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[7] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[1] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[2] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[6] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[7] is always 0, optimizing ...
@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <7> of Data_First_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <6> of Data_First_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <4> of Data_First_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <0> of Data_First_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <7> of Data_Second_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <6> of Data_Second_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <2> of Data_Second_Buf[111:0] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <1> of Data_Second_Buf[111:0] 

@N: CG364 :"D:\Actelprj\LCD_1602\hdl\LED.v":2:7:2:9|Synthesizing module LED

@N: CG364 :"D:\Actelprj\LCD_1602\hdl\LCD_Top.v":4:7:4:13|Synthesizing module LCD_Top

@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[8] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[12] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[15] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[10] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[14] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[15] is always 0, optimizing ...
@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <15> of Data_Second_Buf[111:8] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <14> of Data_Second_Buf[111:8] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <10> of Data_Second_Buf[111:8] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <15> of Data_First_Buf[111:8] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <12> of Data_First_Buf[111:8] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <8> of Data_First_Buf[111:8] 

@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[22] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[23] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[20] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[23] is always 0, optimizing ...
@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <23> of Data_First_Buf[111:16] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <20> of Data_First_Buf[111:16] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <23> of Data_Second_Buf[111:16] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <22> of Data_Second_Buf[111:16] 

@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[30] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_Second_Buf[31] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[28] is always 0, optimizing ...
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[31] is always 0, optimizing ...
@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <31> of Data_First_Buf[111:24] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <28> of Data_First_Buf[111:24] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <31> of Data_Second_Buf[111:24] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <30> of Data_Second_Buf[111:24] 

@N: CL201 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Trying to extract state machine for register state
Extracted state machine for register state
State machine has 8 reachable states with original encodings of:
   0000
   0001
   0010
   0011
   0100
   0101
   0110
   0111
@W: CL189 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Register bit Data_First_Buf[39] is always 0, optimizing ...
@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <39> of Data_First_Buf[111:32] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <39> of Data_Second_Buf[111:32] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <3> of Data_First_Buf[3:1] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <2> of Data_First_Buf[3:1] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <5> of Data_Second_Buf[5:3] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <4> of Data_Second_Buf[5:3] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <11> of Data_First_Buf[11:9] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <10> of Data_First_Buf[11:9] 

@W: CL171 :"D:\Actelprj\LCD_1602\hdl\LCD_Driver.v":42:0:42:5|Pruning Register bit <13> of Data_Second_Buf[13:11]