📄 system_lpc17xx.c
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// <3=> Pclk = Hclk / 8
// </h>
//
// <h> Power Control for Peripherals Register (PCONP)
// <o11.1> PCTIM0: Timer/Counter 0 power/clock enable
// <o11.2> PCTIM1: Timer/Counter 1 power/clock enable
// <o11.3> PCUART0: UART 0 power/clock enable
// <o11.4> PCUART1: UART 1 power/clock enable
// <o11.6> PCPWM1: PWM 1 power/clock enable
// <o11.7> PCI2C0: I2C interface 0 power/clock enable
// <o11.8> PCSPI: SPI interface power/clock enable
// <o11.9> PCRTC: RTC power/clock enable
// <o11.10> PCSSP1: SSP interface 1 power/clock enable
// <o11.12> PCAD: A/D converter power/clock enable
// <o11.13> PCCAN1: CAN controller 1 power/clock enable
// <o11.14> PCCAN2: CAN controller 2 power/clock enable
// <o11.15> PCGPIO: GPIOs power/clock enable
// <o11.16> PCRIT: Repetitive interrupt timer power/clock enable
// <o11.17> PCMC: Motor control PWM power/clock enable
// <o11.18> PCQEI: Quadrature encoder interface power/clock enable
// <o11.19> PCI2C1: I2C interface 1 power/clock enable
// <o11.21> PCSSP0: SSP interface 0 power/clock enable
// <o11.22> PCTIM2: Timer 2 power/clock enable
// <o11.23> PCTIM3: Timer 3 power/clock enable
// <o11.24> PCUART2: UART 2 power/clock enable
// <o11.25> PCUART3: UART 3 power/clock enable
// <o11.26> PCI2C2: I2C interface 2 power/clock enable
// <o11.27> PCI2S: I2S interface power/clock enable
// <o11.29> PCGPDMA: GP DMA function power/clock enable
// <o11.30> PCENET: Ethernet block power/clock enable
// <o11.31> PCUSB: USB interface power/clock enable
// </h>
// </e>
*/
#define CLOCK_SETUP 1
#define SCS_Val 0x00000020
#define CLKSRCSEL_Val 0x00000001
#define PLL0_SETUP 1
#define PLL0CFG_Val 0x0000000B
#define PLL1_SETUP 0
#define PLL1CFG_Val 0x00000000
#define CCLKCFG_Val 0x00000003
#define USBCLKCFG_Val 0x00000000
#define PCLKSEL0_Val 0x00000000
#define PCLKSEL1_Val 0x00000000
#define PCONP_Val 0x042887DE
/*--------------------- Flash Accelerator Configuration ----------------------
//
// <e> Flash Accelerator Configuration
// <o1.0..3> Flash Accelerator Control Register (FLASHCTRL)
// <0=> Turned off
// <8=> Deterministic Mode
// <9=> Instruction buffering (all branches)
// <10=> Data buffering.
// <11=> Instruction and Data buffering (all branches)
// <13=> Instruction buffering (only backward branches)
// <15=> Instruction and Data buffering (only backward branches)
// <o2.0..2> Flash Accelerator Timing Register (FLASHTIM)
// <0=> Reserved <1=> 1 <2=> 2 <3=> 3
// <4=> 4 <5=> 5 <6=> 6 <7=> 7
// <i> Fetch Cycles (in CCLK cycles)
// </e>
*/
#define FLASH_SETUP 1
#define FLASHCTRL_Val 0x0000000B
#define FLASHTIM_Val 0x00000003
/*
//-------- <<< end of configuration section >>> ------------------------------
*/
/*----------------------------------------------------------------------------
Check the register settings
*----------------------------------------------------------------------------*/
#define CHECK_RANGE(val, min, max) ((val < min) || (val > max))
#define CHECK_RSVD(val, mask) (val & mask)
/* Clock Configuration -------------------------------------------------------*/
#if (CHECK_RSVD((SCS_Val), ~0x00000030))
#error "SCS: Invalid values of reserved bits!"
#endif
#if (CHECK_RANGE((CLKSRCSEL_Val), 0, 2))
#error "CLKSRCSEL: Value out of range!"
#endif
#if (CHECK_RSVD((PLL0CFG_Val), ~0x00FF7FFF))
#error "PLL0CFG: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((PLL1CFG_Val), ~0x0000007F))
#error "PLL1CFG: Invalid values of reserved bits!"
#endif
#if ((CCLKCFG_Val != 0) && (((CCLKCFG_Val - 1) % 2)))
#error "CCLKCFG: CCLKSEL field does not contain only odd values or 0!"
#endif
#if (CHECK_RSVD((USBCLKCFG_Val), ~0x0000000F))
#error "USBCLKCFG: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((PCLKSEL0_Val), 0x000C0C00))
#error "PCLKSEL0: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((PCLKSEL1_Val), 0x03000300))
#error "PCLKSEL1: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((PCONP_Val), 0x10100821))
#error "PCONP: Invalid values of reserved bits!"
#endif
/* Flash Accelerator Configuration -------------------------------------------*/
#if (CHECK_RSVD((FLASHCTRL_Val), ~0x0000000F))
#error "FLASHCTRL: Invalid values of reserved bits!"
#endif
#if (CHECK_RSVD((FLASHTIM_Val), ~0x00000007))
#error "FLASHTIM: Invalid values of reserved bits!"
#endif
/*----------------------------------------------------------------------------
DEFINES
*----------------------------------------------------------------------------*/
/*----------------------------------------------------------------------------
Define clocks
*----------------------------------------------------------------------------*/
#define XTAL (12000000UL) /* Oscillator frequency */
#define OSC_CLK ( XTAL) /* Main oscillator frequency */
#define RTC_CLK ( 32000UL) /* RTC oscillator frequency */
#define IRC_OSC ( 4000000UL) /* Internal RC oscillator frequency */
/*----------------------------------------------------------------------------
Clock Variable definitions
*----------------------------------------------------------------------------*/
uint32_t SystemFrequency = IRC_OSC; /*!< System Clock Frequency (Core Clock) */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.
* Initialize the System and update the SystemFrequency variable.
*/
void SystemInit (void)
{
#if (CLOCK_SETUP) /* Clock Setup */
SC->SCS = SCS_Val;
if (SCS_Val & (1 << 5)) { /* If Main Oscillator is enabled */
while ((SC->SCS & (1 << 6)) == 0); /* Wait for Oscillator to be ready */
}
#if (PLL0_SETUP)
SC->CLKSRCSEL = CLKSRCSEL_Val; /* Select Clock Source for PLL0 */
SC->PLL0CFG = PLL0CFG_Val;
SC->PLL0CON = 0x01; /* PLL0 Enable */
SC->PLL0FEED = 0xAA;
SC->PLL0FEED = 0x55;
while (!(SC->PLL0STAT & (1 << 26))); /* Wait for PLOCK0 */
SC->CCLKCFG = CCLKCFG_Val; /* Setup Clock Divider */
SC->PLL0CON = 0x03; /* PLL0 Enable & Connect */
SC->PLL0FEED = 0xAA;
SC->PLL0FEED = 0x55;
#endif
#if (PLL1_SETUP)
SC->PLL1CFG = PLL1CFG_Val;
SC->PLL1CON = 0x01; /* PLL1 Enable */
SC->PLL1FEED = 0xAA;
SC->PLL1FEED = 0x55;
while (!(SC->PLL1STAT & (1 << 26))); /* Wait for PLOCK1 */
SC->PLL1CON = 0x03; /* PLL1 Enable & Connect */
SC->PLL1FEED = 0xAA;
SC->PLL1FEED = 0x55;
#endif
#endif
/* Determine clock frequency according to clock register values */
if (((SC->PLL0STAT >> 24) & 3) == 3) {/* If PLL0 enabled and connected */
switch (SC->CLKSRCSEL & 0x03) {
case 0: /* Internal RC oscillator => PLL0 */
case 3: /* Reserved, default to Internal RC */
SystemFrequency = (IRC_OSC *
(((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) /
(((SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((SC->CCLKCFG & 0xFF)+ 1));
break;
case 1: /* Main oscillator => PLL0 */
SystemFrequency = (OSC_CLK *
(((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) /
(((SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((SC->CCLKCFG & 0xFF)+ 1));
break;
case 2: /* RTC oscillator => PLL0 */
SystemFrequency = (RTC_CLK *
(((2 * ((SC->PLL0STAT & 0x7FFF) + 1))) /
(((SC->PLL0STAT >> 16) & 0xFF) + 1)) /
((SC->CCLKCFG & 0xFF)+ 1));
break;
}
} else {
switch (SC->CLKSRCSEL & 0x03) {
case 0: /* Internal RC oscillator => PLL0 */
case 3: /* Reserved, default to Internal RC */
SystemFrequency = IRC_OSC / ((SC->CCLKCFG & 0xFF)+ 1);
break;
case 1: /* Main oscillator => PLL0 */
SystemFrequency = OSC_CLK / ((SC->CCLKCFG & 0xFF)+ 1);
break;
case 2: /* RTC oscillator => PLL0 */
SystemFrequency = RTC_CLK / ((SC->CCLKCFG & 0xFF)+ 1);
break;
}
}
#if (FLASH_SETUP == 1) /* Flash Accelerator Setup */
SC->FLASHTIM = FLASHTIM_Val;
SC->FLASHCTRL = FLASHCTRL_Val;
#endif
}
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