lcd.c

via framebuffer driver

		break;
	default:
		viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
		viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
		viaparinfo->lvds_setting_info->lcd_panel_id =
			LCD_PANEL_ID1_800X600;
		viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
		viaparinfo->lvds_setting_info->LCDDithering = 1;
		return (VIA_RES_800X600);
	}
}

static int lvds_register_read(int index)
{
	u8 data;
	int status;
	u8 tmp;

	tmp = viaparinfo->chip_info->chip_on_slot;

	viaparinfo->chip_info->chip_on_slot = PORT_ON_AGP;
	status =
	    viafb_i2cReadByte((u8) viaparinfo->chip_info->
	    lvds_chip_info.lvds_chip_slave_addr,
			(u8) index, &data);

	viaparinfo->chip_info->chip_on_slot = tmp;
	return (data);
}

static void load_lcd_scaling(int set_hres, int set_vres, int panel_hres,
		      int panel_vres)
{
	int reg_value = 0;
	int viafb_load_reg_num;
	struct io_register *reg = NULL;

	DEBUG_MSG(KERN_INFO "load_lcd_scaling()!!\n");

	/* LCD Scaling Enable */
	viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2);
	if (UNICHROME_P4M900 == viaparinfo->chip_info->gfx_chip_name) {
		viafb_load_scaling_factor_for_p4m900(set_hres, set_vres,
					       panel_hres, panel_vres);
		return;
	}

	/* Check if expansion for horizontal */
	if (set_hres != panel_hres) {
		/* Load Horizontal Scaling Factor */
		switch (viaparinfo->chip_info->gfx_chip_name) {
		case UNICHROME_CLE266:
		case UNICHROME_K400:
			reg_value =
			    CLE266_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
			viafb_load_reg_num =
			    lcd_scaling_factor_CLE.lcd_hor_scaling_factor.
			    reg_num;
			reg = lcd_scaling_factor_CLE.lcd_hor_scaling_factor.reg;
			viafb_load_reg(reg_value,
				viafb_load_reg_num, reg, VIACR);
			break;
		case UNICHROME_K800:
		case UNICHROME_PM800:
		case UNICHROME_CN700:
		case UNICHROME_CX700:
		case UNICHROME_K8M890:
		case UNICHROME_P4M890:
			reg_value =
			    K800_LCD_HOR_SCF_FORMULA(set_hres, panel_hres);
			/* Horizontal scaling enabled */
			viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6);
			viafb_load_reg_num =
			    lcd_scaling_factor.lcd_hor_scaling_factor.reg_num;
			reg = lcd_scaling_factor.lcd_hor_scaling_factor.reg;
			viafb_load_reg(reg_value,
				viafb_load_reg_num, reg, VIACR);
			break;
		}

		DEBUG_MSG(KERN_INFO "Horizontal Scaling value = %d", reg_value);
	} else {
		/* Horizontal scaling disabled */
		viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7);
	}

	/* Check if expansion for vertical */
	if (set_vres != panel_vres) {
		/* Load Vertical Scaling Factor */
		switch (viaparinfo->chip_info->gfx_chip_name) {
		case UNICHROME_CLE266:
		case UNICHROME_K400:
			reg_value =
			    CLE266_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
			viafb_load_reg_num =
			    lcd_scaling_factor_CLE.lcd_ver_scaling_factor.
			    reg_num;
			reg = lcd_scaling_factor_CLE.lcd_ver_scaling_factor.reg;
			viafb_load_reg(reg_value,
				viafb_load_reg_num, reg, VIACR);
			break;
		case UNICHROME_K800:
		case UNICHROME_PM800:
		case UNICHROME_CN700:
		case UNICHROME_CX700:
		case UNICHROME_K8M890:
		case UNICHROME_P4M890:
			reg_value =
			    K800_LCD_VER_SCF_FORMULA(set_vres, panel_vres);
			/* Vertical scaling enabled */
			viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3);
			viafb_load_reg_num =
			    lcd_scaling_factor.lcd_ver_scaling_factor.reg_num;
			reg = lcd_scaling_factor.lcd_ver_scaling_factor.reg;
			viafb_load_reg(reg_value,
				viafb_load_reg_num, reg, VIACR);
			break;
		}

		DEBUG_MSG(KERN_INFO "Vertical Scaling value = %d", reg_value);
	} else {
		/* Vertical scaling disabled */
		viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3);
	}
}

static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
	int panel_id)
{
	int vmode_index;
	int reg_num = 0;
	struct io_reg *lcd_patch_reg = NULL;

	if (viaparinfo->lvds_setting_info->iga_path == IGA2)
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
	else
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
	switch (panel_id) {
		/* LCD 800x600 */
	case LCD_PANEL_ID1_800X600:
		switch (vmode_index) {
		case VIA_RES_640X400:
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_8X6;
			lcd_patch_reg = K400_LCD_RES_6X4_8X6;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_K400_LCD_RES_7X4_8X6;
			lcd_patch_reg = K400_LCD_RES_7X4_8X6;
			break;
		}
		break;

		/* LCD 1024x768 */
	case LCD_PANEL_ID2_1024X768:
		switch (vmode_index) {
		case VIA_RES_640X400:
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_10X7;
			lcd_patch_reg = K400_LCD_RES_6X4_10X7;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_K400_LCD_RES_7X4_10X7;
			lcd_patch_reg = K400_LCD_RES_7X4_10X7;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_K400_LCD_RES_8X6_10X7;
			lcd_patch_reg = K400_LCD_RES_8X6_10X7;
			break;
		}
		break;

		/* LCD 1280x1024 */
	case LCD_PANEL_ID4_1280X1024:
		switch (vmode_index) {
		case VIA_RES_640X400:
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_12X10;
			lcd_patch_reg = K400_LCD_RES_6X4_12X10;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_K400_LCD_RES_7X4_12X10;
			lcd_patch_reg = K400_LCD_RES_7X4_12X10;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_K400_LCD_RES_8X6_12X10;
			lcd_patch_reg = K400_LCD_RES_8X6_12X10;
			break;
		case VIA_RES_1024X768:
			reg_num = NUM_TOTAL_K400_LCD_RES_10X7_12X10;
			lcd_patch_reg = K400_LCD_RES_10X7_12X10;
			break;

		}
		break;

		/* LCD 1400x1050 */
	case LCD_PANEL_ID5_1400X1050:
		switch (vmode_index) {
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_14X10;
			lcd_patch_reg = K400_LCD_RES_6X4_14X10;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_K400_LCD_RES_8X6_14X10;
			lcd_patch_reg = K400_LCD_RES_8X6_14X10;
			break;
		case VIA_RES_1024X768:
			reg_num = NUM_TOTAL_K400_LCD_RES_10X7_14X10;
			lcd_patch_reg = K400_LCD_RES_10X7_14X10;
			break;
		case VIA_RES_1280X768:
		case VIA_RES_1280X800:
		case VIA_RES_1280X960:
		case VIA_RES_1280X1024:
			reg_num = NUM_TOTAL_K400_LCD_RES_12X10_14X10;
			lcd_patch_reg = K400_LCD_RES_12X10_14X10;
			break;
		}
		break;

		/* LCD 1600x1200 */
	case LCD_PANEL_ID6_1600X1200:
		switch (vmode_index) {
		case VIA_RES_640X400:
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_16X12;
			lcd_patch_reg = K400_LCD_RES_6X4_16X12;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_K400_LCD_RES_7X4_16X12;
			lcd_patch_reg = K400_LCD_RES_7X4_16X12;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_K400_LCD_RES_8X6_16X12;
			lcd_patch_reg = K400_LCD_RES_8X6_16X12;
			break;
		case VIA_RES_1024X768:
			reg_num = NUM_TOTAL_K400_LCD_RES_10X7_16X12;
			lcd_patch_reg = K400_LCD_RES_10X7_16X12;
			break;
		case VIA_RES_1280X768:
		case VIA_RES_1280X800:
		case VIA_RES_1280X960:
		case VIA_RES_1280X1024:
			reg_num = NUM_TOTAL_K400_LCD_RES_12X10_16X12;
			lcd_patch_reg = K400_LCD_RES_12X10_16X12;
			break;
		}
		break;

		/* LCD 1366x768 */
	case LCD_PANEL_ID7_1366X768:
		switch (vmode_index) {
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_K400_LCD_RES_6X4_1366X7;
			lcd_patch_reg = K400_LCD_RES_6X4_1366X7;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_K400_LCD_RES_7X4_1366X7;
			lcd_patch_reg = K400_LCD_RES_7X4_1366X7;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_K400_LCD_RES_8X6_1366X7;
			lcd_patch_reg = K400_LCD_RES_8X6_1366X7;
			break;
		case VIA_RES_1024X768:
			reg_num = NUM_TOTAL_K400_LCD_RES_10X7_1366X7;
			lcd_patch_reg = K400_LCD_RES_10X7_1366X7;
			break;
		case VIA_RES_1280X768:
		case VIA_RES_1280X800:
		case VIA_RES_1280X960:
		case VIA_RES_1280X1024:
			reg_num = NUM_TOTAL_K400_LCD_RES_12X10_1366X7;
			lcd_patch_reg = K400_LCD_RES_12X10_1366X7;
			break;
		}
		break;

		/* LCD 1360x768 */
	case LCD_PANEL_IDB_1360X768:
		break;
	}
	if (reg_num != 0) {
		/* H.W. Reset : ON */
		viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);

		viafb_write_regx(lcd_patch_reg, reg_num);

		/* H.W. Reset : OFF */
		viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);

		/* Reset PLL */
		viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
		viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);

		/* Fire! */
		outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
	}
}

static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
	int panel_id)
{
	int vmode_index;
	int reg_num = 0;
	struct io_reg *lcd_patch_reg = NULL;

	if (viaparinfo->lvds_setting_info->iga_path == IGA2)
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
	else
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);

	switch (panel_id) {
	case LCD_PANEL_ID5_1400X1050:
		switch (vmode_index) {
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_P880_LCD_RES_6X4_14X10;
			lcd_patch_reg = P880_LCD_RES_6X4_14X10;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_P880_LCD_RES_8X6_14X10;
			lcd_patch_reg = P880_LCD_RES_8X6_14X10;
			break;
		}
		break;
	case LCD_PANEL_ID6_1600X1200:
		switch (vmode_index) {
		case VIA_RES_640X400:
		case VIA_RES_640X480:
			reg_num = NUM_TOTAL_P880_LCD_RES_6X4_16X12;
			lcd_patch_reg = P880_LCD_RES_6X4_16X12;
			break;
		case VIA_RES_720X480:
		case VIA_RES_720X576:
			reg_num = NUM_TOTAL_P880_LCD_RES_7X4_16X12;
			lcd_patch_reg = P880_LCD_RES_7X4_16X12;
			break;
		case VIA_RES_800X600:
			reg_num = NUM_TOTAL_P880_LCD_RES_8X6_16X12;
			lcd_patch_reg = P880_LCD_RES_8X6_16X12;
			break;
		case VIA_RES_1024X768:
			reg_num = NUM_TOTAL_P880_LCD_RES_10X7_16X12;
			lcd_patch_reg = P880_LCD_RES_10X7_16X12;
			break;
		case VIA_RES_1280X768:
		case VIA_RES_1280X960:
		case VIA_RES_1280X1024:
			reg_num = NUM_TOTAL_P880_LCD_RES_12X10_16X12;
			lcd_patch_reg = P880_LCD_RES_12X10_16X12;
			break;
		}
		break;

	}
	if (reg_num != 0) {
		/* H.W. Reset : ON */
		viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);

		viafb_write_regx(lcd_patch_reg, reg_num);

		/* H.W. Reset : OFF */
		viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);

		/* Reset PLL */
		viafb_write_reg_mask(SR40, VIASR, 0x02, BIT1);
		viafb_write_reg_mask(SR40, VIASR, 0x00, BIT1);

		/* Fire! */
		outb(inb(VIARMisc) | (BIT2 + BIT3), VIAWMisc);
	}
}

static void load_lcd_patch_regs(int set_hres, int set_vres,
	int panel_id, int set_iga)
{
	int vmode_index;

	if (viaparinfo->lvds_setting_info->iga_path == IGA2)
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
	else
		vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);

	viafb_unlock_crt();

	/* Patch for simultaneous & Expansion */
	if ((set_iga == IGA1_IGA2) &&
		(viaparinfo->lvds_setting_info->display_method ==
	    LCD_EXPANDSION)) {
		switch (viaparinfo->chip_info->gfx_chip_name) {
		case UNICHROME_CLE266:
		case UNICHROME_K400:
			load_lcd_k400_patch_tbl(set_hres, set_vres, panel_id);
			break;
		case UNICHROME_K800:
			break;
		case UNICHROME_PM800:
		case UNICHROME_CN700:
		case UNICHROME_CX700:
			load_lcd_p880_patch_tbl(set_hres, set_vres, panel_id);
		}
	}

	viafb_lock_crt();
}

static void via_pitch_alignment_patch_lcd(
	struct lvds_setting_information *plvds_setting_info,
				   struct lvds_chip_information
				   *plvds_chip_info)
{
	unsigned char cr13, cr35, cr65, cr66, cr67;
	unsigned long dwScreenPitch = 0;
	unsigned long dwPitch;

	dwPitch = plvds_setting_info->h_active * (plvds_setting_info->bpp >> 3);
	if (dwPitch & 0x1F) {
		dwScreenPitch = ((dwPitch + 31) & ~31) >> 3;
		if (plvds_setting_info->iga_path == IGA2) {
			if (plvds_setting_info->bpp > 8) {
				cr66 = (unsigned char)(dwScreenPitch & 0xFF);
				viafb_write_reg(CR66, VIACR, cr66);
				cr67 = viafb_read_reg(VIACR, CR67) & 0xFC;
				cr67 |=
				    (unsigned
				     char)((dwScreenPitch & 0x300) >> 8);
				viafb_write_reg(CR67, VIACR, cr67);
			}

			/* Fetch Count */
			cr67 = viafb_read_reg(VIACR, CR67) & 0xF3;
			cr67 |= (unsigned char)((dwScreenPitch & 0x600) >> 7);
			viafb_write_reg(CR67, VIACR, cr67);
			cr65 = (unsigned char)((dwScreenPitch >> 1) & 0xFF);
			cr65 += 2;
			viafb_write_reg(CR65, VIACR, cr65);
		} else {
			if (plvds_setting_info->bpp > 8) {
				cr13 = (unsigned char)(dwScreenPitch & 0xFF);
				viafb_write_reg(CR13, VIACR, cr13);
				cr35 = viafb_read_reg(VIACR, CR35) & 0x1F;
				cr35 |=
				    (unsigned
				     char)((dwScreenPitch & 0x700) >> 3);
				viafb_write_reg(CR35, VIACR, cr35);
			}
		}
	}
}
static void lcd_patch_skew_dvp0(struct lvds_setting_information
			 *plvds_setting_info,