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📄 stm32f10x_it.txt

📁 STM32的定时器例程
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;;;408    }
000000  4770              BX       lr
;;;409    
                          ENDP


                          AREA ||i.TIM1_BRK_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM1_BRK_IRQHandler PROC
;;;418    {
;;;419    }
000000  4770              BX       lr
;;;420    
                          ENDP


                          AREA ||i.TIM1_UP_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM1_UP_IRQHandler PROC
;;;430    {
;;;431    }
000000  4770              BX       lr
;;;432    
                          ENDP


                          AREA ||i.TIM1_TRG_COM_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM1_TRG_COM_IRQHandler PROC
;;;442    {
;;;443    }
000000  4770              BX       lr
;;;444    
                          ENDP


                          AREA ||i.TIM1_CC_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM1_CC_IRQHandler PROC
;;;453    {
;;;454    }
000000  4770              BX       lr
;;;455    
                          ENDP


                          AREA ||i.TIM2_IRQHandler||, CODE, READONLY, ALIGN=2

                  TIM2_IRQHandler PROC
;;;463    void TIM2_IRQHandler(void)
;;;464    {
000000  b570              PUSH     {r4-r6,lr}
;;;465      /* TIM2_CH1 toggling with frequency = 183.1 Hz */
;;;466      if (TIM_GetITStatus(TIM2, TIM_IT_CC1) != RESET)
000002  2102              MOVS     r1,#2
000004  074d              LSLS     r5,r1,#29
000006  4628              MOV      r0,r5
000008  f7fffffe          BL       TIM_GetITStatus
00000c  4c2a              LDR      r4,|L38.184|
00000e  b178              CBZ      r0,|L38.48|
;;;467      {
;;;468        TIM_ClearITPendingBit(TIM2, TIM_IT_CC1 );
000010  2102              MOVS     r1,#2
000012  4628              MOV      r0,r5
000014  f7fffffe          BL       TIM_ClearITPendingBit
;;;469    	capture1 = TIM_GetCapture1(TIM2);
000018  4628              MOV      r0,r5
00001a  f7fffffe          BL       TIM_GetCapture1
;;;470    	TIM_SetCompare1(TIM2, capture1 + CCR1_Val );
00001e  4927              LDR      r1,|L38.188|
000020  8020              STRH     r0,[r4,#0]            ;469  ; capture1
000022  8809              LDRH     r1,[r1,#0]  ; CCR1_Val
000024  b280              UXTH     r0,r0
000026  4408              ADD      r0,r0,r1
000028  b281              UXTH     r1,r0
00002a  4628              MOV      r0,r5
00002c  f7fffffe          BL       TIM_SetCompare1
                  |L38.48|
;;;471      }
;;;472      
;;;473      /* TIM2_CH2 toggling with frequency = 366.2 Hz */
;;;474      if (TIM_GetITStatus(TIM2, TIM_IT_CC2) != RESET)
000030  2104              MOVS     r1,#4
000032  4628              MOV      r0,r5
000034  f7fffffe          BL       TIM_GetITStatus
000038  b178              CBZ      r0,|L38.90|
;;;475      {
;;;476         TIM_ClearITPendingBit(TIM2, TIM_IT_CC2);
00003a  2104              MOVS     r1,#4
00003c  4628              MOV      r0,r5
00003e  f7fffffe          BL       TIM_ClearITPendingBit
;;;477    	capture2 = TIM_GetCapture2(TIM2);
000042  4628              MOV      r0,r5
000044  f7fffffe          BL       TIM_GetCapture2
;;;478        TIM_SetCompare2(TIM2, capture2 + CCR2_Val);
000048  491d              LDR      r1,|L38.192|
00004a  8060              STRH     r0,[r4,#2]            ;477  ; capture2
00004c  8809              LDRH     r1,[r1,#0]  ; CCR2_Val
00004e  b280              UXTH     r0,r0
000050  4408              ADD      r0,r0,r1
000052  b281              UXTH     r1,r0
000054  4628              MOV      r0,r5
000056  f7fffffe          BL       TIM_SetCompare2
                  |L38.90|
;;;479      }	
;;;480    
;;;481      /* TIM2_CH3 toggling with frequency = 732.4 Hz */
;;;482      if (TIM_GetITStatus(TIM2, TIM_IT_CC3) != RESET)
00005a  2108              MOVS     r1,#8
00005c  4628              MOV      r0,r5
00005e  f7fffffe          BL       TIM_GetITStatus
000062  b178              CBZ      r0,|L38.132|
;;;483      {
;;;484        TIM_ClearITPendingBit(TIM2, TIM_IT_CC3);
000064  2108              MOVS     r1,#8
000066  4628              MOV      r0,r5
000068  f7fffffe          BL       TIM_ClearITPendingBit
;;;485    	capture3 = TIM_GetCapture3(TIM2);
00006c  4628              MOV      r0,r5
00006e  f7fffffe          BL       TIM_GetCapture3
;;;486        TIM_SetCompare3(TIM2, capture3 + CCR3_Val);
000072  4914              LDR      r1,|L38.196|
000074  80a0              STRH     r0,[r4,#4]            ;485  ; capture3
000076  8809              LDRH     r1,[r1,#0]  ; CCR3_Val
000078  b280              UXTH     r0,r0
00007a  4408              ADD      r0,r0,r1
00007c  b281              UXTH     r1,r0
00007e  4628              MOV      r0,r5
000080  f7fffffe          BL       TIM_SetCompare3
                  |L38.132|
;;;487      }
;;;488    
;;;489      /* TIM2_CH4 toggling with frequency = 1464.8 Hz */
;;;490      if (TIM_GetITStatus(TIM2, TIM_IT_CC4) != RESET) 
000084  2110              MOVS     r1,#0x10
000086  4628              MOV      r0,r5
000088  f7fffffe          BL       TIM_GetITStatus
00008c  2800              CMP      r0,#0
00008e  d011              BEQ      |L38.180|
;;;491      {
;;;492        TIM_ClearITPendingBit(TIM2, TIM_IT_CC4);
000090  2110              MOVS     r1,#0x10
000092  4628              MOV      r0,r5
000094  f7fffffe          BL       TIM_ClearITPendingBit
;;;493    	capture4 = TIM_GetCapture4(TIM2);
000098  4628              MOV      r0,r5
00009a  f7fffffe          BL       TIM_GetCapture4
;;;494        TIM_SetCompare4(TIM2, capture4 + CCR4_Val);
00009e  490a              LDR      r1,|L38.200|
0000a0  80e0              STRH     r0,[r4,#6]            ;493  ; capture4
0000a2  8809              LDRH     r1,[r1,#0]  ; CCR4_Val
0000a4  b280              UXTH     r0,r0
0000a6  4408              ADD      r0,r0,r1
0000a8  b281              UXTH     r1,r0
0000aa  4628              MOV      r0,r5
0000ac  e8bd4070          POP      {r4-r6,lr}
0000b0  f7ffbffe          B.W      TIM_SetCompare4
                  |L38.180|
;;;495      }		
;;;496    }
0000b4  bd70              POP      {r4-r6,pc}
;;;497    
                          ENDP

0000b6  0000              DCW      0x0000
                  |L38.184|
0000b8  00000000          DCD      ||.data||
                  |L38.188|
0000bc  00000000          DCD      CCR1_Val
                  |L38.192|
0000c0  00000000          DCD      CCR2_Val
                  |L38.196|
0000c4  00000000          DCD      CCR3_Val
                  |L38.200|
0000c8  00000000          DCD      CCR4_Val

                          AREA ||i.TIM3_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM3_IRQHandler PROC
;;;506    {
;;;507    }
000000  4770              BX       lr
;;;508    
                          ENDP


                          AREA ||i.TIM4_IRQHandler||, CODE, READONLY, ALIGN=1

                  TIM4_IRQHandler PROC
;;;517    {
;;;518    }
000000  4770              BX       lr
;;;519    
                          ENDP


                          AREA ||i.I2C1_EV_IRQHandler||, CODE, READONLY, ALIGN=1

                  I2C1_EV_IRQHandler PROC
;;;528    {
;;;529    }
000000  4770              BX       lr
;;;530    
                          ENDP


                          AREA ||i.I2C1_ER_IRQHandler||, CODE, READONLY, ALIGN=1

                  I2C1_ER_IRQHandler PROC
;;;539    {
;;;540    }
000000  4770              BX       lr
;;;541    
                          ENDP


                          AREA ||i.I2C2_EV_IRQHandler||, CODE, READONLY, ALIGN=1

                  I2C2_EV_IRQHandler PROC
;;;550    {
;;;551    }
000000  4770              BX       lr
;;;552    
                          ENDP


                          AREA ||i.I2C2_ER_IRQHandler||, CODE, READONLY, ALIGN=1

                  I2C2_ER_IRQHandler PROC
;;;561    {
;;;562    }
000000  4770              BX       lr
;;;563    
                          ENDP


                          AREA ||i.SPI1_IRQHandler||, CODE, READONLY, ALIGN=1

                  SPI1_IRQHandler PROC
;;;572    {
;;;573    }
000000  4770              BX       lr
;;;574    
                          ENDP


                          AREA ||i.SPI2_IRQHandler||, CODE, READONLY, ALIGN=1

                  SPI2_IRQHandler PROC
;;;583    {
;;;584    }
000000  4770              BX       lr
;;;585    
                          ENDP


                          AREA ||i.USART1_IRQHandler||, CODE, READONLY, ALIGN=1

                  USART1_IRQHandler PROC
;;;594    {
;;;595    }
000000  4770              BX       lr
;;;596    
                          ENDP


                          AREA ||i.USART2_IRQHandler||, CODE, READONLY, ALIGN=1

                  USART2_IRQHandler PROC
;;;605    {
;;;606    }
000000  4770              BX       lr
;;;607    
                          ENDP


                          AREA ||i.USART3_IRQHandler||, CODE, READONLY, ALIGN=1

                  USART3_IRQHandler PROC
;;;616    {
;;;617    }
000000  4770              BX       lr
;;;618    
                          ENDP


                          AREA ||i.EXTI15_10_IRQHandler||, CODE, READONLY, ALIGN=1

                  EXTI15_10_IRQHandler PROC
;;;627    {
;;;628    }
000000  4770              BX       lr
;;;629    
                          ENDP


                          AREA ||i.RTCAlarm_IRQHandler||, CODE, READONLY, ALIGN=1

                  RTCAlarm_IRQHandler PROC
;;;638    {
;;;639    }
000000  4770              BX       lr
;;;640    
                          ENDP


                          AREA ||i.USBWakeUp_IRQHandler||, CODE, READONLY, ALIGN=1

                  USBWakeUp_IRQHandler PROC
;;;649    {
;;;650    }
000000  4770              BX       lr
;;;651    
                          ENDP


                          AREA ||.data||, DATA, ALIGN=1

                  capture1
000000  0000              DCW      0x0000
                  capture2
000002  0000              DCW      0x0000
                  capture3
000004  0000              DCW      0x0000
                  capture4
000006  0000              DCW      0x0000

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