📄 main.txt
字号:
000078 2102 MOVS r1,#2
00007a 4630 MOV r0,r6
00007c f7fffffe BL SPI_I2S_GetFlagStatus
000080 2800 CMP r0,#0
000082 d0f9 BEQ |L5.120|
;;;90 /* Send SPI2 data */
;;;91 SPI_I2S_SendData(SPI2, SPI2_Buffer_Tx[Tx_Idx]);
000084 7820 LDRB r0,[r4,#0] ; Tx_Idx
000086 5c39 LDRB r1,[r7,r0]
000088 4628 MOV r0,r5
00008a f7fffffe BL SPI_I2S_SendData
;;;92 /* Send SPI1 data */
;;;93 SPI_I2S_SendData(SPI1, SPI1_Buffer_Tx[Tx_Idx++]);
00008e 7820 LDRB r0,[r4,#0] ; Tx_Idx
000090 f8181000 LDRB r1,[r8,r0]
000094 1c40 ADDS r0,r0,#1
000096 7020 STRB r0,[r4,#0] ; Tx_Idx
000098 4630 MOV r0,r6
00009a f7fffffe BL SPI_I2S_SendData
|L5.158|
;;;94 /* Wait for SPI2 data reception */
;;;95 while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE)==RESET);
00009e 2101 MOVS r1,#1
0000a0 4628 MOV r0,r5
0000a2 f7fffffe BL SPI_I2S_GetFlagStatus
0000a6 2800 CMP r0,#0
0000a8 d0f9 BEQ |L5.158|
;;;96 /* Read SPI2 received data */
;;;97 SPI2_Buffer_Rx[Rx_Idx] = SPI_I2S_ReceiveData(SPI2);
0000aa 4628 MOV r0,r5
0000ac f7fffffe BL SPI_I2S_ReceiveData
0000b0 7861 LDRB r1,[r4,#1] ; Rx_Idx
0000b2 f80a0001 STRB r0,[r10,r1]
|L5.182|
;;;98 /* Wait for SPI1 data reception */
;;;99 while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE)==RESET);
0000b6 2101 MOVS r1,#1
0000b8 4630 MOV r0,r6
0000ba f7fffffe BL SPI_I2S_GetFlagStatus
0000be 2800 CMP r0,#0
0000c0 d0f9 BEQ |L5.182|
;;;100 /* Read SPI1 received data */
;;;101 SPI1_Buffer_Rx[Rx_Idx++] = SPI_I2S_ReceiveData(SPI1);
0000c2 4630 MOV r0,r6
0000c4 f7fffffe BL SPI_I2S_ReceiveData
0000c8 7861 LDRB r1,[r4,#1] ; Rx_Idx
0000ca f8090001 STRB r0,[r9,r1]
0000ce 1c49 ADDS r1,r1,#1
0000d0 7061 STRB r1,[r4,#1] ; Rx_Idx
|L5.210|
0000d2 7820 LDRB r0,[r4,#0] ;86 ; Tx_Idx
0000d4 2820 CMP r0,#0x20 ;86
0000d6 d3cf BCC |L5.120|
;;;102 }
;;;103
;;;104 /* Check the corectness of written dada */
;;;105 TransferStatus1 = Buffercmp(SPI2_Buffer_Rx, SPI1_Buffer_Tx, BufferSize);
0000d8 4948 LDR r1,|L5.508|
0000da 4845 LDR r0,|L5.496|
0000dc 2220 MOVS r2,#0x20
0000de 3920 SUBS r1,r1,#0x20
0000e0 3032 ADDS r0,r0,#0x32
0000e2 f7fffffe BL Buffercmp
0000e6 70e0 STRB r0,[r4,#3] ; TransferStatus1
;;;106 TransferStatus2 = Buffercmp(SPI1_Buffer_Rx, SPI2_Buffer_Tx, BufferSize);
0000e8 4841 LDR r0,|L5.496|
0000ea 2220 MOVS r2,#0x20
0000ec 4943 LDR r1,|L5.508|
0000ee 3012 ADDS r0,r0,#0x12
0000f0 f7fffffe BL Buffercmp
0000f4 7120 STRB r0,[r4,#4] ; TransferStatus2
;;;107 GPIO_WriteBit(GPIOC, GPIO_Pin_6, TransferStatus1);
0000f6 78e2 LDRB r2,[r4,#3] ; TransferStatus1
0000f8 2140 MOVS r1,#0x40
0000fa 4841 LDR r0,|L5.512|
0000fc f7fffffe BL GPIO_WriteBit
;;;108 GPIO_WriteBit(GPIOC, GPIO_Pin_7, TransferStatus2);
000100 7922 LDRB r2,[r4,#4] ; TransferStatus2
000102 2180 MOVS r1,#0x80
000104 483e LDR r0,|L5.512|
000106 f7fffffe BL GPIO_WriteBit
;;;109 /* TransferStatus1, TransferStatus2 = PASSED, if the transmitted and received data
;;;110 are equal */
;;;111 /* TransferStatus1, TransferStatus2 = FAILED, if the transmitted and received data
;;;112 are different */
;;;113
;;;114 /* 2nd phase: SPI1 Slave and SPI2 Master */
;;;115 /* SPI1 Re-configuration ---------------------------------------------------*/
;;;116 SPI_InitStructure.SPI_Mode = SPI_Mode_Slave;
00010a 4839 LDR r0,|L5.496|
00010c f8a0b002 STRH r11,[r0,#2] ; SPI_InitStructure
;;;117 SPI_Init(SPI1, &SPI_InitStructure);
000110 4601 MOV r1,r0
000112 4630 MOV r0,r6
000114 f7fffffe BL SPI_Init
;;;118
;;;119 /* SPI2 Re-configuration ---------------------------------------------------*/
;;;120 SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
000118 4935 LDR r1,|L5.496|
00011a f44f7082 MOV r0,#0x104
00011e 8048 STRH r0,[r1,#2] ; SPI_InitStructure
;;;121 SPI_Init(SPI2, &SPI_InitStructure);
000120 4628 MOV r0,r5
000122 f7fffffe BL SPI_Init
;;;122
;;;123 /* Reset Tx_Idx, Rx_Idx indexes and receive tables values */
;;;124 Tx_Idx=0;
000126 f884b000 STRB r11,[r4,#0] ; Tx_Idx
;;;125 Rx_Idx=0;
00012a f884b001 STRB r11,[r4,#1] ; Rx_Idx
;;;126 for(k=0; k<BufferSize; k++) SPI2_Buffer_Rx[k]=0;
00012e f884b002 STRB r11,[r4,#2] ; k
|L5.306|
000132 78a0 LDRB r0,[r4,#2] ; k
000134 1c41 ADDS r1,r0,#1
000136 b2c9 UXTB r1,r1
000138 f80ab000 STRB r11,[r10,r0]
00013c 70a1 STRB r1,[r4,#2] ; k
00013e 2920 CMP r1,#0x20
000140 d3f7 BCC |L5.306|
;;;127 for(k=0; k<BufferSize; k++) SPI1_Buffer_Rx[k]=0;
000142 f884b002 STRB r11,[r4,#2] ; k
|L5.326|
000146 78a0 LDRB r0,[r4,#2] ; k
000148 1c41 ADDS r1,r0,#1
00014a b2c9 UXTB r1,r1
00014c f809b000 STRB r11,[r9,r0]
000150 70a1 STRB r1,[r4,#2] ; k
000152 2920 CMP r1,#0x20
000154 d3f7 BCC |L5.326|
000156 e02c B |L5.434|
|L5.344|
;;;128
;;;129 /* Transfer procedure */
;;;130 while(Tx_Idx<BufferSize)
;;;131 {
;;;132 /* Wait for SPI2 Tx buffer empty */
;;;133 while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_TXE)==RESET);
000158 2102 MOVS r1,#2
00015a 4628 MOV r0,r5
00015c f7fffffe BL SPI_I2S_GetFlagStatus
000160 2800 CMP r0,#0
000162 d0f9 BEQ |L5.344|
;;;134 /* Send SPI1 data */
;;;135 SPI_I2S_SendData(SPI1, SPI1_Buffer_Tx[Tx_Idx]);
000164 7820 LDRB r0,[r4,#0] ; Tx_Idx
000166 f8181000 LDRB r1,[r8,r0]
00016a 4630 MOV r0,r6
00016c f7fffffe BL SPI_I2S_SendData
;;;136 /* Send SPI2 data */
;;;137 SPI_I2S_SendData(SPI2, SPI2_Buffer_Tx[Tx_Idx++]);
000170 7820 LDRB r0,[r4,#0] ; Tx_Idx
000172 5c39 LDRB r1,[r7,r0]
000174 1c40 ADDS r0,r0,#1
000176 7020 STRB r0,[r4,#0] ; Tx_Idx
000178 4628 MOV r0,r5
00017a f7fffffe BL SPI_I2S_SendData
|L5.382|
;;;138 /* Wait for SPI1 data reception */
;;;139 while(SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE)==RESET);
00017e 2101 MOVS r1,#1
000180 4630 MOV r0,r6
000182 f7fffffe BL SPI_I2S_GetFlagStatus
000186 2800 CMP r0,#0
000188 d0f9 BEQ |L5.382|
;;;140 /* Read SPI1 received data */
;;;141 SPI1_Buffer_Rx[Rx_Idx] = SPI_I2S_ReceiveData(SPI1);
00018a 4630 MOV r0,r6
00018c f7fffffe BL SPI_I2S_ReceiveData
000190 7861 LDRB r1,[r4,#1] ; Rx_Idx
000192 f8090001 STRB r0,[r9,r1]
|L5.406|
;;;142 /* Wait for SPI2 data reception */
;;;143 while(SPI_I2S_GetFlagStatus(SPI2, SPI_I2S_FLAG_RXNE)==RESET);
000196 2101 MOVS r1,#1
000198 4628 MOV r0,r5
00019a f7fffffe BL SPI_I2S_GetFlagStatus
00019e 2800 CMP r0,#0
0001a0 d0f9 BEQ |L5.406|
;;;144 /* Read SPI2 received data */
;;;145 SPI2_Buffer_Rx[Rx_Idx++] = SPI_I2S_ReceiveData(SPI2);
0001a2 4628 MOV r0,r5
0001a4 f7fffffe BL SPI_I2S_ReceiveData
0001a8 7861 LDRB r1,[r4,#1] ; Rx_Idx
0001aa f80a0001 STRB r0,[r10,r1]
0001ae 1c49 ADDS r1,r1,#1
0001b0 7061 STRB r1,[r4,#1] ; Rx_Idx
|L5.434|
0001b2 7820 LDRB r0,[r4,#0] ;130 ; Tx_Idx
0001b4 2820 CMP r0,#0x20 ;130
0001b6 d3cf BCC |L5.344|
;;;146 }
;;;147
;;;148 /* Check the corectness of written dada */
;;;149 TransferStatus3 = Buffercmp(SPI2_Buffer_Rx, SPI1_Buffer_Tx, BufferSize);
0001b8 4910 LDR r1,|L5.508|
0001ba 480d LDR r0,|L5.496|
0001bc 2220 MOVS r2,#0x20
0001be 3920 SUBS r1,r1,#0x20
0001c0 3032 ADDS r0,r0,#0x32
0001c2 f7fffffe BL Buffercmp
0001c6 7160 STRB r0,[r4,#5] ; TransferStatus3
;;;150 TransferStatus4 = Buffercmp(SPI1_Buffer_Rx, SPI2_Buffer_Tx, BufferSize);
0001c8 4809 LDR r0,|L5.496|
0001ca 2220 MOVS r2,#0x20
0001cc 490b LDR r1,|L5.508|
0001ce 3012 ADDS r0,r0,#0x12
0001d0 f7fffffe BL Buffercmp
0001d4 71a0 STRB r0,[r4,#6] ; TransferStatus4
;;;151 GPIO_WriteBit(GPIOC, GPIO_Pin_8, TransferStatus3);
0001d6 4d0a LDR r5,|L5.512|
0001d8 7962 LDRB r2,[r4,#5] ; TransferStatus3
0001da f44f7180 MOV r1,#0x100
0001de 4628 MOV r0,r5
0001e0 f7fffffe BL GPIO_WriteBit
;;;152 GPIO_WriteBit(GPIOC, GPIO_Pin_9, TransferStatus4);
0001e4 79a2 LDRB r2,[r4,#6] ; TransferStatus4
0001e6 1569 ASRS r1,r5,#21
0001e8 4628 MOV r0,r5
0001ea f7fffffe BL GPIO_WriteBit
|L5.494|
;;;153 /* TransferStatus3, TransferStatus4 = PASSED, if the transmitted and received data
;;;154 are equal */
;;;155 /* TransferStatus3, TransferStatus4 = FAILED, if the transmitted and received data
;;;156 are different */
;;;157
;;;158 while(1)
0001ee e7fe B |L5.494|
;;;159 {
;;;160 }
;;;161 }
;;;162
ENDP
|L5.496|
0001f0 00000000 DCD ||.bss||
|L5.500|
0001f4 40013000 DCD 0x40013000
|L5.504|
0001f8 40003800 DCD 0x40003800
|L5.508|
0001fc 00000028 DCD ||.data||+0x28
|L5.512|
000200 40011000 DCD 0x40011000
AREA ||.data||, DATA, ALIGN=0
Tx_Idx
000000 00 DCB 0x00
Rx_Idx
000001 00 DCB 0x00
k
000002 00 DCB 0x00
TransferStatus1
000003 00 DCB 0x00
TransferStatus2
000004 00 DCB 0x00
TransferStatus3
000005 00 DCB 0x00
TransferStatus4
000006 00 DCB 0x00
HSEStartUpStatus
000007 00 DCB 0x00
SPI1_Buffer_Tx
000008 01020304 DCB 0x01,0x02,0x03,0x04
00000c 05060708 DCB 0x05,0x06,0x07,0x08
000010 090a0b0c DCB 0x09,0x0a,0x0b,0x0c
000014 0d0e0f10 DCB 0x0d,0x0e,0x0f,0x10
000018 11121314 DCB 0x11,0x12,0x13,0x14
00001c 15161718 DCB 0x15,0x16,0x17,0x18
000020 191a1b1c DCB 0x19,0x1a,0x1b,0x1c
000024 1d1e1f20 DCB 0x1d,0x1e,0x1f,0x20
SPI2_Buffer_Tx
000028 51525354 DCB 0x51,0x52,0x53,0x54
00002c 55565758 DCB 0x55,0x56,0x57,0x58
000030 595a5b5c DCB 0x59,0x5a,0x5b,0x5c
000034 5d5e5f60 DCB 0x5d,0x5e,0x5f,0x60
000038 61626364 DCB 0x61,0x62,0x63,0x64
00003c 65666768 DCB 0x65,0x66,0x67,0x68
000040 696a6b6c DCB 0x69,0x6a,0x6b,0x6c
000044 6d6e6f70 DCB 0x6d,0x6e,0x6f,0x70
AREA ||.bss||, DATA, NOINIT, ALIGN=1
SPI_InitStructure
% 18
SPI1_Buffer_Rx
% 32
SPI2_Buffer_Rx
% 32
__ARM_use_no_argv EQU 0
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -