📄 main.txt
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;;;260 while(RCC_GetFlagStatus(RCC_FLAG_LSERDY) == RESET)
000188 bf00 NOP
|L1.394|
00018a 2041 MOVS r0,#0x41
00018c f7fffffe BL RCC_GetFlagStatus
000190 2800 CMP r0,#0
000192 d0fa BEQ |L1.394|
;;;261 {
;;;262 }
;;;263
;;;264 /* Select LSE as RTC Clock Source */
;;;265 RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
000194 f44f7080 MOV r0,#0x100
000198 f7fffffe BL RCC_RTCCLKConfig
;;;266 #endif
;;;267
;;;268
;;;269 /* Enable RTC Clock */
;;;270 RCC_RTCCLKCmd(ENABLE);
00019c 2001 MOVS r0,#1
00019e f7fffffe BL RCC_RTCCLKCmd
;;;271
;;;272
;;;273 #ifdef RTCClockOutput_Enable
;;;274 /* Disable the Tamper Pin */
;;;275 BKP_TamperPinCmd(DISABLE); /* To output RTCCLK/64 on Tamper pin, the tamper
;;;276 functionality must be disabled */
;;;277
;;;278 /* Enable RTC Clock Output on Tamper Pin */
;;;279 BKP_RTCCalibrationClockOutputCmd(ENABLE);
;;;280 #endif
;;;281
;;;282 /* Wait for RTC registers synchronization */
;;;283 RTC_WaitForSynchro();
0001a2 f7fffffe BL RTC_WaitForSynchro
;;;284
;;;285 /* Wait until last write operation on RTC registers has finished */
;;;286 RTC_WaitForLastTask();
0001a6 f7fffffe BL RTC_WaitForLastTask
;;;287
;;;288 /* Enable the RTC Second */
;;;289 RTC_ITConfig(RTC_IT_SEC, ENABLE);
0001aa 2101 MOVS r1,#1
0001ac 4608 MOV r0,r1
0001ae f7fffffe BL RTC_ITConfig
;;;290
;;;291 /* Wait until last write operation on RTC registers has finished */
;;;292 RTC_WaitForLastTask();
0001b2 f7fffffe BL RTC_WaitForLastTask
;;;293
;;;294 /* Set RTC prescaler: set RTC period to 1sec */
;;;295 #ifdef RTCClockSource_LSI
;;;296 RTC_SetPrescaler(31999); /* RTC period = RTCCLK/RTC_PR = (32.000 KHz)/(31999+1) */
;;;297 #elif defined RTCClockSource_LSE
;;;298 RTC_SetPrescaler(32767); /* RTC period = RTCCLK/RTC_PR = (32.768 KHz)/(32767+1) */
0001b6 f64770ff MOV r0,#0x7fff
0001ba f7fffffe BL RTC_SetPrescaler
;;;299 #endif
;;;300
;;;301 /* Wait until last write operation on RTC registers has finished */
;;;302 RTC_WaitForLastTask();
0001be f7fffffe BL RTC_WaitForLastTask
;;;303 }
0001c2 bd10 POP {r4,pc}
;;;304
ENDP
USART_Configuration PROC
;;;410 void USART_Configuration(void)
;;;411 {
0001c4 b500 PUSH {lr}
0001c6 b089 SUB sp,sp,#0x24
;;;412 USART_InitTypeDef USART_InitStructure;
;;;413 USART_ClockInitTypeDef USART_ClockInitStructure;
;;;414 /* USART1 configuration -----------------------------------------------
;;;415
;;;416 -------*/
;;;417 /* USART1 configured as follow:
;;;418 - BaudRate = 115200 baud
;;;419 - Word Length = 8 Bits
;;;420 - One Stop Bit
;;;421 - No parity
;;;422 - Hardware flow control disabled (RTS and CTS signals)
;;;423 - Receive and transmit enabled
;;;424 - USART Clock disabled
;;;425 - USART CPOL: Clock is active low
;;;426 - USART CPHA: Data is captured on the middle
;;;427 - USART LastBit: The clock pulse of the last data bit is not
;;;428
;;;429 output to
;;;430 the SCLK pin
;;;431 */
;;;432 USART_ClockInitStructure.USART_Clock = USART_Clock_Disable;
0001c8 2000 MOVS r0,#0
0001ca f8ad0004 STRH r0,[sp,#4]
;;;433 USART_ClockInitStructure.USART_CPOL = USART_CPOL_Low;
0001ce f8ad0006 STRH r0,[sp,#6]
;;;434 USART_ClockInitStructure.USART_CPHA = USART_CPHA_2Edge;
0001d2 f44f7000 MOV r0,#0x200
0001d6 f8ad0008 STRH r0,[sp,#8]
;;;435 USART_ClockInitStructure.USART_LastBit = USART_LastBit_Disable;
0001da 2000 MOVS r0,#0
0001dc f8ad000a STRH r0,[sp,#0xa]
;;;436 /* Configure the USART1 synchronous paramters */
;;;437 USART_ClockInit(USART1, &USART_ClockInitStructure);
0001e0 a901 ADD r1,sp,#4
0001e2 4879 LDR r0,|L1.968|
0001e4 f7fffffe BL USART_ClockInit
;;;438
;;;439 USART_InitStructure.USART_BaudRate = 115200;
0001e8 f44f30e1 MOV r0,#0x1c200
0001ec 9003 STR r0,[sp,#0xc]
;;;440 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
0001ee 2000 MOVS r0,#0
0001f0 f8ad0010 STRH r0,[sp,#0x10]
;;;441 USART_InitStructure.USART_StopBits = USART_StopBits_1;
0001f4 f8ad0012 STRH r0,[sp,#0x12]
;;;442 USART_InitStructure.USART_Parity = USART_Parity_No ;
0001f8 f8ad0014 STRH r0,[sp,#0x14]
;;;443 USART_InitStructure.USART_HardwareFlowControl =
0001fc f8ad0018 STRH r0,[sp,#0x18]
;;;444
;;;445 USART_HardwareFlowControl_None;
;;;446
;;;447
;;;448 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
000200 200c MOVS r0,#0xc
000202 f8ad0016 STRH r0,[sp,#0x16]
;;;449 /* Configure USART1 basic and asynchronous paramters */
;;;450 USART_Init(USART1, &USART_InitStructure);
000206 a903 ADD r1,sp,#0xc
000208 486f LDR r0,|L1.968|
00020a f7fffffe BL USART_Init
;;;451
;;;452 /* Enable USART1 */
;;;453 USART_Cmd(USART1, ENABLE);
00020e 2101 MOVS r1,#1
000210 486d LDR r0,|L1.968|
000212 f7fffffe BL USART_Cmd
;;;454 }
000216 b009 ADD sp,sp,#0x24
000218 bd00 POP {pc}
;;;455
ENDP
GPIO_Configuration PROC
;;;207 void GPIO_Configuration(void)
;;;208 {
00021a b508 PUSH {r3,lr}
;;;209 GPIO_InitTypeDef GPIO_InitStructure;
;;;210
;;;211 /* Configure PC.06 as output push-pull */
;;;212 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
00021c 2040 MOVS r0,#0x40
00021e f8ad0000 STRH r0,[sp,#0]
;;;213 GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
000222 2003 MOVS r0,#3
000224 f88d0002 STRB r0,[sp,#2]
;;;214 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
000228 2010 MOVS r0,#0x10
00022a f88d0003 STRB r0,[sp,#3]
;;;215 GPIO_Init(GPIOC, &GPIO_InitStructure);
00022e 4669 MOV r1,sp
000230 4892 LDR r0,|L1.1148|
000232 f7fffffe BL GPIO_Init
;;;216
;;;217 /* Configure USART1 Tx (PA.09) as alternate function push-pull */
;;;218 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9;
000236 f44f7000 MOV r0,#0x200
00023a f8ad0000 STRH r0,[sp,#0]
;;;219 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
00023e 2018 MOVS r0,#0x18
000240 f88d0003 STRB r0,[sp,#3]
;;;220 GPIO_Init(GPIOA, &GPIO_InitStructure);
000244 4669 MOV r1,sp
000246 488e LDR r0,|L1.1152|
000248 f7fffffe BL GPIO_Init
;;;221
;;;222 /* Configure USART1 Rx (PA.10) as input floating */
;;;223 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
00024c f44f6080 MOV r0,#0x400
000250 f8ad0000 STRH r0,[sp,#0]
;;;224 GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
000254 2004 MOVS r0,#4
000256 f88d0003 STRB r0,[sp,#3]
;;;225 GPIO_Init(GPIOA, &GPIO_InitStructure);
00025a 4669 MOV r1,sp
00025c 4888 LDR r0,|L1.1152|
00025e f7fffffe BL GPIO_Init
;;;226 }
000262 bd08 POP {r3,pc}
;;;227
ENDP
NVIC_Configuration PROC
;;;185 void NVIC_Configuration(void)
;;;186 {
000264 b508 PUSH {r3,lr}
;;;187 NVIC_InitTypeDef NVIC_InitStructure;
;;;188
;;;189 /* Configure one bit for preemption priority */
;;;190 NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
000266 f44f60c0 MOV r0,#0x600
00026a f7fffffe BL NVIC_PriorityGroupConfig
;;;191
;;;192 /* Enable the RTC Interrupt */
;;;193 NVIC_InitStructure.NVIC_IRQChannel = RTC_IRQChannel;
00026e 2003 MOVS r0,#3
000270 f88d0000 STRB r0,[sp,#0]
;;;194 NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
000274 2001 MOVS r0,#1
000276 f88d0001 STRB r0,[sp,#1]
;;;195 NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
00027a 2000 MOVS r0,#0
00027c f88d0002 STRB r0,[sp,#2]
;;;196 NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
000280 2001 MOVS r0,#1
000282 f88d0003 STRB r0,[sp,#3]
;;;197 NVIC_Init(&NVIC_InitStructure);
000286 4668 MOV r0,sp
000288 f7fffffe BL NVIC_Init
;;;198 }
00028c bd08 POP {r3,pc}
;;;199
ENDP
RCC_Configuration PROC
;;;126 void RCC_Configuration(void)
;;;127 {
00028e b510 PUSH {r4,lr}
;;;128 /* RCC system reset(for debug purpose) */
;;;129 RCC_DeInit();
000290 f7fffffe BL RCC_DeInit
;;;130
;;;131 /* Enable HSE */
;;;132 RCC_HSEConfig(RCC_HSE_ON);
000294 f44f3080 MOV r0,#0x10000
000298 f7fffffe BL RCC_HSEConfig
;;;133
;;;134 /* Wait till HSE is ready */
;;;135 HSEStartUpStatus = RCC_WaitForHSEStartUp();
00029c f7fffffe BL RCC_WaitForHSEStartUp
0002a0 4978 LDR r1,|L1.1156|
0002a2 7008 STRB r0,[r1,#0] ; HSEStartUpStatus
;;;136
;;;137 if(HSEStartUpStatus == SUCCESS)
0002a4 4608 MOV r0,r1
0002a6 7800 LDRB r0,[r0,#0] ; HSEStartUpStatus
0002a8 2801 CMP r0,#1
0002aa d126 BNE |L1.762|
;;;138 {
;;;139 /* HCLK = SYSCLK */
;;;140 RCC_HCLKConfig(RCC_SYSCLK_Div1);
0002ac 2000 MOVS r0,#0
0002ae f7fffffe BL RCC_HCLKConfig
;;;141
;;;142 /* PCLK2 = HCLK */
;;;143 RCC_PCLK2Config(RCC_HCLK_Div1);
0002b2 2000 MOVS r0,#0
0002b4 f7fffffe BL RCC_PCLK2Config
;;;144
;;;145 /* PCLK1 = HCLK/2 */
;;;146 RCC_PCLK1Config(RCC_HCLK_Div2);
0002b8 f44f6080 MOV r0,#0x400
0002bc f7fffffe BL RCC_PCLK1Config
;;;147
;;;148 /* Flash 2 wait state */
;;;149 FLASH_SetLatency(FLASH_Latency_2);
0002c0 2002 MOVS r0,#2
0002c2 f7fffffe BL FLASH_SetLatency
;;;150 /* Enable Prefetch Buffer */
;;;151 FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
0002c6 2010 MOVS r0,#0x10
0002c8 f7fffffe BL FLASH_PrefetchBufferCmd
;;;152
;;;153 /* PLLCLK = 8MHz * 9 = 72 MHz */
;;;154 RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9);
0002cc f44f11e0 MOV r1,#0x1c0000
0002d0 f44f3080 MOV r0,#0x10000
0002d4 f7fffffe BL RCC_PLLConfig
;;;155
;;;156 /* Enable PLL */
;;;157 RCC_PLLCmd(ENABLE);
0002d8 2001 MOVS r0,#1
0002da f7fffffe BL RCC_PLLCmd
;;;158
;;;159 /* Wait till PLL is ready */
;;;160 while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
0002de bf00 NOP
|L1.736|
0002e0 2039 MOVS r0,#0x39
0002e2 f7fffffe BL RCC_GetFlagStatus
0002e6 2800 CMP r0,#0
0002e8 d0fa BEQ |L1.736|
;;;161 {
;;;162 }
;;;163
;;;164 /* Select PLL as system clock source */
;;;165 RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
0002ea 2002 MOVS r0,#2
0002ec f7fffffe BL RCC_SYSCLKConfig
;;;166
;;;167 /* Wait till PLL is used as system clock source */
;;;168 while(RCC_GetSYSCLKSource() != 0x08)
0002f0 bf00 NOP
|L1.754|
0002f2 f7fffffe BL RCC_GetSYSCLKSource
0002f6 2808 CMP r0,#8
0002f8 d1fb BNE |L1.754|
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