spin_lock.vhd

FDMP the body of the kernel, the Information-Technology Promotion Agency (IPA) adopted by the unexpl

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity spin_lock is
  port (
    Clk                 : in  std_logic;
    Rst                 : in  std_logic;
    SpinLock_RNW0       : in  std_logic;
    SpinLock_RNW1       : in  std_logic;
    SpinLock_RNW2       : in  std_logic;
    SpinLock_RNW3       : in  std_logic;
    SpinLock_Req0       : in  std_logic;
    SpinLock_Req1       : in  std_logic;
    SpinLock_Req2       : in  std_logic;
    SpinLock_Req3       : in  std_logic;
    SpinLock_Ack0       : out std_logic;
    SpinLock_Ack1       : out std_logic;
    SpinLock_Ack2       : out std_logic;
    SpinLock_Ack3       : out std_logic;
--    SpinLock_LockBit    : out std_logic;
    SpinLock_LockBit0    : out std_logic;
    SpinLock_LockBit1    : out std_logic;
    SpinLock_LockBit2    : out std_logic;
    SpinLock_LockBit3    : out std_logic);

end spin_lock;

architecture STRUCT of spin_lock is

  type state_type is (RELEASE, LOCK);

  signal CURRENT_STATE : state_type;
  signal NEXT_STATE    : state_type;

  signal RND   : std_logic_vector(0 to 3);
  signal STOP  : std_logic;
  signal s_RNW : std_logic;
  signal Ack   : std_logic;
  signal s_Ack : std_logic;
  signal s_Req : std_logic;
  signal s_SpinLock_Ack : std_logic;

  signal SpinLock_LockBit : std_logic;
  
begin  -- STRUCT

  --Round Robin
  process (Clk, Rst, STOP)
  begin  -- process
    if Rst = '1' then                   -- asynchronous reset (active low)
      RND <= "0001";
    elsif Clk'event and Clk = '1' then  -- rising clock edge
      if STOP = '0' then
        RND(0 to 2) <= RND(1 to 3);
        RND(3) <= RND(0);
      end if;
    end if;
  end process;

  stop  <= (SpinLock_Req0 and RND(0)) or (SpinLock_Req1 and RND(1)) or (SpinLock_Req2 and RND(2)) or (SpinLock_Req3 and RND(3));
  s_Req <= (SpinLock_Req0 and RND(0)) or (SpinLock_Req1 and RND(1)) or (SpinLock_Req2 and RND(2)) or (SpinLock_Req3 and RND(3));
  s_RNW <= (SpinLock_RNW0 and RND(0)) or (SpinLock_RNW1 and RND(1)) or (SpinLock_RNW2 and RND(2)) or (SpinLock_RNW3 and RND(3));
  
  
  --State Machine Update
  process (Clk, Rst)
  begin  -- process
    if Rst = '1' then                   -- asynchronous reset (active low)
      CURRENT_STATE <= RELEASE;
    elsif Clk'event and Clk = '1' then  -- rising clock edge
      CURRENT_STATE <= NEXT_STATE;
    end if;
  end process;

  --State Machine
  process (Clk, Rst)
  begin  -- process
    if Rst = '1' then                   -- asynchronous reset (active low)
      NEXT_STATE <= RELEASE;
      Ack <= '0';
    elsif (Clk'event and Clk = '1') then  -- rising clock edge
      if (s_Req = '1' and CURRENT_STATE = RELEASE and s_RNW = '1') then
        Ack <= '1';
        NEXT_STATE <= LOCK;
      elsif (s_Req = '1' and CURRENT_STATE = LOCK and s_RNW = '0') then
        Ack <= '1';
        NEXT_STATE <= RELEASE;
      elsif (s_Req = '1') then
        Ack <= '1';
        NEXT_STATE <= CURRENT_STATE;
      else
        Ack <= '0';
        NEXT_STATE <= CURRENT_STATE;
      end if;
    end if;
  end process;


  --Ack
  process (Clk, Rst)
  begin  -- process
    if Rst = '1' then                   -- asynchronous reset (active low)
      s_Ack <= '0';
    elsif Clk'event and Clk = '1' then  -- rising clock edge
      s_Ack <= Ack;
    end if;
  end process;
  s_SpinLock_Ack <= s_Req and Ack and not s_Ack;

  
  SpinLock_Ack0 <= s_SpinLock_Ack and RND(0);
  SpinLock_Ack1 <= s_SpinLock_Ack and RND(1);
  SpinLock_Ack2 <= s_SpinLock_Ack and RND(2);
  SpinLock_Ack3 <= s_SpinLock_Ack and RND(3);  
  
  
  
  --SpinLock_LockBit 
  process (Clk, Rst)
  begin  -- process
    if Rst = '1' then                   -- asynchronous reset (active low)
      SpinLock_LockBit <= '0';
    elsif Clk'event and Clk = '1' then  -- rising clock edge
--      if (s_Req = '1' and s_RNW = '1') then
--        SpinLock_LockBit <= '1';
--      end if;
      if (s_Req = '1' and s_RNW = '1' and CURRENT_STATE = RELEASE) then
        SpinLock_LockBit <= '0';
      elsif (s_Req = '1' and s_RNW = '1' and CURRENT_STATE = LOCK) then
        SpinLock_LockBit <= '1';
      end if;
    end if;
  end process;

  SpinLock_LockBit0 <= SpinLock_LockBit;
  SpinLock_LockBit1 <= SpinLock_LockBit;
  SpinLock_LockBit2 <= SpinLock_LockBit;
  SpinLock_LockBit3 <= SpinLock_LockBit;

end STRUCT;