usb_drv.h

基于at90usb1287的数据存储器例子

   //! enables host start of frame interrupt
   #define Host_enable_sof_interrupt()            (UHIEN |= (1<<HSOFE))
   //! enables host start of frame interrupt
   #define Host_disable_sof_interrupt()           (UHIEN &= ~(1<<HSOFE))
#define Is_host_sof_interrupt_enabled()        ((UHIEN &  (1<<HSOFE))   ? TRUE : FALSE)
   //! tests if SOF detected
#define Host_is_sof()                          ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
#define Is_host_sof()                          ((UHINT & (1<<HSOFI)) ? TRUE : FALSE)
#define Host_ack_sof()                         (UHINT &= ~(1<<HSOFI))

   //! enables host wake up interrupt detection
#define Host_enable_hwup_interrupt()            (UHIEN |= (1<<HWUPE))
   //! disables host wake up interrupt detection
#define Host_disable_hwup_interrupt()           (UHIEN &= ~(1<<HWUPE))
#define Is_host_hwup_interrupt_enabled()        ((UHIEN &  (1<<HWUPE))   ? TRUE : FALSE)
   //! tests if host wake up detected
#define Host_is_hwup()                          ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
   //! Ack host wake up detection
#define Is_host_hwup()                          ((UHINT & (1<<HWUPI)) ? TRUE : FALSE)
#define Host_ack_hwup()                         (UHINT &= ~(1<<HWUPI))

   //! enables host down stream rsm sent interrupt detection
#define Host_enable_down_stream_resume_interrupt()            (UHIEN |= (1<<RSMEDE))
   //! disables host down stream rsm sent interrupt detection
#define Host_disable_down_stream_resume_interrupt()           (UHIEN &= ~(1<<RSMEDE))
#define Is_host_down_stream_resume_interrupt_enabled()        ((UHIEN &  (1<<RSMEDE))   ? TRUE : FALSE)
   //! Ack host down stream resume sent
#define Is_host_down_stream_resume()                          ((UHINT & (1<<RSMEDI)) ? TRUE : FALSE)
#define Host_ack_down_stream_resume()                         (UHINT &= ~(1<<RSMEDI))

   //! enables host remote wake up interrupt detection
#define Host_enable_remote_wakeup_interrupt()         (UHIEN |= (1<<RXRSME))
   //! disables host remote wake up interrupt detection
#define Host_disable_remote_wakeup_interrupt()        (UHIEN &= ~(1<<RXRSME))
#define Is_host_remote_wakeup_interrupt_enabled()     ((UHIEN &  (1<<RXRSME))   ? TRUE : FALSE)
   //! tests if host wake up detected
#define Host_is_remote_wakeup()                       ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
   //! Ack host wake up detection
#define Is_host_remote_wakeup()                       ((UHINT & (1<<RXRSMI)) ? TRUE : FALSE)
#define Host_ack_remote_wakeup()                      (UHINT &= ~(1<<RXRSMI))

   //! enables host device connection interrupt
#define Host_enable_device_connection_interrupt()        (UHIEN |= (1<<DCONNE))
   //! disables USB device connection interrupt
#define Host_disable_device_connection_interrupt()    (UHIEN &= ~(1<<DCONNE))
#define Is_host_device_connection_interrupt_enabled()    ((UHIEN &  (1<<DCONNE))   ? TRUE : FALSE)
   //! tests if a USB device has been detected
#define Is_device_connection()                 (UHINT & (1<<DCONNI))
   //! acks device connection
#define Host_ack_device_connection()           (UHINT = ~(1<<DCONNI))

   //! enables host device disconnection interrupt
#define Host_enable_device_disconnection_interrupt()     (UHIEN |= (1<<DDISCE))
   //! disables USB device connection interrupt
#define Host_disable_device_disconnection_interrupt()    (UHIEN &= ~(1<<DDISCE))
#define Is_host_device_disconnection_interrupt_enabled() ((UHIEN &  (1<<DDISCE))   ? TRUE : FALSE)
   //! tests if a USB device has been removed
#define Is_device_disconnection()              (UHINT & (1<<DDISCI)   ? TRUE : FALSE)
   //! acks device disconnection
#define Host_ack_device_disconnection()        (UHINT = ~(1<<DDISCI))

   //! enables host USB reset interrupt
#define Host_enable_reset_interrupt()          (UHIEN   |=  (1<<RSTE))
   //! disables host USB reset interrupt
#define Host_disable_reset_interrupt()         (UHIEN   &= ~(1<<RSTE))
#define Is_host_reset_interrupt_enabled()      ((UHIEN &  (1<<RSTE))   ? TRUE : FALSE)
   //! acks host USB reset sent
#define Host_ack_reset()                       (UHINT   = ~(1<<RSTI))
   //! tests if USB reset has been sent
#define Is_host_reset()                        Host_is_reset()


   //! switches on VBus
#define Host_vbus_request()                    (OTGCON |= (1<<VBUSREQ))
   //! switches off VBus
#define Host_clear_vbus_request()              (OTGCON |= (1<<VBUSRQC))
   //! configures the address to use for the device
#define Host_configure_address(addr)           (UHADDR = addr & MSK_HADDR)

   //! Get connected device speed, returns TRUE when in full speed mode
#define Is_host_full_speed()                   ((USBSTA &  (1<<SPEED))   ? TRUE : FALSE)
//! @}



//! @defgroup general_pipe USB pipe drivers
//! These macros manage the common features of the pipes.
//! @{
   //! selects pipe for CPU interface
#define Host_select_pipe(p)                    (UPNUM = (U8)p)

   //! get the currently selected pipe number
#define Host_get_selected_pipe()              (UPNUM )

   //! enables pipe
#define Host_enable_pipe()                     (UPCONX |= (1<<PEN))
   //! disables pipe
#define Host_disable_pipe()                    (UPCONX &= ~(1<<PEN))

   //! sets SETUP token
#define Host_set_token_setup()                 (UPCFG0X =  UPCFG0X & ~MSK_TOKEN_SETUP)
   //! sets IN token
#define Host_set_token_in()                    (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_IN)
   //! sets OUT token
#define Host_set_token_out()                   (UPCFG0X = (UPCFG0X & ~MSK_TOKEN_SETUP) | MSK_TOKEN_OUT)

   //! returns the number of the endpoint associated to the current pipe
#define Host_get_endpoint_number()             (UPCFG0X & (MSK_PEPNUM))

   //! returns pipe interrupt register
#define Host_get_pipe_interrupt()              (UPINT)

   //! sets the interrupt frequency
#define Host_set_interrupt_frequency(frq)      (UPCFG2X = (U8)frq)

   //! tests if current pipe is configured
#define Is_pipe_configured()                   (UPSTAX  &  (1<<CFGOK))
   //! tests if at least one bank is busy
#define Is_host_one_bank_busy()                ((UPSTAX &  (1<<MSK_NBUSYBK)) != 0)
   //! returns the number of busy banks
#define Host_number_of_busy_bank()             (UPSTAX &  (1<<MSK_NBUSYBK))

   //! resets the pipe
#define Host_reset_pipe(p)                     (UPRST = 1<<p , UPRST = 0)

   //! writes a byte into the pipe FIFO
#define Host_write_byte(dat)                   (UPDATX = dat)
   //! reads a byte from the pipe FIFO
#define Host_read_byte()                       (UPDATX)

   //! freezes the pipe
#define Host_freeze_pipe()                     (UPCONX |=  (1<<PFREEZE))
   //! un-freezees the pipe
#define Host_unfreeze_pipe()                   (UPCONX &= ~(1<<PFREEZE))
   //! tests if the current pipe is frozen
#define Is_host_pipe_freeze()                  (UPCONX &   (1<<PFREEZE))

   //! resets data toggle
#define Host_reset_pipe_data_toggle()          (UPCONX |=  (1<<RSTDT)  )

   //! tests if SETUP has been sent
#define Is_host_setup_sent()                   ((UPINTX & (1<<TXSTPI))    ? TRUE : FALSE)
   //! tests if control IN has been received
#define Is_host_control_in_received()          ((UPINTX & (1<<RXINI))    ? TRUE : FALSE)
   //! tests if control OUT has been sent
#define Is_host_control_out_sent()             ((UPINTX & (1<<TXOUTI))    ? TRUE : FALSE)
   //! tests if a STALL has been received
#define Is_host_stall()                        ((UPINTX & (1<<RXSTALLI))    ? TRUE : FALSE)
   //! tests if an error occurs on current pipe
#define Is_host_pipe_error()                   ((UPINTX & (1<<PERRI))    ? TRUE : FALSE)
   //! sends a setup
#define Host_send_setup()                      (UPINTX  &= ~(1<<FIFOCON))
   //! sends a control IN
#define Host_send_control_in()                 (UPINTX  &= ~(1<<FIFOCON))
   //! sends a control OUT
#define Host_send_control_out()                (UPINTX  &= ~(1<<FIFOCON))
   //! acks control OUT
#define Host_ack_control_out()                 (UPINTX  &= ~(1<<TXOUTI))
   //! acks control IN
#define Host_ack_control_in()                  (UPINTX  &= ~(1<<RXINI))
   //! acks setup
#define Host_ack_setup()                       (UPINTX  &= ~(1<<TXSTPI))
   //! acks STALL reception
#define Host_ack_stall()                       (UPINTX  &= ~(1<<RXSTALLI))

   //! sends a OUT
#define Host_send_out()                        (UPINTX &= ~(1<<FIFOCON))
   //! tests if OUT has been sent
#define Is_host_out_sent()                     ((UPINTX & (1<<TXOUTI))    ? TRUE : FALSE)
   //! acks OUT sent
#define Host_ack_out_sent()                    (UPINTX &= ~(1<<TXOUTI))
   //! tests if IN received
#define Is_host_in_received()                  ((UPINTX & (1<<RXINI))    ? TRUE : FALSE)
   //! acks IN reception
#define Host_ack_in_received()                 (UPINTX &= ~(1<<RXINI))
   //! sends a IN
#define Host_send_in()                         (UPINTX &= ~(1<<FIFOCON))
   //! tests if nak handshake has been received
#define Is_host_nak_received()                 ((UPINTX & (1<<NAKEDI))    ? TRUE : FALSE)
   //! acks NAk received sent
#define Host_ack_nak_received()                (UPINTX &= ~(1<<NAKEDI))



   //! tests if endpoint read allowed
#define Is_host_read_enabled()                 (UPINTX&(1<<RWAL))
   //! tests if endpoint read allowed
#define Is_host_write_enabled()                 (UPINTX&(1<<RWAL))

   //! sets IN in standard mode
#define Host_standard_in_mode()                (UPCONX &= ~(1<<INMODE))
   //! sets IN in continuous mode
#define Host_continuous_in_mode()              (UPCONX |=  (1<<INMODE))

   //! sets number of IN requests to perform before freeze
#define Host_in_request_number(in_num)         (UPINRQX = (U8)in_num)
   //! returns number of remaining IN requests
#define Host_get_in_request_number()           (UPINRQX)

   //! returns number of bytes (8 bits)
#define Host_data_length_U8()                  (UPBCLX)
   //! returns number of bytes (16 bits)
#define Host_data_length_U16()                 ((((U16)UPBCHX)<<8) | UPBCLX)
   //! for device compatibility
#define Host_byte_counter()                    Host_data_length_U16()
   //! for device compatibility
#define Host_byte_counter_8()                  Host_data_length_U8()

   //! returns the size of the current pipe
#define Host_get_pipe_length()                 ((U16)0x08 << ((UPCFG1X & MSK_PSIZE)>>4))

   //! returns the type of the current pipe
#define Host_get_pipe_type()                   (UPCFG0X>>6)

   //! tests if error occurs on pipe
#define Host_error_status()                    (UPERRX & MSK_ERROR)
   //! acks all pipe error
#define Host_ack_all_errors()                  (UPERRX = 0x00)

   //! Enable pipe end transmission interrupt
#define Host_enable_transmit_interrupt()       (UPIENX |= (1<<TXOUTE))
   //! Disable pipe end transmission interrupt
#define Host_disable_transmit_interrupt()      (UPIENX &= ~(1<<TXOUTE))

   //! Enable pipe reception interrupt
#define Host_enable_receive_interrupt()        (UPIENX |= (1<<RXINE))
   //! Disable pipe recption interrupt
#define Host_disable_receive_interrupt()       (UPIENX &= ~(1<<RXINE))

   //! Enable pipe stall interrupt
#define Host_enable_stall_interrupt()        (UPIENX |= (1<<RXSTALLE))
   //! Disable pipe stall interrupt
#define Host_disable_stall_interrupt()       (UPIENX &= ~(1<<RXSTALLE))

   //! Enable pipe error interrupt
#define Host_enable_error_interrupt()        (UPIENX |= (1<<PERRE))
   //! Disable pipe error interrupt
#define Host_disable_error_interrupt()       (UPIENX &= ~(1<<PERRE))

   //! Enable pipe NAK interrupt
#define Host_enable_nak_interrupt()        (UPIENX |= (1<<NAKEDE))
   //! Disable pipe NAK interrupt
#define Host_disable_nak_interrupt()       (UPIENX &= ~(1<<NAKEDE))

#define Get_pipe_token(x)                 ((x & (0x80)) ? TOKEN_IN : TOKEN_OUT)

//! @}

//! wSWAP
//! This macro swaps the U8 order in words.
//!
//! @param x        (U16) the 16 bit word to swap
//!
//! @return         (U16) the 16 bit word x with the 2 bytes swaped

#define wSWAP(x)        \
   (   (((x)>>8)&0x00FF) \
   |   (((x)<<8)&0xFF00) \
   )


//! Usb_write_word_enum_struc
//! This macro help to fill the U16 fill in USB enumeration struct.
//! Depending on the CPU architecture, the macro swap or not the nibbles
//!
//! @param x        (U16) the 16 bit word to be written
//!
//! @return         (U16) the 16 bit word written
#if !defined(BIG_ENDIAN) && !defined(LITTLE_ENDIAN)
	#error YOU MUST Define the Endian Type of target: LITTLE_ENDIAN or BIG_ENDIAN
#endif
#ifdef LITTLE_ENDIAN
	#define Usb_write_word_enum_struc(x)	(x)
#else //BIG_ENDIAN
	#define Usb_write_word_enum_struc(x)	(wSWAP(x))
#endif


//! @}

//_____ D E C L A R A T I O N ______________________________________________

U8      usb_config_ep                (U8, U8);
U8      usb_select_enpoint_interrupt (void);
U16     usb_get_nb_byte_epw          (void);
U8      usb_send_packet              (U8 , U8*, U8);
U8      usb_read_packet              (U8 , U8*, U8);
void    usb_halt_endpoint            (U8);
void    usb_reset_endpoint           (U8);
U8      usb_init_device              (void);

U8      host_config_pipe             (U8, U8);
U8      host_determine_pipe_size     (U16);
void    host_disable_all_pipe        (void);
U8      usb_get_nb_pipe_interrupt    (void);

#endif  // _USB_DRV_H_