start_v2.lst

keil下开发的永磁同步电机矢量控制程序

                          138                             ; 1 = Short Loop mode enabled
                          139     ;
                          140     ; FASTPEC: Fast Pec Event Injection (CPUCON2.1)
 0001                     141     _FASTPEC  EQU   1       ; 0 = Direct Injection of PEC Events disabled
                          142                             ; 1 = Direct Injection of PEC Events enabled
                          143     ;
                          144     ; FASTBL: Fast Block Transfer Injection (CPUCON2.2)
 0000                     145     _FASTBL   EQU   0       ; 0 = Direct Injection for Block Transfers disabled
                          146                             ; 1 = Direct Injection for Block Transfers enabled
                          147     ;
                          148     ; RETST: Return Stack (CPUCON2.3)
 0001                     149     _RETST EQU 1 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          150                             ; 1 = Return Stack enabled
                          151     ;
                          152     ; OVRUN: Pipeline Bubble Overrun (CPUCON2.4)
 0001                     153     _OVRUN EQU 1 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          154                             ; 1 = Overrun of Pipeline Bubbles allowed
                          155     ;
                          156     ; ZSC: Zero Cycle Jump Cache (CPUCON2.5)
 0001                     157     _ZSC      EQU   1       ; 0 = Zero Cycle Jump Cache disabled
                          158                             ; 1 = Zero Cycle Jump Cache enabled
                          159     ;
                          160     ; STEN: Stall Instruction (CPUCON2.6)
 0000                     161     _STEN EQU 0 ; Uv2/Dave /Dave/                                                         
                                                                                                       
                          162                             ; 1 = Stall instruction enabled
                          163     ;
                          164     ; EIOIAEN: Early IO Injection Acknowledge
 0001                     165     _EIOIAEN  EQU   1       ; 0 = Injection ack. by destructive read not guaranteed
                          166     ;                       ; 1 = Injection ack. by destructive read guaranteed
                          167     ; 
                          168     ; BYPF: Fetch Bypass Control (CPUCON2.8)
 0001                     169     _BYPF EQU 1 ; Uv2/Dave /Dave/                                                         
                                                                                                       
                          170                             ; 1 = Bypass Path from Fetch to Decode enabled
                          171     ;
                          172     ; BYPPF: Prefecth Bypass Control (CPUCON2.9)
 0001                     173     _BYPPF EQU 1 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          174                             ; 1 = Bypass Path from Prefetch to Decode enabled
                          175     ;
                          176     ; FIFOFED: FIFO Fill Configuration (CPUCON2.10 .. CPUCON2.11)
 0003                     177     _FIFOFED EQU 3 ; Uv2/Dave /Dave/                                                      
                                                                                                          
A166 MACRO ASSEMBLER  START_V2                                                            12/19/2003 11:51:09 PAGE     4

                          178                             ; 1 = FIFO filled with up to 1 instruction per cycle
                          179                             ; 2 = FIFO filled with up to 2 instructions per cycle
                          180                             ; 3 = FIFO filled with up to 3 instructions per cycle
                          181     ;
                          182     ; FIFODEPTH: FIFO Depth Configuration (CPUCON2.12 .. CPUCON2.15)
 0008                     183     _FIFODEPTH EQU 8 ; Uv2/Dave /Dave/                                                    
                                                                                                            
                          184                             ; 1 = 1 FIFO entry
                          185                             ; ...
                          186                             ; 8 = 8 FIFO entries
                          187                             ; 9 - 15 = reserved
                          188     ;
                          189     ;
                          190     ; Definitions for System Configuration Register SYSCON1
                          191     ; =====================================================
                          192     ;
                          193     ; INIT_SYSCON1: Init SYSCON1 register
                          194     ; --- Set INIT_SYSCON1 = 1 to initilize the SYSCON1 register
                          195     $SET (INIT_SYSCON1 = 0) ; Uv2/Dave /Dave/                                             
                                                                                                                   
                          196     ;
                          197     ; SLEEPCON: Sleep Mode Configuration (SYSCON1.0 .. SYSCON1.1)
 0000                     198     _SLEEPCON EQU 0 ; Uv2/Dave /Dave/                                                     
                                                                                                           
                          199                             ; 1 = SLEEP mode entered upone IDLE instruction
                          200                             ; 2 - 3 = reserved
                          201     ;
                          202     ; PDCFG: Port Driver Configuration (SYSCON1.2 .. SYSCON1.3)
 0000                     203     _PDCFG EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          204                             ; 1 = Port drivers are off in IDLE or Sleep mode
                          205                             ; 2 = Port drivers are off in Powerdown mode
                          206                             ; 3 = reserved
                          207     ;
                          208     ; PFCFG: Program Flash Configuration (SYSCON1.4 .. SYSCON1.5)
 0000                     209     _PFCFG EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          210                             ; 1 = Program Flash is off in IDLE or Sleep mode
                          211                             ; 2 - 3 = reserved
                          212     ;
                          213     ; CPSYS: Clock Prescaler for System (SYSCON1.8 .. SYSCON1.10)
 0000                     214     _CPSYS EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          215                             ; 1 = clock signal for CPU is PLL frequency / 2
                          216                             ; 2 - 7 = reserved
                          217     ;
                          218     ;
                          219     ; Definitions for System Configuration Register SYSCON3
                          220     ; =====================================================
                          221     ;
                          222     ; INIT_SYSCON3: Init SYSCON3 register
                          223     ; --- Set INIT_SYSCON3 = 1 to initilize the SYSCON3 register
                          224     $SET (INIT_SYSCON3 = 1) ; Uv2/Dave /Dave/                                             
                                                                                                                   
                          225     ;
                          226     ; SYSCON3:  Power Management (disable on-chip peripherals)
                          227     ;
 0000                     228     ADCDIS  EQU     0       ; 1 = disable Analog/Digital Converter    (SYSCON3.0)
 0000                     229     ASC0DIS EQU 0 ; Uv2/Dave /Dave/                                                       
                                                                                                         
 0000                     230     SSC0DIS EQU 0 ; Uv2/Dave /Dave/                                                       
                                                                                                         
 0000                     231     GPTDIS EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          232                             ; reserved                                (SYSCON3.4)
 0000                     233     FMDIS EQU 0 ; Uv2/Dave /Dave/                                                         
A166 MACRO ASSEMBLER  START_V2                                                            12/19/2003 11:51:09 PAGE     5

                                                                                                       
 0000                     234     CC1DIS EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
 0001                     235     CC2DIS EQU 1 ; Uv2/Dave /Dave/                                                        
                                                                                                        
 0000                     236     CC6DIS EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          237                             ; reserved                                (SYSCON3.9)
 0000                     238     ASC1DIS EQU     0       ; 1 = disable UART ASC1                   (SYSCON3.10)
 0000                     239     I2CDIS  EQU     0       ; 1 = disable I2C Bus Module              (SYSCON3.11)
 0000                     240     SDLMDIS EQU     0       ; 1 = disable SDLM (J1850) Module         (SYSCON3.12)
 0000                     241     CANDIS EQU 0 ; Uv2/Dave /Dave/                                                        
                                                                                                        
                          242                             ; reserved                                (SYSCON3.14)
 0001                     243     SSC1DIS EQU 1 ; Uv2/Dave /Dave/                                                       
                                                                                                         
                          244     ;
                          245     ;
                          246     ;
                          247     ; Definitions for Reset Configuration Register RSTCON
                          248     ; ===================================================
                          249     ;
                          250     ; INIT_RSTCON: Init RSTCON register
                          251     ; --- Set INIT_RSTCON = 1 to initilize the RSTCON register
                          252     $SET (INIT_RSTCON = 0) ; Uv2/Dave /Dave/                                              
                                                                                                                  
                          253     ;
                          254     ; RSTLEN: Reset Length Control (RSTCON.0 .. RSTCON.2)
 0000                     255     _RSTLEN EQU 0 ; Uv2/Dave /Dave/                                                       
                                                                                                         
                          256                             ; 1 =   4 t_CPU clocks
                          257                             ; 2 =   8 t_CPU clocks
                          258                             ; 3 =  16 t_CPU clocks
                          259                             ; 4 =  32 t_CPU clocks
                          260                             ; 5 =  64 t_CPU clocks
                          261                             ; 6 = 128 t_CPU clocks
                          262                             ; 7 = 256 t_CPU clocks
                          263     ;
                          264     ; RORMV: RSTOUT# Remove Control (RSTCON.4)
 0000                     265     _RORMV EQU 0 ; Uv2/Dave /Dave/