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<title>
Documentation of VHDL-AMS models
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<table width="802" cellspacing="2" cellpadding="8" border="0">
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<td class="Title" width="802" colspan="2">Operational amplifier
</td>
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<td class="SectionHeader" width="100">
Model Name
</td><td class="SectionText" width="700">
<model_name>OPAMP(MACRO)</model_name>
</td>
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Symbol
</td><td class="SectionText" width="700"><img alt="No Symbol" src="../symbol/opamp.png">
</td>
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<td class="SectionHeader" width="100">
Generics
</td><td class="SectionText" width="700">
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<td class="TableHeader">
Name
</td><td class="TableHeader">
Type
</td><td class="TableHeader">
Default
</td><td class="TableHeader">
Unit
</td><td class="TableHeader">
Description
</td>
</tr>
<tr>
<td class="TableText">AVD0
</td><td class="TableText">REAL
</td><td class="TableText">106.0
</td><td class="TableText">dB
</td><td class="TableText"> DC differential gain
</td>
</tr>
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<td class="TableText">FP1
</td><td class="TableText">REAL
</td><td class="TableText">5000.0
</td><td class="TableText">Hz
</td><td class="TableText"> dominant pole
</td>
</tr>
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<td class="TableText">FP2
</td><td class="TableText">REAL
</td><td class="TableText">2.0E6
</td><td class="TableText">Hz
</td><td class="TableText"> pole frequency
</td>
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<td class="TableText">ROUT
</td><td class="TableText">REAL
</td><td class="TableText">75.0
</td><td class="TableText">Ohm
</td><td class="TableText"> output resistance
</td>
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</td>
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<td class="SectionHeader" width="100">
Ports
</td><td class="SectionText" width="700">
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<td class="TableHeader">
Interface
</td><td class="TableHeader">
Name
</td><td class="TableHeader">
Type/Nature
</td><td class="TableHeader">
Description
</td>
</tr>
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<td class="TableText">terminal
</td><td class="TableText">INP
</td><td class="TableText">ELECTRICAL
</td><td class="TableText"> input plus terminal
</td>
</tr>
<tr>
<td class="TableText">terminal
</td><td class="TableText">INM
</td><td class="TableText">ELECTRICAL
</td><td class="TableText"> input minus terminal
</td>
</tr>
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<td class="TableText">terminal
</td><td class="TableText">OUTP
</td><td class="TableText">ELECTRICAL
</td><td class="TableText"> output terminal
</td>
</tr>
</table>
</td>
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<td class="SectionHeader" width="100">
Description
</td><td class="SectionText" width="700">
<description>This model describes an macromodel of an operational amplifier.<br>Individual blocks for the input and output stages, the frequency<br>response, and the gain stage are included.<br>
</description>
</td>
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<td class="SectionHeader" width="100">
References
</td><td class="SectionText" width="700">
<reference> Boyle, G.R.; Cohn, B.M.; Pederson, D.O.; Solomon, J.E.:<br> Macromodeling of integrated circuit operational amplifiers.<br> IEEE J. Solid-State Circuits SC-9 (1974) 6, 353 - 363<br>
<br>
</reference>
</td>
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<td class="SectionHeader" width="100">
Dependencies
</td><td class="SectionText" width="700">
<table cellspacing="2" cellpadding="4" border="0">
<tr>
<td class="TableHeader">
Logical Library
</td><td class="TableHeader">
Design Unit/Design Entity
</td>
</tr>
<tr>
<td class="TableText">IEEE_proposed
</td><td class="TableText">ELECTRICAL_SYSTEMS
</td>
</tr>
<tr>
<td class="TableText">IEEE
</td><td class="TableText">MATH_REAL
</td>
</tr>
</table>
</td>
</tr>
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<td class="SectionHeader" width="100">
Source
</td><td class="SectionText" width="700">
<link_source>
<A HREF="../src/opamp.vhd">See source code</A>
</link_source>
</td>
</tr>
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<td class="SectionHeader" width="100">
Example
</td><td class="SectionText" width="700"><A HREF="../tb/doc/bench.html">See test-bench</A></td>
</tr>
</table>
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