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📄 lcd_wave.rpt

📁 用chdl编写液晶块驱动程序。有详细的说明
💻 RPT
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-- Equation name is 'DATA23', location is LC038, type is buried.
DATA23   = TFFE( _EQ018, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ018 = !CNT20 &  CNT21 &  DATA20 &  DATA21 &  DATA22 &  _LC030 & !Q
         # !CNT20 &  CNT21 & !DATA20 & !_LC023 & !_LC030 & !Q;

-- Node name is ':52' = 'DATA24' 
-- Equation name is 'DATA24', location is LC019, type is buried.
DATA24   = TFFE( _EQ019, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ019 = !CNT20 &  CNT21 &  DATA20 &  DATA21 &  DATA22 &  DATA23 &  _LC030 & 
             !Q
         # !CNT20 &  CNT21 & !DATA20 & !DATA21 & !DATA22 & !DATA23 & !_LC030 & 
             !Q;

-- Node name is ':51' = 'DATA25' 
-- Equation name is 'DATA25', location is LC020, type is buried.
DATA25   = TFFE( _EQ020, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ020 = !CNT20 &  CNT21 & !DATA25 &  _LC030 &  _LC031 & !Q
         # !CNT20 &  CNT21 &  DATA25 &  _LC030 & !_LC031 & !Q
         # !CNT20 &  CNT21 & !DATA25 &  _LC024 & !_LC030 & !Q
         # !CNT20 &  CNT21 &  DATA25 & !_LC024 & !_LC030 & !Q;

-- Node name is ':50' = 'DATA26' 
-- Equation name is 'DATA26', location is LC021, type is buried.
DATA26   = TFFE( _EQ021, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ021 = !CNT20 &  CNT21 & !DATA26 &  _LC017 &  _LC030 & !Q
         # !CNT20 &  CNT21 &  DATA26 & !_LC017 &  _LC030 & !Q
         # !CNT20 &  CNT21 & !DATA26 &  _LC025 & !_LC030 & !Q
         # !CNT20 &  CNT21 &  DATA26 & !_LC025 & !_LC030 & !Q;

-- Node name is ':49' = 'DATA27' 
-- Equation name is 'DATA27', location is LC022, type is buried.
DATA27   = TFFE( _EQ022, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ022 = !CNT20 &  CNT21 & !DATA27 &  _LC018 &  _LC030 & !Q
         # !CNT20 &  CNT21 &  DATA27 & !_LC018 &  _LC030 & !Q
         # !CNT20 &  CNT21 & !DATA27 &  _LC027 & !_LC030 & !Q
         # !CNT20 &  CNT21 &  DATA27 & !_LC027 & !_LC030 & !Q;

-- Node name is 'DOUT0' = ':19' 
-- Equation name is 'DOUT0', type is output 
 DOUT0   = DFFE( _EQ023 $  _EQ024, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ023 = !BUSY &  CNT30 & !COUNT0 & !COUNT1 & !COUNT2 &  Q &  _X001 & 
              _X002 &  _X003 &  _X004 &  _X005
         # !BUSY &  CNT31 &  COUNT0 &  COUNT1 &  Q &  _X001 &  _X002 &  _X003 & 
              _X004 &  _X005
         # !BUSY &  CNT30 &  COUNT1 &  COUNT2 &  Q &  _X001 &  _X002 &  _X003 & 
              _X004 &  _X005
         # !BUSY &  CNT30 & !CNT31 & !COUNT0 &  Q &  _X001 &  _X002 &  _X003 & 
              _X004 &  _X005;
  _X001  = EXP(!CNT30 &  CNT31 &  Q);
  _X002  = EXP( CNT20 &  CNT21 & !Q);
  _X003  = EXP( CNT21 & !DATA20 & !Q);
  _X004  = EXP( CNT20 & !DATA10 & !Q);
  _X005  = EXP(!CNT20 & !CNT21 & !Q);
  _EQ024 = !BUSY &  _X001 &  _X002 &  _X003 &  _X004 &  _X005;
  _X001  = EXP(!CNT30 &  CNT31 &  Q);
  _X002  = EXP( CNT20 &  CNT21 & !Q);
  _X003  = EXP( CNT21 & !DATA20 & !Q);
  _X004  = EXP( CNT20 & !DATA10 & !Q);
  _X005  = EXP(!CNT20 & !CNT21 & !Q);

-- Node name is 'DOUT1' = ':17' 
-- Equation name is 'DOUT1', type is output 
 DOUT1   = DFFE( _EQ025 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ025 = !BUSY &  CNT30 &  CNT31 & !COUNT0 &  COUNT1 & !COUNT2 &  Q
         # !BUSY &  CNT30 &  COUNT0 & !COUNT1 &  COUNT2 &  Q
         # !BUSY &  CNT30 & !CNT31 & !COUNT1 &  Q
         # !BUSY & !CNT20 &  DATA21 & !Q
         # !BUSY & !CNT21 & !Q &  _X006;
  _X006  = EXP( CNT20 & !DATA11);

-- Node name is 'DOUT2' = ':15' 
-- Equation name is 'DOUT2', type is output 
 DOUT2   = DFFE( _EQ026 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ026 = !BUSY &  CNT31 & !COUNT1 &  Q &  _X007
         # !BUSY & !CNT30 &  CNT31 & !COUNT2 &  Q
         # !BUSY &  CNT30 & !COUNT1 & !COUNT2 &  Q
         # !BUSY & !CNT20 &  CNT21 &  DATA22 & !Q
         # !BUSY &  CNT20 & !CNT21 &  DATA12 & !Q;
  _X007  = EXP( CNT30 &  COUNT0);

-- Node name is 'DOUT3' = ':13' 
-- Equation name is 'DOUT3', type is output 
 DOUT3   = DFFE( _EQ027 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ027 = !BUSY &  CNT30 &  CNT31 &  COUNT0 & !COUNT1 & !COUNT2 &  Q
         # !BUSY &  CNT30 & !CNT31 &  COUNT1 & !COUNT2 &  Q
         # !BUSY &  CNT30 & !COUNT1 &  COUNT2 &  Q &  _X008
         # !BUSY & !CNT20 &  CNT21 &  DATA23 & !Q
         # !BUSY &  CNT20 & !CNT21 &  DATA13 & !Q;
  _X008  = EXP( CNT31 &  COUNT0);

-- Node name is 'DOUT4' = ':11' 
-- Equation name is 'DOUT4', type is output 
 DOUT4   = DFFE( _EQ028 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ028 = !BUSY &  CNT30 &  CNT31 &  COUNT0 & !COUNT1 &  Q
         # !BUSY &  CNT30 &  CNT31 & !COUNT2 &  Q
         # !BUSY & !CNT30 & !CNT31 &  Q
         # !BUSY & !CNT20 &  DATA24 & !Q
         # !BUSY & !CNT21 & !Q &  _X009;
  _X009  = EXP( CNT20 & !DATA14);

-- Node name is 'DOUT5' = ':9' 
-- Equation name is 'DOUT5', type is output 
 DOUT5   = DFFE( _EQ029 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ029 = !BUSY &  CNT30 &  CNT31 & !COUNT1 &  COUNT2 &  Q
         # !BUSY &  CNT30 &  CNT31 & !COUNT2 &  Q &  _X010
         # !BUSY & !CNT30 & !CNT31 &  Q
         # !BUSY & !CNT20 &  DATA25 & !Q
         # !BUSY & !CNT21 & !Q &  _X011;
  _X010  = EXP(!COUNT0 & !COUNT1);
  _X011  = EXP( CNT20 & !DATA15);

-- Node name is 'DOUT6' = ':7' 
-- Equation name is 'DOUT6', type is output 
 DOUT6   = DFFE( _EQ030 $  _EQ031, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ030 = !BUSY & !CNT21 &  DATA16 & !Q
         # !BUSY & !CNT30 & !CNT31 &  Q
         # !BUSY & !CNT20 &  DATA26 & !Q
         # !BUSY & !CNT20 & !CNT21 & !Q;
  _EQ031 = !BUSY &  CNT30 &  CNT31 & !COUNT1 &  Q &  _X012;
  _X012  = EXP( COUNT0 & !COUNT2);

-- Node name is 'DOUT7' = ':5' 
-- Equation name is 'DOUT7', type is output 
 DOUT7   = DFFE( _EQ032 $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);
  _EQ032 = !BUSY & !CNT21 &  DATA17 & !Q
         # !BUSY & !CNT20 &  DATA27 & !Q
         # !BUSY & !CNT30 & !CNT31 &  Q
         # !BUSY & !CNT20 & !CNT21 & !Q;

-- Node name is ':21' = 'Q' 
-- Equation name is 'Q', location is LC055, type is buried.
Q        = TFFE( _EQ033, GLOBAL( BUSY),  VCC,  VCC,  VCC);
  _EQ033 = !CNT20 &  CNT21 &  DATA10 &  DATA11 & !DATA12 &  DATA13 &  DATA14 & 
              DATA15 &  DATA16 & !DATA17 & !Q
         #  CNT30 &  CNT31 &  COUNT0 & !COUNT1 &  COUNT2 &  Q;

-- Node name is 'REQ' = ':2' 
-- Equation name is 'REQ', type is output 
 REQ     = DFFE(!BUSY $  GND, GLOBAL( CLK),  VCC,  VCC,  VCC);

-- Node name is '|LPM_ADD_SUB:593|addcore:adder|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC053', type is buried 
_LC053   = LCELL( DATA12 $  _EQ034);
  _EQ034 =  DATA10 &  DATA11;

-- Node name is '|LPM_ADD_SUB:593|addcore:adder|result_node5' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC060', type is buried 
_LC060   = LCELL( DATA15 $  _EQ035);
  _EQ035 =  DATA10 &  DATA11 &  DATA12 &  DATA13 &  DATA14;

-- Node name is '|LPM_ADD_SUB:593|addcore:adder|result_node6' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC050', type is buried 
_LC050   = LCELL( DATA16 $  _EQ036);
  _EQ036 =  DATA10 &  DATA11 &  DATA12 &  DATA13 &  DATA14 &  DATA15;

-- Node name is '|LPM_ADD_SUB:593|addcore:adder|result_node7' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC063', type is buried 
_LC063   = LCELL( DATA17 $  _EQ037);
  _EQ037 =  DATA10 &  DATA11 &  DATA12 &  DATA13 &  DATA14 &  DATA15 & 
              DATA16;

-- Node name is '|LPM_ADD_SUB:697|addcore:adder|result_node5' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC031', type is buried 
_LC031   = LCELL( DATA25 $  _EQ038);
  _EQ038 =  DATA20 &  DATA21 &  DATA22 &  DATA23 &  DATA24;

-- Node name is '|LPM_ADD_SUB:697|addcore:adder|result_node6' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC017', type is buried 
_LC017   = LCELL( DATA26 $  _EQ039);
  _EQ039 =  DATA20 &  DATA21 &  DATA22 &  DATA23 &  DATA24 &  DATA25;

-- Node name is '|LPM_ADD_SUB:697|addcore:adder|result_node7' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC018', type is buried 
_LC018   = LCELL( _EQ040 $  DATA27);
  _EQ040 =  DATA20 &  DATA21 &  DATA22 &  DATA23 &  DATA24 &  DATA25 & 
              DATA26;

-- Node name is '|LPM_ADD_SUB:738|addcore:adder|gcp2' from file "addcore.tdf" line 160, column 8
-- Equation name is '_LC023', type is buried 
_LC023   = LCELL( _EQ041 $  DATA22);
  _EQ041 =  DATA21 & !DATA22;

-- Node name is '|LPM_ADD_SUB:738|addcore:adder|result_node5' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC024', type is buried 
_LC024   = LCELL( DATA25 $  _EQ042);
  _EQ042 = !DATA20 & !DATA21 & !DATA22 & !DATA23 & !DATA24;

-- Node name is '|LPM_ADD_SUB:738|addcore:adder|result_node6' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC025', type is buried 
_LC025   = LCELL( DATA26 $  _EQ043);
  _EQ043 = !DATA20 & !DATA21 & !DATA22 & !DATA23 & !DATA24 & !DATA25;

-- Node name is '|LPM_ADD_SUB:738|addcore:adder|result_node7' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC027', type is buried 
_LC027   = LCELL( DATA27 $  _EQ044);
  _EQ044 = !DATA20 & !DATA21 & !DATA22 & !DATA23 & !DATA24 & !DATA25 & 
             !DATA26;

-- Node name is '~1665~1' 
-- Equation name is '~1665~1', location is LC030, type is buried.
-- synthesized logic cell 
_LC030   = LCELL( _EQ045 $  VCC);
  _EQ045 =  DATA20 &  DATA21 &  DATA22 &  DATA23 &  DATA24 & !DATA25 & 
             !DATA26 & !DATA27
         # !_LC030 &  _X013;
  _X013  = EXP(!DATA20 & !DATA21 & !DATA22 & !DATA23 & !DATA24 & !DATA25 & 
             !DATA26 & !DATA27);



--     Shareable expanders that are duplicated in multiple LABs:
--     (none)




Project Information                            e:\作业\eda\yejing\lcd_wave.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Standard

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'MAX7000S' family

      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      PARALLEL_EXPANDERS                  = off
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SOFT_BUFFER_INSERTION               = on
      SUBFACTOR_EXTRACTION                = on
      TURBO_BIT                           = on
      XOR_SYNTHESIS                       = on
      IGNORE_SOFT_BUFFERS                 = off
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      One-Hot State Machine Encoding      = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:01
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:01
   --------------------------             --------
   Total Time                             00:00:03


Memory Allocated
-----------------

Peak memory allocated during compilation  = 4,811K

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