k0r_init.c

NEC单片机的一些参考源码

	TDR00 = 0x0000;			/* timer data register 0: default value (0000H) */

	/****************************************
	 timer channel 1 */
	TMR01 = 0x0000;			/* same setting as channel 0 */
	TDR01 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 2 */
	TMR02 = 0x0000;			/* same setting as channel 0 */
	TDR02 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 3 */
	TMR03 = 0x0000;			/* same setting as channel 0 */
	TDR03 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 4 */
	TMR04 = 0x0000;			/* same setting as channel 0 */
	TDR04 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 5 */
	TMR05 = 0x0000;			/* same setting as channel 0 */
	TDR05 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 6 */
	TMR06 = 0x0000;			/* same setting as channel 0 */
	TDR06 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 timer channel 7 */
	TMR07 = 0x0000;			/* same setting as channel 0 */
	TDR07 = 0x0000;			/* same setting as channel 0 */

	/****************************************
	 real-time counter setting */
	RTCC0 = 0x00;			/* RTCE=0: stops counter operation
					   RCLOE1=RCLOE0=0: disable output of RTC1HZ (1Hz) & RTCCL (32KHz)
					   AMPM=0: 12-hour system
					   CT2-0=0: does not use constant-period interrupt function */

	RTCC1 = 0x00;			/* WALE=0: match operation is invalid
					   WALIE=0: no INTRTC on matching of alarm
					   RWAIT=0: no wait control */

	RTCC2 = 0x00;			/* RINTE=0: no interval interrupt (INTRTCI)
					   RCLOE2=0: output of RTCDIV is disable */

	SUBCUD = 0x00;			/* DEV=F6-0=0: no watch error correction */

	/****************************************
	 watchdog timer setting */
	WDTE = 0xac;			/* watchdog timer counter clears and restarts */

	/****************************************
	 clock output / buzzer output control setting */
	CKS0 = 0x00;			/* PCLOE0=0: PCLBUZ0 output disable */
	CKS1 = 0x00;			/* PCLOE1=0: PCLBUZ1 output disable */

	/****************************************
	 A/D converter setting */
	ADM = 0x00;			/* ADCS=0: stops conversion operation
					   ADCE=0: stops comparator operation
					   LVO=0: when 2.7V < AVREF0 < 5.5V, conversion time: 264/fclk
					   LVO=1: when 2.3V < AVREF0 < 2.7V, conversion time: 480/fclk */
 
	/****************************************
	 D/A converter setting */
	DAM = 0x00;			/* DACE0=0: stops conversion operation
					   DAMD0=0: normal mode */

	DACS0 = 0x00;			/* D/A channel 0 conversion value = 00H (default value) */
	DACS1 = 0x00;			/* D/A channel 1 conversion value = 00H (default value) */

	/**************************************************
	 serial array unit common setting (unit 0) */
	SPS0 = 0x0000;			/* operation clock (CK00 & CK01) = fclk */

	SOE0 = 0x0000;			/* SOE02-0=0: stops output by serial communication operation */

	SO0 = 0x0f0f;			/* CKO02-0=1: serial clock output value is "1"
					   SO02-0=1: serial data output value is "1" */

	SOL0 = 0x0000;			/* SOL02=SOL00=0: communication data is output as is in UART mode */

	NFEN0 = 0x00;			/* SNFEN30=SNFEN20=SNFEN10=SNFEN00=0: noise filter OFF for all serital data inputs */

	/**************************************************
	 serial array unit setting (channel 0 of unit 0) */
	SMR00 = 0x0020;			/* CKS00=0: prescalar output clock CK00 set by PRS register
					   CCS00=0: divided operation clock MCK specified by CKS00 bit
					   STS00=0: only software trigger is valid
					   MD002=0, MD001=1: UART mode
					   MD000=0: transfer end interrupt */

	SCR00 = 0x0087;			/* TXE00=RXE00=0: does not start communication
					   DAP00=CKP00=0: please refer to user's manual for detail data and clock phase 
					   EOC00=0: masks error interrupt INTSRE0
					   PTC001=PTC000=0: no parity in UART mode
					   DIR00=1: inputs/outputs data with LSB first in CSI and UART mode
					   SLC001=SLC000=0: no stop bit
					   DLS002-0=1: 8-bit data length in CSI and UART mode */

	SDR00 = 0x0000;			/* SDR00[15:9]=0: transfer clock = MCK/2 */

	SIR00 = 0x0000;			/* FECT00=0: reset the clear trigger of framming error
					   PECT00=0: reset the clear trigger of parity error
					   OVCT00=0: reset the clear trigger of overrun error */

	/**************************************************
	 serial array unit setting (channel 1 of unit 0) */
	SMR01 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR01 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR01 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR01 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 2 of unit 0) */
	SMR02 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR02 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR02 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR02 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 3 of unit 0) */
	SMR03 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR03 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR03 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR03 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit common setting (unit 1) */
	SPS1 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SOE1 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SO1 = 0x0f0f;			/* same setting as channel 0 of unit 0 */
	SOL1 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 0 of unit 1) */
	SMR10 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR10 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR10 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR10 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 1 of unit 1) */
	SMR11 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR11 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR11 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR11 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 2 of unit 1) */
	SMR12 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR12 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR12 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR12 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial array unit setting (channel 3 of unit 1) */
	SMR13 = 0x0020;			/* same setting as channel 0 of unit 0 */
	SCR13 = 0x0087;			/* same setting as channel 0 of unit 0 */
	SDR13 = 0x0000;			/* same setting as channel 0 of unit 0 */
	SIR13 = 0x0000;			/* same setting as channel 0 of unit 0 */

	/**************************************************
	 serial interface IIC0 setting */
	IICF0 = 0x00;			/* STCF=0: clear STT0 (start condition) flag
					   IICBSY=0: clear IICBSY (I2C bus status) flag
					   STCEN=0: after operation is enabled (IICE0=1), enable generation of a start condition upon detection of s stop condition
					   IICRSV=0: enable communication reservation */

	IICC0 = 0x00;			/* IICE0=0: stop I2C operation
					   LREL0=0: exit from communication: normal operation
					   WREL0=0: do not cancel wait
					   SPIE0=0: disable generation of interrupt request when stop condition is detected
					   WTIM0=0: interrupt request is generated at the eighth clock's falling edge
					   ACKE0=0: disable acknowledgment
					   STT0=0: do not generate a start condition
					   SPT0=0: stop condition is not generated */

	SVA0 = 0x00;			/* slave address=00H (default value) */

	IICCL0 = 0x00;			/* CLD0=0: SCL0 pin was detected at low level
					   DAD0=0: SDA0 pin was detected at low level
					   SMC0=0: operates in standard mode
					   DFC0=0: digital filter off
					   CL01=CL00=0: transfer clock = fCLK/88 */

	IICX0 = 0x00;			/* CLX0=0: no IIC function expansion */

	/**************************************************
	 DMA controller (channel 0) */
	DRC0 = 0x00;			/* DEN0=0: disables DMA operation
					   DST0=0: clear DMA transfer mode flag */

	DMC0 = 0x00;			/* STG0=0: no trigger operation
					   DRS0=0: SFR to internal RAM
					   DS0=0: transfer data size: 8 bits
					   DWAIT0=0: not held pending
					   IFC03-0=0: disables DMA transfer by interrupt (only software trigger is enabled) */

	/**************************************************
	 DMA controller (channel 1) */
	DRC1 = 0x00;			/* same setting as channel 0 */
	DMC1 = 0x00;			/* same setting as channel 0 */
}

/***************************************************************************
*	Title: interrupt function initial setting
****************************************************************************
*	Module:	static void f_ini_itr(void)
*	Arg:
*	Ret:
***************************************************************************/
static void f_ini_itr(void)
{
	/**************************************************
	 external interrupt setting */
	EGP0 = 0b00000000;		/* EGP0-7=0, EGN0-7=0: edge detection disabled */
	EGN0 = 0b00000000;
	EGP1 = 0b00000000;		/* EGP8-11=0, EGN8-11=0: edge detection disabled */
	EGN1 = 0b00000000;

	/**************************************************
	 key return mode setting */
	KRM = 0x00;			/* KRM0-7=0: does not detect key interrupt signal */

	/**************************************************
	 priority specification flag setting */
	PR00L = 0xff;			/* specify level 3 (low priority level) */
	PR10L = 0xff;			/* specify level 3 (low priority level) */

	PR00H = 0xff;			/* specify level 3 (low priority level) */
	PR10H = 0xff;			/* specify level 3 (low priority level) */

	PR01L = 0xff;			/* specify level 3 (low priority level) */
	PR11L = 0xff;			/* specify level 3 (low priority level) */

	PR01L = 0xff;			/* specify level 3 (low priority level) */
	PR11H = 0xff;			/* specify level 3 (low priority level) */

	PR02L = 0xff;			/* specify level 3 (low priority level) */
	PR12L = 0xff;			/* specify level 3 (low priority level) */

	PR02H = 0xff;			/* specify level 3 (low priority level) */
	PR12H = 0xff;			/* specify level 3 (low priority level) */

	/**************************************************
	 interrupt request flag setting	*/
	IF0L = 0x00;			/* clear interrupt request flags */
	IF0H = 0x00;			/* clear interrupt request flags */
	IF1L = 0x00;			/* clear interrupt request flags */
	IF1H = 0x00;			/* clear interrupt request flags */
	IF2L = 0x00;			/* clear interrupt request flags */
	IF2H = 0x00;			/* clear interrupt request flags */

	/**************************************************
	 interrupt mask flag setting */
	MK0L = 0xff;			/* interrupt servicing disabled */
	MK0H = 0xff;			/* interrupt servicing disabled */
	MK1L = 0xff;			/* interrupt servicing disabled */
	MK1H = 0xff;			/* interrupt servicing disabled */
	MK2L = 0xff;			/* interrupt servicing disabled */
	MK2H = 0xff;			/* interrupt servicing disabled */
}