📄 intr.c
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if ( bPowerSaving != TRUE ) // do not power up, if cpu load is low.
#endif //( USESWPWSAVING == 1)
{
int i;
if ( GetCurrentVoltage() != V130 )
{
ChangeVoltage(HIGHVOLTAGE);
for(i=0;i<VOLTAGEDELAY;i++)
{
INREG32(&g_pPortRegs->GPFDAT); // for loop operation, just read.
}
DVS_OFF();
}
}
#elif (DVS_METHOD == 3)
if ( CurrentState == Active )
{
if ( GetCurrentVoltage() != V130 )
{
ChangeVoltage(HIGHVOLTAGE);
for(i=0;i<VOLTAGEDELAY;i++)
{
INREG32(&g_pPortRegs->GPFDAT); // for loop operation, just read.
}
DVS_OFF();
}
}
#endif //(DVS_METHOD == 3)
#endif //DVS_EN
// System timer interrupt?
if (irq == IRQ_TIMER4) {
// Clear the interrupt
OUTREG32(&g_pIntrRegs->SRCPND, 1 << IRQ_TIMER4);
OUTREG32(&g_pIntrRegs->INTPND, 1 << IRQ_TIMER4);
// Rest is on timer interrupt handler
sysIntr = OALTimerIntrHandler();
}
// Profiling timer interrupt?
else if (irq == IRQ_TIMER2)
{
// Mask and Clear the interrupt.
mask = 1 << irq;
SETREG32(&g_pIntrRegs->INTMSK, mask);
OUTREG32(&g_pIntrRegs->SRCPND, mask);
OUTREG32(&g_pIntrRegs->INTPND, mask);
// The rest is up to the profiling interrupt handler (if profiling
// is enabled).
//
if (g_pProfilerISR)
{
sysIntr = g_pProfilerISR(ra);
}
}
#ifdef DVS_EN
#if (DVS_METHOD == 1)
else if(irq == IRQ_LCD)
{
VSYNCINTR = TRUE;
if ( IDLEflag == FALSE )
{
// 4.1 Mask LCD VSYNC Interrupt
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK ) | (1 << IRQ_LCD ));
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
if (INREG32(&g_pLCDRegs->LCDCON5) & (0x3 << 15) ) // Check VSync Area.
{
}
else
{
CurrStateIdle = FALSE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
// 4.2 Return Voltage
ChangeVoltage(HIGHVOLTAGE);
// 4.3 Delay
for(i=0;i<VOLTAGEDELAY;i++)
{
INREG32(&g_pPortRegs->GPFDAT); // for loop operation, just read.
}
// 4.4 DVS_ON = 0 (6:6:6->1:6:6)
DVS_OFF();
// 4.5 Return HCLK
// (1:6:6) -> (1:6:12) -> (1:3:6)
CLKDIV136();
clkval_calc = (WORD)((float)(S3C2440A_HCLK)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
}
}
else
{
// 2.1 Mask LCD VSYNC Interrupt
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK) | (1 << IRQ_LCD)); // disable LCD interrupt
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
if (INREG32(&g_pLCDRegs->LCDCON5) & (0x3 << 15) ) // Check VSync Area.
{
}
else
{
CurrStateIdle = TRUE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
// 2.2 Change HCLK Freq by half
// (1:3:6) -> (1:6:12) -> (1:6:6)
CLKDIV166();
// 2.3 DVS_ON = 1 (6:6:6)
DVS_ON();
// 2.4 Drop Voltage
ChangeVoltage(LOWVOLTAGE);
clkval_calc = (WORD)((float)(S3C2440A_HCLK/2)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
}
}
sysIntr = SYSINTR_NOP;
}
#elif (DVS_METHOD == 3)
else if( irq == IRQ_LCD )
{
VSYNCINTR = TRUE;
if ( NextState == Active )
{
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK) | (1 << IRQ_LCD)); // Disable LCD interrupt
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
CurrStateIdle = FALSE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
ChangeVoltage(HIGHVOLTAGE);
for(i=0;i<VOLTAGEDELAY;i++)
{
INREG32(&g_pPortRegs->GPFDAT); // for loop operation, just read.
}
DVS_OFF();
CLKDIV136();
clkval_calc = (WORD)((float)(S3C2440A_HCLK)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
CurrentState = Active;
NextState = 0;
}
else if ( NextState == SlowActive )
{
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK) | (1 << IRQ_LCD)); // Disable LCD interrupt
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
CurrStateIdle = FALSE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
CLKDIV136();
clkval_calc = (WORD)((float)(S3C2440A_HCLK)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
CurrentState = SlowActive;
NextState = 0;
}
else if ( NextState == LazyActive )
{
// 2.1 Mask LCD VSYNC Interrupt
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK) | (1 << IRQ_LCD)); // Disable LCD interrupt
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
CurrStateIdle = TRUE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
CLKDIV166();
DVS_ON();
ChangeVoltage(LOWVOLTAGE);
clkval_calc = (WORD)((float)(S3C2440A_HCLK/2)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
CurrentState = LazyActive;
NextState = 0;
}
else if ( NextState == DeepIdle )
{
// 2.1 Mask LCD VSYNC Interrupt
OUTREG32(&g_pIntrRegs->INTMSK, INREG32(&g_pIntrRegs->INTMSK) | (1 << IRQ_LCD)); // Disable LCD interrupt
if( INREG32(&g_pLCDRegs->LCDSRCPND) & 2) OUTREG32(&g_pLCDRegs->LCDSRCPND, 0x2);
if( INREG32(&g_pLCDRegs->LCDINTPND) & 2) OUTREG32(&g_pLCDRegs->LCDINTPND, 0x2);
if( INREG32(&g_pIntrRegs->SRCPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->SRCPND, 0x1 << IRQ_LCD);
if( INREG32(&g_pIntrRegs->INTPND) & ( 0x1 << IRQ_LCD)) OUTREG32(&g_pIntrRegs->INTPND, 0x1 << IRQ_LCD);
CurrStateIdle = TRUE;
OUTREG32(&g_pLCDRegs->LCDCON1, INREG32(&g_pLCDRegs->LCDCON1) & ~(0x1)); //Disable LCD Output
CLKDIV166();
DVS_ON();
ChangeVoltage(LOWVOLTAGE);
clkval_calc = (WORD)((float)(S3C2440A_HCLK/2)/(2.0*5000000)+0.5)-1;
OUTREG32(&g_pLCDRegs->LCDCON1, (clkval_calc << 8)|(MVAL_USED << 7)|(3 << 5)|(12 << 1)|(1 << 0));
NextState = 0;
}
sysIntr = SYSINTR_NOP;
}
#endif //(DVS_METHOD == 3)
#endif //DVS_EN
else
{
#ifdef OAL_ILTIMING
if (g_oalILT.active) {
g_oalILT.isrTime1 = OALTimerCountsSinceSysTick();
g_oalILT.savedPC = 0;
g_oalILT.interrupts++;
}
#endif
if (irq == IRQ_EINT4_7 || irq == IRQ_EINT8_23) { // 4 or 5
// Find external interrupt number
mask = INREG32(&g_pPortRegs->EINTPEND);
mask &= ~INREG32(&g_pPortRegs->EINTMASK);
mask = (mask ^ (mask - 1)) >> 5;
irq2 = IRQ_EINT4;
while (mask != 0) {
mask >>= 1;
irq2++;
}
// Mask and clear interrupt
mask = 1 << (irq2 - IRQ_EINT4 + 4);
SETREG32(&g_pPortRegs->EINTMASK, mask);
OUTREG32(&g_pPortRegs->EINTPEND, mask);
// Clear primary interrupt
mask = 1 << irq;
OUTREG32(&g_pIntrRegs->SRCPND, mask);
OUTREG32(&g_pIntrRegs->INTPND, mask);
// From now we care about this irq
irq = irq2;
} else {
// Mask and clear interrupt
mask = 1 << irq;
SETREG32(&g_pIntrRegs->INTMSK, mask);
OUTREG32(&g_pIntrRegs->SRCPND, mask);
OUTREG32(&g_pIntrRegs->INTPND, mask);
}
// First find if IRQ is claimed by chain
sysIntr = NKCallIntChain((UCHAR)irq);
if (sysIntr == SYSINTR_CHAIN || !NKIsSysIntrValid(sysIntr)) {
// IRQ wasn't claimed, use static mapping
sysIntr = OALIntrTranslateIrq(irq);
}
}
return sysIntr;
}
//------------------------------------------------------------------------------
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