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📄 test1.mdl

📁 改程序基于改进节点法(Modified Nodal Approach)与全矩阵技术在Matlab中实现线性电阻电路的符号分析。可以在GUI中描述待分析的电路结构、启动分析并直观的观察分析结果。在实现分
💻 MDL
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	      SupportComplex	      on
	      PurelyIntegerCode	      off
	      SupportContinuousTime   on
	      SupportNonInlinedSFcns  on
	      ExtMode		      off
	      ExtModeStaticAlloc      off
	      ExtModeTesting	      off
	      ExtModeStaticAllocSize  1000000
	      ExtModeTransport	      0
	      ExtModeMexFile	      "ext_comm"
	      RTWCAPISignals	      off
	      RTWCAPIParams	      off
	      RTWCAPIStates	      off
	      GenerateASAP2	      off
	    }
	    PropName		    "Components"
	  }
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      SimulationMode	      "normal"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "sfix(16)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "2^0"
      SampleTime	      "inf"
    }
    Block {
      BlockType		      Display
      Format		      "short"
      Decimation	      "10"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      From
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Gain
      Gain		      "1"
      Multiplication	      "Element-wise(K.*u)"
      ParameterDataTypeMode   "Same as input"
      ParameterDataType	      "sfix(16)"
      ParameterScalingMode    "Best Precision: Matrix-wise"
      ParameterScaling	      "2^0"
      OutDataTypeMode	      "Same as input"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Goto
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Inport
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      Interpolate	      on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      DataType		      "auto"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^0"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      PMComponent
      SubClassName	      "unknown"
    }
    Block {
      BlockType		      PMIOPort
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      on
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "test1"
    Location		    [79, 372, 453, 571]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Display
      Name		      "Display"
      Ports		      [1]
      Position		      [250, 15, 340, 45]
      ShowName		      off
      FontSize		      10
      Decimation	      "1"
    }
    Block {
      BlockType		      Reference
      Name		      "G1=0.001"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [45, 69, 95, 91]
      Orientation	      "left"
      NamePlacement	      "alternate"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Parallel RLC Branch"
      SourceType	      "Parallel RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "a"
      RConnTagsString	      "__new0"
      Resistance	      "1000"
      Inductance	      "inf"
      Capacitance	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "G2=0.0005"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [150, 69, 200, 91]
      Orientation	      "left"
      NamePlacement	      "alternate"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Parallel RLC Branch"
      SourceType	      "Parallel RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "a"
      RConnTagsString	      "__new0"
      Resistance	      "2000"
      Inductance	      "inf"
      Capacitance	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Reference
      Name		      "G3=0.00025"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [114, 110, 136, 160]
      Orientation	      "down"
      AttributesFormatString  "\\n"
      SourceBlock	      "powerlib/Elements/Parallel RLC Branch"
      SourceType	      "Parallel RLC Branch"
      PhysicalDomain	      "powersysdomain"
      SubClassName	      "unknown"
      LeftPortType	      "p1"
      RightPortType	      "p1"
      LConnTagsString	      "a"
      RConnTagsString	      "__new0"
      Resistance	      "4000"
      Inductance	      "inf"
      Capacitance	      "0"
      Measurements	      "None"
    }
    Block {
      BlockType		      Gain
      Name		      "Gain"
      Position		      [210, 110, 240, 140]
      Orientation	      "down"
      NamePlacement	      "alternate"
      ShowName		      off
      Gain		      "2"
      ParameterDataTypeMode   "Inherit via internal rule"
      OutDataTypeMode	      "Inherit via internal rule"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Reference
      Name		      "V12"
      Ports		      [0, 1, 0, 0, 0, 2]
      Position		      [150, 18, 175, 42]
      NamePlacement	      "alternate"
      SourceBlock	      "powerlib/Measurements/Voltage Measurement"
      SourceType	      "Voltage Measurement"
      ShowPortLabels	      on
      PhasorSimulation	      off
      OutputType	      "Complex"
      PSBequivalent	      "0"
    }
    Block {
      BlockType		      Reference
      Name		      "VCVS=2V12"
      Ports		      [1, 0, 0, 0, 0, 1, 1]
      Position		      [257, 105, 293, 150]
      Orientation	      "up"
      SourceBlock	      "powerlib/Electrical\nSources/Controlled Voltage"
" Source"
      SourceType	      "Controlled Voltage Source"
      ShowPortLabels	      on
      Initialize	      on
      SourceType	      "AC"
      Amplitude		      "0"
      Phase		      "0"
      Frequency		      "0"
      Measurements	      "Voltage"
    }
    Block {
      BlockType		      Reference
      Name		      "VS=12"
      Ports		      [0, 0, 0, 0, 0, 1, 1]
      Position		      [15, 115, 35, 150]
      Orientation	      "up"
      SourceBlock	      "powerlib/Electrical\nSources/DC Voltage Source"
      SourceType	      "DC Voltage Source"
      ShowPortLabels	      on
      Amplitude		      "12"
      Measurements	      "None"
    }
    Line {
      LineType		      "Connection"
      Points		      [125, 80; -15, 0; 0, 0]
      DstBlock		      "G1=0.001"
      DstPort		      LConn1
      Branch {
	ConnectType		"SRC_SRC"
	DstBlock		"G2=0.0005"
	DstPort			RConn1
      }
      Branch {
	ConnectType		"SRC_SRC"
	Points			[0, 15]
	DstBlock		"G3=0.00025"
	DstPort			LConn1
      }
      Branch {
	ConnectType		"SRC_SRC"
	Points			[0, -45]
	DstBlock		"V12"
	DstPort			LConn2
      }
    }
    Line {
      LineType		      "Connection"
      SrcBlock		      "VS=12"
      SrcPort		      LConn1
      Points		      [0, 15; 100, 0]
      Branch {
	ConnectType		"DEST_SRC"
	DstBlock		"G3=0.00025"
	DstPort			RConn1
      }
      Branch {
	ConnectType		"DEST_SRC"
	Points			[160, 0]
	DstBlock		"VCVS=2V12"
	DstPort			LConn1
      }
    }
    Line {
      SrcBlock		      "V12"
      SrcPort		      1
      Points		      [0, 0; 45, 0]
      Branch {
	DstBlock		"Display"
	DstPort			1
      }
      Branch {
	DstBlock		"Gain"
	DstPort			1
      }
    }
    Line {
      LineType		      "Connection"
      SrcBlock		      "G2=0.0005"
      SrcPort		      LConn1
      Points		      [60, 0]
      DstBlock		      "VCVS=2V12"
      DstPort		      RConn1
    }
    Line {
      SrcBlock		      "Gain"
      SrcPort		      1
      Points		      [0, 30; 40, 0]
      DstBlock		      "VCVS=2V12"
      DstPort		      1
    }
    Line {
      LineType		      "Connection"
      SrcBlock		      "VS=12"
      SrcPort		      RConn1
      Points		      [0, 0; 0, -20]
      Branch {
	ConnectType		"DEST_SRC"
	Points			[0, -55]
	DstBlock		"V12"
	DstPort			LConn1
      }
      Branch {
	ConnectType		"DEST_DEST"
	SrcBlock		"G1=0.001"
	SrcPort			RConn1
	Points			[-5, 0]
      }
    }
  }
}

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