syslib.c

三星S3C44b0开发板配套 vxworks

     || (strLen < 0)
     || ((offset + strLen) > NV_RAM_SIZE))
        return ERROR;

    NV_RAM_WR_ENBL;

    return (sysFlashSet (string, strLen, offset));

    }

/******************************************************************************
*
* sysFlashBoardDelay - create a delay
*
* This routine is used by flashMem.c to produce specified delays. It
* appears that the Flash driver cannot use taskDelay() at certain
* points.
*
* RETURNS: N/A
*/

void sysFlashBoardDelay (void)
    {
    return;
    }
#endif /* INCLUDE_FLASH */


#ifdef INCLUDE_CACHE_SUPPORT

/******************************************************************************
*
* sngks32cCacheLibInit - initialize ARM cache library function pointers
*
* This routine initializes the cache library for SNG32C processor.  It
* initializes the function pointers and configures the caches to the
* specified cache modes.  Modes should be set before caching is
* enabled.  If two complementary flags are set (enable/disable), no
* action is taken for any of the input flags.
*
* INTERNAL
* This routine is called (from cacheLibInit()), before sysHwInit has
* been called, and before BSS has been cleared.
*
* RETURNS: OK always
*
*/

STATUS sngks32cCacheLibInit
    (
    CACHE_MODE    instMode,    /* instruction cache mode */
    CACHE_MODE    dataMode    /* data cache mode */
    )
    {

#if ((ARMCACHE == ARMCACHE_KS32C))
    cacheLib.enableRtn               = (FUNCPTR) sngks32cCacheEnable;
    cacheLib.disableRtn              = (FUNCPTR) sngks32cCacheDisable;
    cacheLib.flushRtn                = (FUNCPTR) sngks32cCacheFlush;
    cacheLib.invalidateRtn           = (FUNCPTR) NULL;
    cacheLib.clearRtn                = (FUNCPTR) NULL;
    cacheLib.textUpdateRtn           = (FUNCPTR) NULL;
    cacheLib.pipeFlushRtn            = (FUNCPTR) NULL;
    cacheLib.dmaMallocRtn            = (FUNCPTR) sngks32cCacheDmaMalloc;
    cacheLib.dmaFreeRtn              = (FUNCPTR) sngks32cCacheDmaFree;
    sngks32cCacheFuncs.virtToPhysRtn = (FUNCPTR) sngks32cVirtToPhysRtn;
    sngks32cCacheFuncs.physToVirtRtn = (FUNCPTR) sngks32cPhysToVirtRtn;

    if (
    (instMode & CACHE_WRITEALLOCATE)    ||
    (dataMode & CACHE_WRITEALLOCATE)    ||
    (instMode & CACHE_NO_WRITEALLOCATE)    ||
    (dataMode & CACHE_NO_WRITEALLOCATE)    ||
    (instMode & CACHE_SNOOP_ENABLE)        ||
    (dataMode & CACHE_SNOOP_ENABLE)        ||
    (instMode & CACHE_SNOOP_DISABLE)    ||
    (dataMode & CACHE_SNOOP_DISABLE)    ||
    (instMode & CACHE_BURST_ENABLE)        ||
    (dataMode & CACHE_BURST_ENABLE)        ||
    (instMode & CACHE_BURST_DISABLE)    ||
    (dataMode & CACHE_BURST_DISABLE))
        return ERROR;

    /* This has combined Instruction and Data caches */
    if (instMode != dataMode)
        return ERROR;

#else
#error ARMCACHE type not supported here
#endif


    return OK;
    }

/******************************************************************************
*
* sngks32cCacheDmaMalloc - allocate a cache-safe buffer
*
* This routine attempts to return a pointer to a section of memory
* that will not experience cache coherency problems.  This routine
* is only called when MMU support is available for cache control.
*
* RETURNS: A pointer to a cache-safe buffer, or NULL.
*
* SEE ALSO: sngks32cCacheDmaFree(), cacheDmaMalloc()
*
* NOMANUAL
*/

void * sngks32cCacheDmaMalloc
    (
    size_t    bytes    /* size of cache-safe buffer */
    )
    {
    void   *ptr;
    UINT32  foo;

    ptr = malloc (bytes);
    foo = (UINT32)ptr;
    foo |= NON_CACHE_REGION;
    ptr = (void *)foo;

    return (ptr);

    } /* cacheArchDmaMalloc() */

/******************************************************************************
*
* sngks32cCacheDmaFree - free the buffer acquired by cacheArchDmaMalloc()
*
* This routine returns to the free memory pool a block of memory previously
* allocated with cacheArchDmaMalloc().  The buffer is marked cacheable.
*
* RETURNS: OK, or ERROR if cacheArchDmaMalloc() cannot be undone.
*
* SEE ALSO: sngks32cCacheDmaMalloc(), cacheDmaFree()
*
* NOMANUAL
*/

STATUS sngks32cCacheDmaFree
    (
    void *    pBuf        /* ptr returned by cacheArchDmaMalloc() */
    )
    {

    UINT32 foo;

    foo = (UINT32) pBuf;
    foo &= ~NON_CACHE_REGION;
    pBuf = (void *)foo;
	
    free (pBuf);    /* free buffer after modified */

    return OK;

    } /* cacheArchDmaFree() */

/******************************************************************************
*
* sngks32cCacheEnable - enable cache
*
* This routine enables cache
*
* RETURNS: void
*
* SEE ALSO: sngks32cCacheDisable(), sngks32cCacheFlush()
*
* NOMANUAL
*/

void sngks32cCacheEnable
    ( 
    void
    )
    {

    UINT32    result;

    /* Clear cache-related bits */
    SBCARM7_CTRL_REG_READ (S3C44B0X_SYSCFG, result);
    /*-SBCARM7_CTRL_REG_WRITE (SNGKS32C_SYSCFG, (result & 0xffffffC0));*/
	/*  : deleted and added */
    SBCARM7_CTRL_REG_WRITE (S3C44B0X_SYSCFG, (result & (~SBCARM7_CACHE_MODE)));
    SBCARM7_CTRL_REG_READ (S3C44B0X_SYSCFG, result);

	/*  : added */
	SBCARM7_CTRL_REG_WRITE (S3C44B0X_NCACHBE0, 0xC0000000);
	/*SBCARM7_CTRL_REG_WRITE (S3C44B0X_NCACHBE0, 0xC0002000);*/
	/*SBCARM7_CTRL_REG_WRITE (S3C44B0X_NCACHBE1, 0xFFFFC800);*/

#if (SBCARM7_CACHE_SIZE == SBCARM7_CACHE_4K)
    result &= ~SBCARM7_CACHE_MODE;        /* For 4K Cache */
    /*-SBCARM7_CTRL_REG_WRITE (SNGKS32C_SYSCFG, (result | SBCARM7_WRITE_BUFF));*/
    sngks32cCacheFlush();
	/*  : added */
	SBCARM7_CTRL_REG_WRITE (S3C44B0X_SYSCFG, (result | SBCARM7_WRITE_BUFF | SBCARM7_CACHE_4K));

    /*-SBCARM7_CTRL_REG_READ (S3C44B0X_SYSCFG, result);
    SBCARM7_CTRL_REG_WRITE (S3C44B0X_SYSCFG, (result | SBCARM7_CACHE_ENABLE));*/
#endif /* (SBCARM7_CACHE_SIZE == SBCARM7_CACHE_4K) */

#if (SBCARM7_CACHE_SIZE == SBCARM7_CACHE_8K)	
    result &= ~SBCARM7_CACHE_MODE;        /* Clear mode bits */
    /*-SBCARM7_CTRL_REG_WRITE (SNGKS32C_SYSCFG,
                            (result | SBCARM7_WRITE_BUFF | SBCARM7_CACHE_8K));*/
    sngks32cCacheFlush();
	/*  : added */	
	SBCARM7_CTRL_REG_WRITE (S3C44B0X_SYSCFG, (result | SBCARM7_WRITE_BUFF | SBCARM7_CACHE_8K));

    /*-SBCARM7_CTRL_REG_READ (S3C44B0X_SYSCFG, result);
    SBCARM7_CTRL_REG_WRITE(S3C44B0X_SYSCFG, (result | SBCARM7_CACHE_ENABLE));*/
#endif /* (SBCARM7_CACHE_SIZE == SBCARM7_CACHE_8K) */
    }


/******************************************************************************
*
* sngks32cCacheDisable - disable cache
*
* This routine disables cache
*
* RETURNS: void
*
* SEE ALSO: sngks32cCacheEnable(), sngks32cCacheFlush()
*
* NOMANUAL
*/

void sngks32cCacheDisable
    (
    void
    )
    {
    UINT32 result;

    SBCARM7_CTRL_REG_READ(S3C44B0X_SYSCFG, result);
    /*  : SBCARM7_CACHE_ENABLE->SBCARM7_CACHE_MODE */
    SBCARM7_CTRL_REG_WRITE(S3C44B0X_SYSCFG,
                           (result & ~(SBCARM7_CACHE_MODE)));
    }

/******************************************************************************
*
* sngks32cCacheFlush - flush the cache
*
* This routine flushes the cache
*
* RETURNS: void
*
* SEE ALSO: sngks32cCacheEnable(), sngks32cCacheDisable()
*
* NOMANUAL
*/
/*  : 修改较多,如循环次数,地址进位,重新使能等 */
void sngks32cCacheFlush(void)
{
    int i, num;
    UINT32 *tagram;
	UINT32 addr;

	addr = SBCARM7_TAGRAM_BEG;
	num = (SBCARM7_TAGRAM_END - SBCARM7_TAGRAM_BEG)/16;
    sngks32cCacheDisable();
    for(i=0; i < num; i++)
    {
        tagram = (UINT32 *)addr;
        *tagram = 0x00000000; 
        addr += 16;
    }
	SBCARM7_CTRL_REG_WRITE (S3C44B0X_SYSCFG, (SBCARM7_WRITE_BUFF | SBCARM7_CACHE_8K));
}

/******************************************************************************
*
* sngks32cPhysToVirtRtn - force memory to cacheable region
*
* This routine clears the "non-cache" bit on an address to force it to use
* the cacheable region of memory
*
* RETURNS: void
*
* SEE ALSO: sngks32cCacheEnable(), sngks32cCacheDisable()
*
* NOMANUAL
*/

void * sngks32cPhysToVirtRtn 
    (
    void *adrs
    )

    {
    UINT32 foo;

    foo = (UINT32)adrs;
    foo &= ~NON_CACHE_REGION;
    adrs = (void *) foo;
    return adrs;
    }

/******************************************************************************
*
* sngks32cVirtToPhysRtn - force memory to non-cacheable region
*
* This routine sets the "non-cache" bit on an address to force it to use
* the non-cacheable region of memory
*
* RETURNS: void
*
* SEE ALSO: sngks32cCacheEnable(), sngks32cCacheDisable()
*
* NOMANUAL
*/

void * sngks32cVirtToPhysRtn 
    (
    void *adrs
    )
    
    {
    UINT32 foo;

    foo = (UINT32)adrs;
    foo |= NON_CACHE_REGION;
    adrs = (void *) foo;
    return adrs;
    }

#endif    /* INCLUDE_CACHE_SUPPORT */

#ifdef DEBUG
/******************************************************************************
*
* sysDebug - print message using polled serial driver
*
* Use the polled driver to print debug messages.  Useful before the full
* hardware initialization is complete (but only after sysHwInit).
*
* RETURNS: N/A.
*
* NOMANUAL
*/

void sysDebug
    (
    char *str
    )
    {
    int msgSize;
    int msgIx;
    LOCAL SIO_CHAN * pSioChan;        /* serial I/O channel */
    LOCAL BOOL beenHere = FALSE;

    msgSize = strlen (str);

    if (!beenHere)
        {
        sysSerialHwInit ();

        pSioChan = sysSerialChanGet (0);

        sioIoctl (pSioChan, SIO_BAUD_SET, (void *)CONSOLE_BAUD_RATE);

        sioIoctl (pSioChan, SIO_MODE_SET, (void *) SIO_MODE_POLL);

        beenHere = TRUE;
	}

    for (msgIx = 0; msgIx < msgSize; msgIx++)
        {
        while (sioPollOutput (pSioChan, str[msgIx]) == EAGAIN)
            /* do nothing */;
        }
    }
#endif /* DEBUG */