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📄 system_stm32.i

📁 Cortex-m3微控制器软件接口标准 不错的资料
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static __inline uint32_t SysTick_Config(uint32_t ticks)
{ 
  if (ticks > ((1<<24) -1))  return (1);                                                 

  ((SysTick_Type *) ((0xE000E000) + 0x0010))->LOAD  =  (ticks & ((1<<24) -1));                                              
  ((SCB_Type *) ((0xE000E000) + 0x0D00))->SHP[(SysTick_IRQn & 0xF)-4] = (((1<<4) -1) << (8 - 4));     
  ((SysTick_Type *) ((0xE000E000) + 0x0010))->VAL   =  (0x00);                                                                  
  ((SysTick_Type *) ((0xE000E000) + 0x0010))->CTRL = (1 << 2) | (1<<0) | (1<<1);                                
  return (0);                                                                                
}







 








 
static __inline void NVIC_SystemReset(void)
{
  ((SCB_Type *) ((0xE000E000) + 0x0D00))->AIRCR  = ((0x5FA << 16) | (((SCB_Type *) ((0xE000E000) + 0x0D00))->AIRCR & (0x700)) | (1<<2));       
}



 











 
static __inline uint32_t ITM_SendChar (uint32_t ch)
{
  if(ch == '\n') ITM_SendChar('\r');
  
  if ((((CoreDebug_Type *) (0xE000EDF0))->DEMCR & (1 << 24))  &&
      (((ITM_Type *) (0xE0000000))->TCR & 1)                  &&
      (((ITM_Type *) (0xE0000000))->TER & (1UL << 0))  ) 
  {
    while (((ITM_Type *) (0xE0000000))->PORT[0].u32 == 0);
    ((ITM_Type *) (0xE0000000))->PORT[0].u8 = (uint8_t) ch;
  }  
  return (ch);
}




 
























#line 104 "..\\stm32.h"
#line 1 "..\\system_stm32.h"



















 





extern const uint32_t SystemFrequency;                    
extern const uint32_t SystemFrequency_SysClk;             
extern const uint32_t SystemFrequency_AHBClk;             
extern const uint32_t SystemFrequency_APB1Clk;            
extern const uint32_t SystemFrequency_APB2Clk;            










 
extern                   void SystemInit     (void);
#line 105 "..\\stm32.h"











 
extern                   void SystemInit     (void);


 
 
 

 
typedef struct
{
  volatile uint32_t SR;
  volatile uint32_t CR1;
  volatile uint32_t CR2;
  volatile uint32_t SMPR1;
  volatile uint32_t SMPR2;
  volatile uint32_t JOFR1;
  volatile uint32_t JOFR2;
  volatile uint32_t JOFR3;
  volatile uint32_t JOFR4;
  volatile uint32_t HTR;
  volatile uint32_t LTR;
  volatile uint32_t SQR1;
  volatile uint32_t SQR2;
  volatile uint32_t SQR3;
  volatile uint32_t JSQR;
  volatile uint32_t JDR1;
  volatile uint32_t JDR2;
  volatile uint32_t JDR3;
  volatile uint32_t JDR4;
  volatile uint32_t DR;
} ADC_TypeDef;

 
typedef struct
{
       uint32_t RESERVED0;
  volatile uint16_t DR1;
       uint16_t RESERVED1;
  volatile uint16_t DR2;
       uint16_t RESERVED2;
  volatile uint16_t DR3;
       uint16_t RESERVED3;
  volatile uint16_t DR4;
       uint16_t RESERVED4;
  volatile uint16_t DR5;
       uint16_t RESERVED5;
  volatile uint16_t DR6;
       uint16_t RESERVED6;
  volatile uint16_t DR7;
       uint16_t RESERVED7;
  volatile uint16_t DR8;
       uint16_t RESERVED8;
  volatile uint16_t DR9;
       uint16_t RESERVED9;
  volatile uint16_t DR10;
       uint16_t RESERVED10;
  volatile uint16_t RTCCR;
       uint16_t RESERVED11;
  volatile uint16_t CR;
       uint16_t RESERVED12;
  volatile uint16_t CSR;
       uint16_t RESERVED13;
} BKP_TypeDef;

 
typedef struct
{
  volatile uint32_t TIR;
  volatile uint32_t TDTR;
  volatile uint32_t TDLR;
  volatile uint32_t TDHR;
} CAN_TxMailBox_TypeDef;

typedef struct
{
  volatile uint32_t RIR;
  volatile uint32_t RDTR;
  volatile uint32_t RDLR;
  volatile uint32_t RDHR;
} CAN_FIFOMailBox_TypeDef;

typedef struct
{
  volatile uint32_t FR0;
  volatile uint32_t FR1;
} CAN_FilterRegister_TypeDef;

typedef struct
{
  volatile uint32_t MCR;
  volatile uint32_t MSR;
  volatile uint32_t TSR;
  volatile uint32_t RF0R;
  volatile uint32_t RF1R;
  volatile uint32_t IER;
  volatile uint32_t ESR;
  volatile uint32_t BTR;
       uint32_t RESERVED0[88];
  CAN_TxMailBox_TypeDef sTxMailBox[3];
  CAN_FIFOMailBox_TypeDef sFIFOMailBox[2];
       uint32_t RESERVED1[12];
  volatile uint32_t FMR;
  volatile uint32_t FM0R;
       uint32_t RESERVED2[1];
  volatile uint32_t FS0R;
       uint32_t RESERVED3[1];
  volatile uint32_t FFA0R;
       uint32_t RESERVED4[1];
  volatile uint32_t FA0R;
       uint32_t RESERVED5[8];
  CAN_FilterRegister_TypeDef sFilterRegister[14];
} CAN_TypeDef;

 
typedef struct
{
  volatile uint32_t CCR;
  volatile uint32_t CNDTR;
  volatile uint32_t CPAR;
  volatile uint32_t CMAR;
} DMA_Channel_TypeDef;

typedef struct
{
  volatile uint32_t ISR;
  volatile uint32_t IFCR;
} DMA_TypeDef;

 
typedef struct
{
  volatile uint32_t IMR;
  volatile uint32_t EMR;
  volatile uint32_t RTSR;
  volatile uint32_t FTSR;
  volatile uint32_t SWIER;
  volatile uint32_t PR;
} EXTI_TypeDef;

 
typedef struct
{
  volatile uint32_t ACR;
  volatile uint32_t KEYR;
  volatile uint32_t OPTKEYR;
  volatile uint32_t SR;
  volatile uint32_t CR;
  volatile uint32_t AR;
  volatile uint32_t RESERVED;
  volatile uint32_t OBR;
  volatile uint32_t WRPR;
} FLASH_TypeDef;

typedef struct
{
  volatile uint16_t RDP;
  volatile uint16_t USER;
  volatile uint16_t Data0;
  volatile uint16_t Data1;
  volatile uint16_t WRP0;
  volatile uint16_t WRP1;
  volatile uint16_t WRP2;
  volatile uint16_t WRP3;
} OB_TypeDef;

 
typedef struct
{
  volatile uint32_t CRL;
  volatile uint32_t CRH;
  volatile uint32_t IDR;
  volatile uint32_t ODR;
  volatile uint32_t BSRR;
  volatile uint32_t BRR;
  volatile uint32_t LCKR;
} GPIO_TypeDef;

typedef struct
{
  volatile uint32_t EVCR;
  volatile uint32_t MAPR;
  volatile uint32_t EXTICR[4];
} AFIO_TypeDef;

 
typedef struct
{
  volatile uint16_t CR1;
       uint16_t RESERVED0;
  volatile uint16_t CR2;
       uint16_t RESERVED1;
  volatile uint16_t OAR1;
       uint16_t RESERVED2;
  volatile uint16_t OAR2;
       uint16_t RESERVED3;
  volatile uint16_t DR;
       uint16_t RESERVED4;
  volatile uint16_t SR1;
       uint16_t RESERVED5;
  volatile uint16_t SR2;
       uint16_t RESERVED6;
  volatile uint16_t CCR;
       uint16_t RESERVED7;
  volatile uint16_t TRISE;
       uint16_t RESERVED8;
} I2C_TypeDef;

 
typedef struct
{
  volatile uint32_t KR;
  volatile uint32_t PR;
  volatile uint32_t RLR;
  volatile uint32_t SR;
} IWDG_TypeDef;



 
typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t CSR;
} PWR_TypeDef;

 
typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t CFGR;
  volatile uint32_t CIR;
  volatile uint32_t APB2RSTR;
  volatile uint32_t APB1RSTR;
  volatile uint32_t AHBENR;
  volatile uint32_t APB2ENR;
  volatile uint32_t APB1ENR;
  volatile uint32_t BDCR;
  volatile uint32_t CSR;
} RCC_TypeDef;

 
typedef struct
{
  volatile uint16_t CRH;
       uint16_t RESERVED0;
  volatile uint16_t CRL;
       uint16_t RESERVED1;
  volatile uint16_t PRLH;
       uint16_t RESERVED2;
  volatile uint16_t PRLL;
       uint16_t RESERVED3;
  volatile uint16_t DIVH;
       uint16_t RESERVED4;
  volatile uint16_t DIVL;
       uint16_t RESERVED5;
  volatile uint16_t CNTH;
       uint16_t RESERVED6;
  volatile uint16_t CNTL;
       uint16_t RESERVED7;
  volatile uint16_t ALRH;
       uint16_t RESERVED8;
  volatile uint16_t ALRL;
       uint16_t RESERVED9;
} RTC_TypeDef;

 
typedef struct
{
  volatile uint16_t CR1;
       uint16_t RESERVED0;
  volatile uint16_t CR2;
       uint16_t RESERVED1;
  volatile uint16_t SR;
       uint16_t RESERVED2;
  volatile uint16_t DR;
       uint16_t RESERVED3;
  volatile uint16_t CRCPR;
       uint16_t RESERVED4;
  volatile uint16_t RXCRCR;
       uint16_t RESERVED5;
  volatile uint16_t TXCRCR;
       uint16_t RESERVED6;
} SPI_TypeDef;


 
typedef struct
{
  volatile uint16_t CR1;
       uint16_t RESERVED0;
  volatile uint16_t CR2;
       uint16_t RESERVED1;
  volatile uint16_t SMCR;
       uint16_t RESERVED2;
  volatile uint16_t DIER;
       uint16_t RESERVED3;
  volatile uint16_t SR;
       uint16_t RESERVED4;
  volatile uint16_t EGR;
       uint16_t RESERVED5;
  volatile uint16_t CCMR1;
       uint16_t RESERVED6;
  volatile uint16_t CCMR2;
       uint16_t RESERVED7;
  volatile uint16_t CCER;
       uint16_t RESERVED8;
  volatile uint16_t CNT;
       uint16_t RESERVED9;
  volatile uint16_t PSC;
       uint16_t RESERVED10;
  volatile uint16_t ARR;
       uint16_t RESERVED11;
  volatile uint16_t RCR;
       uint16_t RESERVED12;
  volatile uint16_t CCR1;
       uint16_t RESERVED13;
  volatile uint16_t CCR2;
       uint16_t RESERVED14;
  volatile uint16_t CCR3;
       uint16_t RESERVED15;
  volatile uint16_t CCR4;
       uint16_t RESERVED16;
  volatile uint16_t BDTR;
       uint16_t RESERVED17;
  volatile uint16_t DCR;
       uint16_t RESERVED18;
  volatile uint16_t DMAR;
       uint16_t RESERVED19;
} TIM1_TypeDef;

 
typedef struct
{
  volatile uint16_t CR1;
       uint16_t RESERVED0;
  volatile uint16_t CR2;
       uint16_t RESERVED1;
  volatile uint16_t SMCR;
       uint16_t RESERVED2;
  volatile uint16_t DIER;
       uint16_t RESERVED3;
  volatile uint16_t SR;
       uint16_t RESERVED4;
  volatile uint16_t EGR;
       uint16_t RESERVED5;
  volatile uint16_t CCMR1;
       uint16_t RESERVED6;
  volatile uint16_t CCMR2;
       uint16_t RESERVED7;
  volatile uint16_t CCER;
       uint16_t RESERVED8;
  volatile uint16_t CNT;
       uint16_t RESERVED9;
  volatile uint16_t PSC;
       uint16_t RESERVED10;
  volatile uint16_t ARR;
       uint16_t RESERVED11[3];
  volatile uint16_t CCR1;
       uint16_t RESERVED12;
  volatile uint16_t CCR2;
       uint16_t RESERVED13;
  volatile uint16_t CCR3;
       uint16_t RESERVED14;
  volatile uint16_t CCR4;
       uint16_t RESERVED15[3];
  volatile uint16_t DCR;
       uint16_t RESERVED16;
  volatile uint16_t DMAR;
       uint16_t RESERVED17;
} TIM_TypeDef;

 
typedef struct
{
  volatile uint16_t SR;
       uint16_t RESERVED0;
  volatile uint16_t DR;
       uint16_t RESERVED1;
  volatile uint16_t BRR;
       uint16_t RESERVED2;
  volatile uint16_t CR1;
       uint16_t RESERVED3;
  volatile uint16_t CR2;
       uint16_t RESERVED4;
  volatile uint16_t CR3;
       uint16_t RESERVED5;
  volatile uint16_t GTPR;
       uint16_t RESERVED6;
} USART_TypeDef;

 
typedef struct
{
  volatile uint32_t CR;
  volatile uint32_t CFR;
  volatile uint32_t SR;
} WWDG_TypeDef;


 
 
 
 



 



 

 


 




#line 551 "..\\stm32.h"

#line 564 "..\\stm32.h"

#line 573 "..\\stm32.h"




 
 
 
#line 617 "..\\stm32.h"






#line 25 "..\\system_stm32.c"

































































































































































 


 

















 







































































 
#line 288 "..\\system_stm32.c"

#line 301 "..\\system_stm32.c"

#line 308 "..\\system_stm32.c"




 
 
#line 320 "..\\system_stm32.c"

 
#line 330 "..\\system_stm32.c"




 


    


 




#line 362 "..\\system_stm32.c"
   


 










 










 











 
const uint32_t SystemFrequency         = (((8000000 >> 0) * (((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x003C0000)) >> 18) + 2)));    
const uint32_t SystemFrequency_SysClk  = ((8000000 >> 0) * (((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x003C0000)) >> 18) + 2));    
const uint32_t SystemFrequency_AHBClk  = (((8000000 >> 0) * (((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x003C0000)) >> 18) + 2)));    
const uint32_t SystemFrequency_APB1Clk = ((((8000000 >> 0) * (((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x003C0000)) >> 18) + 2))) >> ((((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x00000700)) >> 8) & 0x03)+1));   
const uint32_t SystemFrequency_APB2Clk = ((((8000000 >> 0) * (((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) ) & (0x003C0000)) >> 18) + 2))));   










 
void SystemInit (void)
{
  ((FLASH_TypeDef *) (( uint32_t)0x40022000))->ACR = ( (( 0) << 5) | (( 1) << 4) | (( 0) << 3) | (( 2) << 0) );                         

  ((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CFGR = ( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) );                         
  ((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CR   = ( (( 1) << 24) | (( 0) << 19) | (( 0) << 18) | (( 1) << 16) | (( 16) << 3) | (( 0) << 0) );                           

  if (( (( 1) << 24) | (( 0) << 19) | (( 0) << 18) | (( 1) << 16) | (( 16) << 3) | (( 0) << 0) ) & (0x00000001)) {                  
    while ((((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CR & (0x00000002)) == 0);           
  }

  if (( (( 1) << 24) | (( 0) << 19) | (( 0) << 18) | (( 1) << 16) | (( 16) << 3) | (( 0) << 0) ) & (0x00010000)) {                  
    while ((((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CR & (0x00020000)) == 0);           
  }

  if (( (( 1) << 24) | (( 0) << 19) | (( 0) << 18) | (( 1) << 16) | (( 16) << 3) | (( 0) << 0) ) & (0x01000000)) {                  
    while ((((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CR & (0x02000000)) == 0);           
  }

   
  while ((((RCC_TypeDef *) (((( uint32_t)0x40000000) + 0x20000) + 0x1000))->CFGR & (0x0000000C)) != ((( (( 0) << 24) | (( 0) << 22) | (( 7) << 18) | (( 0) << 17) | (( 1) << 16) | (( 2) << 14) | (( 0) << 11) | (( 4) << 8) | (( 0) << 4) | (( 2) << 0) )<<2) & (0x0000000C)));
}
12

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