ah_eeprom_v3.c.svn-base

最新之atheros芯片driver source code, 基于linux操作系统,內含atheros芯片HAL全部代码

		EEREAD(0xed);
		ee->ee_ob2GHz[1] = eeval & 0x7;
		ee->ee_db2GHz[1] = (eeval >> 3) & 0x7;
	}

	/* Initialize corner cal (thermal tx gain adjust parameters) */
	ee->ee_cornerCal.clip = 4;
	ee->ee_cornerCal.pd90 = 1;
	ee->ee_cornerCal.pd84 = 1;
	ee->ee_cornerCal.gSel = 0;

	/*
	* Read the conformance test limit identifiers
	* These are used to match regulatory domain testing needs with
	* the RD-specific tests that have been calibrated in the EEPROM.
	*/
	off = header[5];
	for (i = 0; i < ee->ee_numCtls; i += 2) {
		EEREAD(off++);
		ee->ee_ctl[i] = (eeval >> 8) & 0xff;
		ee->ee_ctl[i+1] = eeval & 0xff;
	}

	if (ee->ee_version < AR_EEPROM_VER5_3) {
		/* XXX only for 5413? */
		ee->ee_spurChans[0][1] = AR_SPUR_5413_1;
		ee->ee_spurChans[1][1] = AR_SPUR_5413_2;
		ee->ee_spurChans[2][1] = AR_NO_SPUR;
		ee->ee_spurChans[0][0] = AR_NO_SPUR;
	} else {
		/* Read spur mitigation data */
		for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
			EEREAD(off);
			ee->ee_spurChans[i][0] = eeval;
			EEREAD(off+AR_EEPROM_MODAL_SPURS);
			ee->ee_spurChans[i][1] = eeval;
			off++;
		}
	}

	/* for recent changes to NF scale */
	if (ee->ee_version <= AR_EEPROM_VER3_2) {
		ee->ee_noiseFloorThresh[headerInfo11A] = -54;
		ee->ee_noiseFloorThresh[headerInfo11B] = -1;
		ee->ee_noiseFloorThresh[headerInfo11G] = -1;
	}
	/* to override thresh62 for better 2.4 and 5 operation */
	if (ee->ee_version <= AR_EEPROM_VER3_2) {
		ee->ee_thresh62[headerInfo11A] = 15;	/* 11A */
		ee->ee_thresh62[headerInfo11B] = 28;	/* 11B */
		ee->ee_thresh62[headerInfo11G] = 28;	/* 11G */
	}

	/* Check for regulatory capabilities */
	if (ee->ee_version >= AR_EEPROM_VER4_0) {
		EEREAD(regCapOffsetPost4_0);
	} else {
		EEREAD(regCapOffsetPre4_0);
	}

	ee->ee_regCap = eeval;

	if (ee->ee_Amode == 0) {
		/* Check for valid Amode in upgraded h/w */
		if (ee->ee_version >= AR_EEPROM_VER4_0) {
			ee->ee_Amode = (ee->ee_regCap & AR_EEPROM_EEREGCAP_EN_KK_NEW_11A)?1:0;
		} else {
			ee->ee_Amode = (ee->ee_regCap & AR_EEPROM_EEREGCAP_EN_KK_NEW_11A_PRE4_0)?1:0;
		}
	}

	if (ee->ee_version >= AR_EEPROM_VER5_1)
		EEREAD(AR_EEPROM_CAPABILITIES_OFFSET);
	else
		eeval = 0;
	ee->ee_opCap = eeval;

	EEREAD(AR_EEPROM_REG_DOMAIN);
	ee->ee_regdomain = eeval;

	return AH_TRUE;
#undef EEREAD
}

/*
 * Now verify and copy EEPROM contents into the allocated space
 */
static HAL_BOOL
legacyEepromReadContents(struct ath_hal *ah, HAL_EEPROM *ee)
{
	/* Read the header information here */
	if (!readHeaderInfo(ah, ee))
		return AH_FALSE;
#if 0
	/* Require 5112 devices to have EEPROM 4.0 EEP_MAP set */
	if (IS_5112(ah) && !ee->ee_eepMap) {
		HALDEBUG(ah, HAL_DEBUG_ANY,
		    "%s: 5112 devices must have EEPROM 4.0 with the "
		    "EEP_MAP set\n", __func__);
		return AH_FALSE;
	}
#endif
	/*
	 * Group 1: frequency pier locations readback
	 * check that the structure has been populated
	 * with enough space to hold the channels
	 *
	 * NOTE: Group 1 contains the 5 GHz channel numbers
	 *	 that have dBm->pcdac calibrated information.
	 */
	if (!readEepromFreqPierInfo(ah, ee))
		return AH_FALSE;

	/*
	 * Group 2:  readback data for all frequency piers
	 *
	 * NOTE: Group 2 contains the raw power calibration
	 *	 information for each of the channels that we
	 *	 recorded above.
	 */
	if (!readEepromRawPowerCalInfo(ah, ee))
		return AH_FALSE;

	/*
	 * Group 5: target power values per rate
	 *
	 * NOTE: Group 5 contains the recorded maximum power
	 *	 in dB that can be attained for the given rate.
	 */
	/* Read the power per rate info for test channels */
	if (!readEepromTargetPowerCalInfo(ah, ee))
		return AH_FALSE;

	/*
	 * Group 8: Conformance Test Limits information
	 *
	 * NOTE: Group 8 contains the values to limit the
	 *	 maximum transmit power value based on any
	 *	 band edge violations.
	 */
	/* Read the RD edge power limits */
	return readEepromCTLInfo(ah, ee);
}

static HAL_STATUS
legacyEepromGet(struct ath_hal *ah, int param, void *val)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
	uint8_t *macaddr;
	uint16_t eeval;
	uint32_t sum;
	int i;

	switch (param) {
	case AR_EEP_OPCAP:
		*(uint16_t *) val = ee->ee_opCap;
		return HAL_OK;
	case AR_EEP_REGDMN_0:
		*(uint16_t *) val = ee->ee_regdomain;
		return HAL_OK;
	case AR_EEP_RFSILENT:
		if (!ath_hal_eepromRead(ah, AR_EEPROM_RFSILENT, &eeval))
			return HAL_EEREAD;
		*(uint16_t *) val = eeval;
		return HAL_OK;
	case AR_EEP_MACADDR:
		sum = 0;
		macaddr = val;
		for (i = 0; i < 3; i++) {
			if (!ath_hal_eepromRead(ah, AR_EEPROM_MAC(2-i), &eeval)) {
				HALDEBUG(ah, HAL_DEBUG_ANY,
				    "%s: cannot read EEPROM location %u\n",
				    __func__, i);
				return HAL_EEREAD;
			}
			sum += eeval;
			macaddr[2*i] = eeval >> 8;
			macaddr[2*i + 1] = eeval & 0xff;
		}
		if (sum == 0 || sum == 0xffff*3) {
			HALDEBUG(ah, HAL_DEBUG_ANY,
			    "%s: mac address read failed: %s\n", __func__,
			    ath_hal_ether_sprintf(macaddr));
			return HAL_EEBADMAC;
		}
		return HAL_OK;
	case AR_EEP_RFKILL:
		HALASSERT(val == AH_NULL);
		return ee->ee_rfKill ? HAL_OK : HAL_EIO;
	case AR_EEP_AMODE:
		HALASSERT(val == AH_NULL);
		return ee->ee_Amode ? HAL_OK : HAL_EIO;
	case AR_EEP_BMODE:
		HALASSERT(val == AH_NULL);
		return ee->ee_Bmode ? HAL_OK : HAL_EIO;
	case AR_EEP_GMODE:
		HALASSERT(val == AH_NULL);
		return ee->ee_Gmode ? HAL_OK : HAL_EIO;
	case AR_EEP_TURBO5DISABLE:
		HALASSERT(val == AH_NULL);
		return ee->ee_turbo5Disable ? HAL_OK : HAL_EIO;
	case AR_EEP_TURBO2DISABLE:
		HALASSERT(val == AH_NULL);
		return ee->ee_turbo2Disable ? HAL_OK : HAL_EIO;
	case AR_EEP_ISTALON:		/* Talon detect */
		HALASSERT(val == AH_NULL);
		return (ee->ee_version >= AR_EEPROM_VER5_4 &&
		    ath_hal_eepromRead(ah, 0x0b, &eeval) && eeval == 1) ?
			HAL_OK : HAL_EIO;
	case AR_EEP_32KHZCRYSTAL:
		HALASSERT(val == AH_NULL);
		return ee->ee_exist32kHzCrystal ? HAL_OK : HAL_EIO;
	case AR_EEP_COMPRESS:
		HALASSERT(val == AH_NULL);
		return (ee->ee_opCap & AR_EEPROM_EEPCAP_COMPRESS_DIS) == 0 ?
		    HAL_OK : HAL_EIO;
	case AR_EEP_FASTFRAME:
		HALASSERT(val == AH_NULL);
		return (ee->ee_opCap & AR_EEPROM_EEPCAP_FASTFRAME_DIS) == 0 ?
		    HAL_OK : HAL_EIO;
	case AR_EEP_AES:
		HALASSERT(val == AH_NULL);
		return (ee->ee_opCap & AR_EEPROM_EEPCAP_AES_DIS) == 0 ?
		    HAL_OK : HAL_EIO;
	case AR_EEP_BURST:
		HALASSERT(val == AH_NULL);
		return (ee->ee_opCap & AR_EEPROM_EEPCAP_BURST_DIS) == 0 ?
		    HAL_OK : HAL_EIO;
	case AR_EEP_MAXQCU:
		if (ee->ee_opCap & AR_EEPROM_EEPCAP_MAXQCU) {
			*(uint16_t *) val =
			    MS(ee->ee_opCap, AR_EEPROM_EEPCAP_MAXQCU);
			return HAL_OK;
		} else
			return HAL_EIO;
	case AR_EEP_KCENTRIES:
		if (ee->ee_opCap & AR_EEPROM_EEPCAP_KC_ENTRIES) {
			*(uint16_t *) val =
			    1 << MS(ee->ee_opCap, AR_EEPROM_EEPCAP_KC_ENTRIES);
			return HAL_OK;
		} else
			return HAL_EIO;
	case AR_EEP_ANTGAINMAX_5:
		*(int8_t *) val = ee->ee_antennaGainMax[0];
		return HAL_OK;
	case AR_EEP_ANTGAINMAX_2:
		*(int8_t *) val = ee->ee_antennaGainMax[1];
		return HAL_OK;
	case AR_EEP_WRITEPROTECT:
		HALASSERT(val == AH_NULL);
		return (ee->ee_protect & AR_EEPROM_PROTECT_WP_128_191) ?
		    HAL_OK : HAL_EIO;
	}
	return HAL_EINVAL;
}

static HAL_BOOL
legacyEepromSet(struct ath_hal *ah, int param, int v)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;

	switch (param) {
	case AR_EEP_AMODE:
		ee->ee_Amode = v;
		return HAL_OK;
	case AR_EEP_BMODE:
		ee->ee_Bmode = v;
		return HAL_OK;
	case AR_EEP_GMODE:
		ee->ee_Gmode = v;
		return HAL_OK;
	case AR_EEP_TURBO5DISABLE:
		ee->ee_turbo5Disable = v;
		return HAL_OK;
	case AR_EEP_TURBO2DISABLE:
		ee->ee_turbo2Disable = v;
		return HAL_OK;
	case AR_EEP_COMPRESS:
		if (v)
			ee->ee_opCap &= ~AR_EEPROM_EEPCAP_COMPRESS_DIS;
		else
			ee->ee_opCap |= AR_EEPROM_EEPCAP_COMPRESS_DIS;
		return HAL_OK;
	case AR_EEP_FASTFRAME:
		if (v)
			ee->ee_opCap &= ~AR_EEPROM_EEPCAP_FASTFRAME_DIS;
		else
			ee->ee_opCap |= AR_EEPROM_EEPCAP_FASTFRAME_DIS;
		return HAL_OK;
	case AR_EEP_AES:
		if (v)
			ee->ee_opCap &= ~AR_EEPROM_EEPCAP_AES_DIS;
		else
			ee->ee_opCap |= AR_EEPROM_EEPCAP_AES_DIS;
		return HAL_OK;
	case AR_EEP_BURST:
		if (v)
			ee->ee_opCap &= ~AR_EEPROM_EEPCAP_BURST_DIS;
		else
			ee->ee_opCap |= AR_EEPROM_EEPCAP_BURST_DIS;
		return HAL_OK;
	}
	return HAL_EINVAL;
}

static HAL_BOOL
legacyEepromDiag(struct ath_hal *ah, int request,
     const void *args, uint32_t argsize, void **result, uint32_t *resultsize)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
	const EEPROM_POWER_EXPN_5112 *pe;

	switch (request) {
	case HAL_DIAG_EEPROM:
		*result = ee;
		*resultsize = sizeof(*ee);
		return AH_TRUE;
	case HAL_DIAG_EEPROM_EXP_11A:
	case HAL_DIAG_EEPROM_EXP_11B:
	case HAL_DIAG_EEPROM_EXP_11G:
		pe = &ee->ee_modePowerArray5112[
		    request - HAL_DIAG_EEPROM_EXP_11A];
		*result = pe->pChannels;
		*resultsize = (*result == AH_NULL) ? 0 :
			roundup(sizeof(uint16_t) * pe->numChannels,
				sizeof(uint32_t)) +
			sizeof(EXPN_DATA_PER_CHANNEL_5112) * pe->numChannels;
		return AH_TRUE;
	}
	return AH_FALSE;
}

static uint16_t
legacyEepromGetSpurChan(struct ath_hal *ah, int ix, HAL_BOOL is2GHz)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;

	HALASSERT(0 <= ix && ix < AR_EEPROM_MODAL_SPURS);
	return ee->ee_spurChans[ix][is2GHz];
}

/*
 * Reclaim any EEPROM-related storage.
 */
static void
legacyEepromDetach(struct ath_hal *ah)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;

        if (ee->ee_version >= AR_EEPROM_VER4_0 && ee->ee_eepMap == 1)
		return freeEepromRawPowerCalInfo5112(ah, ee);
	ath_hal_free(ee);
	AH_PRIVATE(ah)->ah_eeprom = AH_NULL;
}

/*
 * These are not valid 2.4 channels, either we change 'em
 * or we need to change the coding to accept them.
 */
static const uint16_t channels11b[] = { 2412, 2447, 2484 };
static const uint16_t channels11g[] = { 2312, 2412, 2484 };

HAL_STATUS
ath_hal_legacyEepromAttach(struct ath_hal *ah)
{
	HAL_EEPROM *ee = AH_PRIVATE(ah)->ah_eeprom;
	uint32_t sum, eepMax;
	uint16_t eeversion, eeprotect, eeval;
	u_int i;

	HALASSERT(ee == AH_NULL);

	if (!ath_hal_eepromRead(ah, AR_EEPROM_VERSION, &eeversion)) {
		HALDEBUG(ah, HAL_DEBUG_ANY,
		    "%s: unable to read EEPROM version\n", __func__);
		return HAL_EEREAD;
	}
	if (eeversion < AR_EEPROM_VER3) {
		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unsupported EEPROM version "
		    "%u (0x%x) found\n", __func__, eeversion, eeversion);
		return HAL_EEVERSION;
	}

	if (!ath_hal_eepromRead(ah, AR_EEPROM_PROTECT, &eeprotect)) {
		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: cannot read EEPROM protection "
		    "bits; read locked?\n", __func__);
		return HAL_EEREAD;
	}
	HALDEBUG(ah, HAL_DEBUG_ATTACH, "EEPROM protect 0x%x\n", eeprotect);
	/* XXX check proper access before continuing */

	/*
	 * Read the Atheros EEPROM entries and calculate the checksum.
	 */
	if (!ath_hal_eepromRead(ah, AR_EEPROM_SIZE_UPPER, &eeval)) {
		HALDEBUG(ah, HAL_DEBUG_ANY,
		    "%s: cannot read EEPROM upper size\n" , __func__);
		return HAL_EEREAD;
	}
	if (eeval != 0)	{
		eepMax = (eeval & AR_EEPROM_SIZE_UPPER_MASK) <<
			AR_EEPROM_SIZE_ENDLOC_SHIFT;
		if (!ath_hal_eepromRead(ah, AR_EEPROM_SIZE_LOWER, &eeval)) {
			HALDEBUG(ah, HAL_DEBUG_ANY,
			    "%s: cannot read EEPROM lower size\n" , __func__);
			return HAL_EEREAD;
		}
		eepMax = (eepMax | eeval) - AR_EEPROM_ATHEROS_BASE;
	} else
		eepMax = AR_EEPROM_ATHEROS_MAX;
	sum = 0;
	for (i = 0; i < eepMax; i++) {
		if (!ath_hal_eepromRead(ah, AR_EEPROM_ATHEROS(i), &eeval)) {
			return HAL_EEREAD;
		}
		sum ^= eeval;
	}
	if (sum != 0xffff) {
		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: bad EEPROM checksum 0x%x\n",
		    __func__, sum);
		return HAL_EEBADSUM;
	}

	ee = ath_hal_malloc(sizeof(HAL_EEPROM));
	if (ee == AH_NULL) {
		/* XXX message */
		return HAL_ENOMEM;
	}

	ee->ee_protect = eeprotect;
	ee->ee_version = eeversion;

	ee->ee_numChannels11a = NUM_11A_EEPROM_CHANNELS;
	ee->ee_numChannels2_4 = NUM_2_4_EEPROM_CHANNELS;

	for (i = 0; i < NUM_11A_EEPROM_CHANNELS; i ++)
		ee->ee_dataPerChannel11a[i].numPcdacValues = NUM_PCDAC_VALUES;

	/* the channel list for 2.4 is fixed, fill this in here */
	for (i = 0; i < NUM_2_4_EEPROM_CHANNELS; i++) {
		ee->ee_channels11b[i] = channels11b[i];
		/* XXX 5211 requires a hack though we don't support 11g */
		if (ah->ah_magic == 0x19570405)
			ee->ee_channels11g[i] = channels11b[i];
		else
			ee->ee_channels11g[i] = channels11g[i];
		ee->ee_dataPerChannel11b[i].numPcdacValues = NUM_PCDAC_VALUES;
		ee->ee_dataPerChannel11g[i].numPcdacValues = NUM_PCDAC_VALUES;
	}

	if (!legacyEepromReadContents(ah, ee)) {
		/* XXX message */
		ath_hal_free(ee);
		return HAL_EEREAD;	/* XXX */
	}

	AH_PRIVATE(ah)->ah_eeprom = ee;
	AH_PRIVATE(ah)->ah_eeversion = eeversion;
	AH_PRIVATE(ah)->ah_eepromDetach = legacyEepromDetach;
	AH_PRIVATE(ah)->ah_eepromGet = legacyEepromGet;
	AH_PRIVATE(ah)->ah_eepromSet = legacyEepromSet;
	AH_PRIVATE(ah)->ah_getSpurChan = legacyEepromGetSpurChan;
	AH_PRIVATE(ah)->ah_eepromDiag = legacyEepromDiag;
	return HAL_OK;
}