if_athvar.h.svn-base

最新之atheros芯片driver source code, 基于linux操作系统,內含atheros芯片HAL全部代码

	 * this flag means that beacons transmission is evenly distributed
	 * over time. If unset, it means that beacons for all VAPs are sent
	 * at the same time. For instance, with a common beacon interval of
	 * 100 TU and 2 VAPs, 1 beacon is sent every 50 TU (staggered mode)
	 * or 2 beacons are sent every 100 TU (bursted mode) depending on
	 * this flag
	 */
	unsigned int	sc_stagbeacons:1;	/* use staggered beacons */
	unsigned int	sc_dfswait:1;		/* waiting on channel for radar detect */
	unsigned int	sc_ackrate:1;		/* send acks at high bitrate */
	unsigned int	sc_dfs_cac:1;		/* waiting on channel for radar detect */
	unsigned int	sc_hasintmit:1;		/* Interference mitigation */
	unsigned int	sc_useintmit:1;		/* Interference mitigation enabled? */
	unsigned int	sc_txcont:1;		/* Is continuous transmit enabled? */
	unsigned int	sc_dfs_testmode:1; 	/* IF this is on, AP vaps will stay in
						 * 'channel availability check' indefinately,
						 * reporting radar and interference detections. */
	unsigned int	sc_dmasize_stomp:1;	/* Whether to stomp on DMA size. */

	unsigned int sc_txcont_power; /* Continuous transmit power in 0.5dBm units */
	unsigned int sc_txcont_rate;  /* Continuous transmit rate in Mbps */

	/* rate tables */
	const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX];
	const HAL_RATE_TABLE *sc_currates;	/* current rate table */
	const HAL_RATE_TABLE *sc_xr_rates;	/* XR rate table */
	const HAL_RATE_TABLE *sc_half_rates;	/* half rate table */
	const HAL_RATE_TABLE *sc_quarter_rates;	/* quarter rate table */
	HAL_OPMODE sc_opmode;			/* current hal operating mode */
	enum ieee80211_phymode sc_curmode;	/* current phy mode */
	u_int16_t sc_curtxpow;			/* current tx power limit */
	u_int16_t sc_curaid;			/* current association id */
	HAL_CHANNEL sc_curchan;			/* current h/w channel */
	u_int8_t sc_curbssid[IEEE80211_ADDR_LEN];
	u_int8_t	sc_rixmap[256];			/* IEEE to h/w rate table ix */
	struct {
		u_int8_t	ieeerate;		/* IEEE rate */
		u_int8_t	flags;			/* radiotap flags */
		u_int16_t ledon;			/* softled on time */
		u_int16_t ledoff;		/* softled off time */
	} sc_hwmap[32];				/* h/w rate ix mappings */
	u_int8_t sc_minrateix;			/* min h/w rate index */
	u_int8_t sc_protrix;			/* protection rate index */
	u_int8_t sc_mcastantenna;		/* Multicast antenna number */
	u_int8_t sc_txantenna;			/* data tx antenna (fixed or auto) */
	u_int8_t sc_rxantenna;			/* current default antenna */
	u_int8_t sc_numrxotherant;		/* RXs on non-default antenna */
	u_int16_t sc_nvaps;			/* # of active virtual APs */
	u_int8_t sc_nstavaps;			/* # of active station VAPs */
	u_int8_t sc_nmonvaps;			/* # of monitor VAPs */
	u_int8_t sc_nbcnvaps;			/* # of vaps sending beacons */
	u_int sc_fftxqmin;			/* aggregation threshold */
	HAL_INT sc_imask;			/* interrupt mask copy */
	u_int sc_keymax;			/* size of key cache */
	u_int8_t sc_keymap[ATH_KEYBYTES];	/* key use bit map */
	struct ieee80211_node *sc_keyixmap[ATH_KEYMAX];/* key ix->node map */
	u_int8_t sc_bssidmask[IEEE80211_ADDR_LEN];

	u_int sc_ledpin;			/* GPIO pin for driving LED */
	u_int sc_ledon;				/* pin setting for LED on */
	u_int sc_ledidle;			/* idle polling interval */
	unsigned long sc_ledevent;		/* time of last LED event */
	u_int8_t sc_rxrate;			/* current rx rate for LED */
	u_int8_t sc_txrate;			/* current tx rate for LED */
	u_int16_t sc_ledoff;			/* off time for current blink */
	struct timer_list sc_ledtimer;		/* led off timer */

	struct ATH_TQ_STRUCT sc_fataltq;	/* fatal error intr tasklet */

	int sc_rxbufsize;			/* rx size based on mtu */
	struct ath_descdma sc_rxdma;		/* RX descriptors */
	ath_bufhead sc_rxbuf;			/* receive buffer */
	struct ath_buf *sc_rxbufcur;		/* current rx buffer */
	u_int32_t *sc_rxlink;			/* link ptr in last RX desc */
	spinlock_t sc_rxbuflock;
	struct ATH_TQ_STRUCT sc_rxtq;		/* rx intr tasklet */
	struct ATH_TQ_STRUCT sc_rxorntq;	/* rxorn intr tasklet */
	u_int16_t sc_cachelsz;			/* cache line size */

	struct ath_descdma sc_txdma;		/* TX descriptors */
	ath_bufhead sc_txbuf;			/* TX buffers pool */
	atomic_t sc_txbuf_counter;              /* number of available TX
						 * buffers */
	spinlock_t sc_txbuflock;		/* txbuf lock */
	u_int sc_txqsetup;			/* h/w queues setup */
	u_int sc_txintrperiod;			/* tx interrupt batching */
	struct ath_txq sc_txq[HAL_NUM_TX_QUEUES];
	struct ath_txq *sc_ac2q[WME_NUM_AC];	/* WME AC -> h/w qnum */
	struct ATH_TQ_STRUCT sc_txtq;		/* tx intr tasklet */
	u_int8_t sc_grppoll_str[GRPPOLL_RATE_STR_LEN];
	struct ath_descdma sc_bdma;		/* beacon descriptors */
	ath_bufhead sc_bbuf;			/* beacon buffers */
	spinlock_t sc_bbuflock;			/* beacon buffers lock */
	u_int sc_bhalq;				/* HAL q for outgoing beacons */
	u_int sc_bmisscount;			/* missed beacon transmits */
	u_int32_t sc_ant_tx[8];			/* recent tx frames/antenna */
	struct ath_txq *sc_cabq;		/* tx q for cab frames */
	struct ath_txq sc_grpplq;		/* tx q for XR group polls */
	struct ath_txq *sc_xrtxq;		/* tx q for XR data */
	struct ath_descdma sc_grppolldma;	/* TX descriptors for grppoll */
	ath_bufhead sc_grppollbuf;		/* transmit buffers for grouppoll  */
	spinlock_t sc_grppollbuflock;		/* grouppoll lock  */
	u_int16_t sc_xrpollint;			/* xr poll interval */
	u_int16_t sc_xrpollcount;		/* xr poll count */
	struct ath_txq *sc_uapsdq;		/* tx q for uapsd */
	struct ATH_TQ_STRUCT sc_bmisstq;	/* bmiss intr tasklet */
	struct ATH_TQ_STRUCT sc_bstucktq;	/* beacon stuck intr tasklet */
	enum {
		OK,				/* no change needed */
		UPDATE,				/* update pending */
		COMMIT				/* beacon sent, commit change */
	} sc_updateslot;			/* slot time update fsm */
	int sc_slotupdate;			/* slot to next advance fsm */
	struct ieee80211vap **sc_bslot;		/* beacon xmit slots */
	int sc_bnext;				/* next slot for beacon xmit */

	int sc_beacon_cal;			/* use beacon timer for calibration */
	long unsigned int sc_calinterval_sec;	/* current interval for calibration (in seconds) */
	unsigned long sc_lastcal;		/* last time the calibration was performed */
	struct timer_list sc_cal_ch;		/* calibration timer */
	HAL_NODE_STATS sc_halstats;		/* station-mode rssi stats */

	struct ctl_table_header *sc_sysctl_header;
	struct ctl_table *sc_sysctls;

	struct timer_list sc_mib_enable;

#ifdef ATH_REVERSE_ENGINEERING
	u_int8_t register_snapshot[MAX_REGISTER_ADDRESS];
#endif /* #ifdef ATH_REVERSE_ENGINEERING */

#ifdef ATH_SUPERG_DYNTURBO
	struct timer_list sc_dturbo_switch_mode;/* AP scan timer */
	u_int32_t sc_dturbo_tcount;		/* beacon intval count */
	u_int32_t sc_dturbo_hold_max;		/* hold count before switching to base*/
	u_int16_t sc_dturbo_hold_count;		/* hold count before switching to base*/
	u_int16_t sc_dturbo_turbo_tmin;		/* min turbo count */
	u_int32_t sc_dturbo_bytes;		/* bandwidth stats */
	u_int32_t sc_dturbo_base_tmin;		/* min time in base */
	u_int32_t sc_dturbo_turbo_tmax;		/* max time in turbo */
	u_int32_t sc_dturbo_bw_base;		/* bandwidth threshold */
	u_int32_t sc_dturbo_bw_turbo;		/* bandwidth threshold */
#endif
	u_int sc_slottimeconf;			/* manual override for slottime */
	u_int sc_acktimeoutconf;		/* manual override for ack timeout */
	u_int sc_ctstimeoutconf;		/* manual override for cts timeout */

	struct timer_list sc_dfs_excl_timer;	/* mark expiration timer task */
	struct timer_list sc_dfs_cac_timer;	/* dfs wait timer */
	u_int32_t sc_dfs_cac_period;		/* DFS wait time before accessing a
					         * channel (in seconds). FCC 
						 * requires 60s. */
	u_int32_t sc_dfs_excl_period;		/* DFS channel non-occupancy limit
						 * after radar is detected (in seconds).
						 * FCC requires 30m. */
	u_int64_t sc_rp_lasttsf;		/* TSF at last detected radar pulse */

	
	
	struct ath_rp *sc_rp;			/* radar pulse circular array */
	struct list_head sc_rp_list;
	int sc_rp_num;
	int sc_rp_min;
	HAL_BOOL (*sc_rp_analyze)(struct ath_softc *sc);
	struct ATH_TQ_STRUCT sc_rp_tq;
	
	int sc_rp_ignored;			/* if set, we ignored all 
						 * received pulses */
	int sc_radar_ignored;			/* if set, we ignored all 
						 * detected radars */
	u_int32_t sc_nexttbtt;
	u_int64_t sc_last_tsf;
};

typedef void (*ath_callback) (struct ath_softc *);
#define	ATH_TXQ_SETUP(sc, i)	((sc)->sc_txqsetup & (1 << i))

#define	ATH_TXBUF_LOCK_INIT(_sc)	spin_lock_init(&(_sc)->sc_txbuflock)
#define	ATH_TXBUF_LOCK_DESTROY(_sc)
#define	ATH_TXBUF_LOCK_IRQ(_sc)		do {	\
	unsigned long __txbuflockflags;		\
	ATH_TXBUF_LOCK_CHECK(_sc);		\
	spin_lock_irqsave(&(_sc)->sc_txbuflock, __txbuflockflags);
#define	ATH_TXBUF_UNLOCK_IRQ(_sc)		\
	ATH_TXBUF_LOCK_ASSERT(_sc);		\
	spin_unlock_irqrestore(&(_sc)->sc_txbuflock, __txbuflockflags); \
} while (0)
#define	ATH_TXBUF_UNLOCK_IRQ_EARLY(_sc)		\
	ATH_TXBUF_LOCK_ASSERT(_sc);		\
	spin_unlock_irqrestore(&(_sc)->sc_txbuflock, __txbuflockflags);

#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)) && defined(spin_is_locked)
#define	ATH_TXBUF_LOCK_ASSERT(_sc) \
	KASSERT(spin_is_locked(&(_sc)->sc_txbuflock), ("txbuf not locked!"))
#if (defined(ATH_DEBUG_SPINLOCKS))
#define	ATH_TXBUF_LOCK_CHECK(_sc) do { \
	if (spin_is_locked(&(_sc)->sc_txbuflock)) \
		printk(KERN_DEBUG "%s:%d - about to block on txbuf lock!\n", __func__, __LINE__); \
} while (0)
#else /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#define	ATH_TXBUF_LOCK_CHECK(_sc)
#endif /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#else
#define	ATH_TXBUF_LOCK_ASSERT(_sc)
#define	ATH_TXBUF_LOCK_CHECK(_sc)
#endif


#define	ATH_RXBUF_LOCK_INIT(_sc)	spin_lock_init(&(_sc)->sc_rxbuflock)
#define	ATH_RXBUF_LOCK_DESTROY(_sc)
#define	ATH_RXBUF_LOCK_IRQ(_sc)		do {	\
	unsigned long __rxbuflockflags;		\
	ATH_RXBUF_LOCK_CHECK(_sc); 		\
	spin_lock_irqsave(&(_sc)->sc_rxbuflock, __rxbuflockflags);
#define	ATH_RXBUF_UNLOCK_IRQ(_sc)		\
	ATH_RXBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_rxbuflock, __rxbuflockflags); \
} while (0)
#define	ATH_RXBUF_UNLOCK_IRQ_EARLY(_sc)		\
	ATH_RXBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_rxbuflock, __rxbuflockflags);

#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)) && defined(spin_is_locked)
#define	ATH_RXBUF_LOCK_ASSERT(_sc) \
	KASSERT(spin_is_locked(&(_sc)->sc_rxbuflock), ("rxbuf not locked!"))
#if (defined(ATH_DEBUG_SPINLOCKS))
#define	ATH_RXBUF_LOCK_CHECK(_sc) do { \
	if (spin_is_locked(&(_sc)->sc_rxbuflock)) \
		printk(KERN_DEBUG "%s:%d - about to block on rxbuf lock!\n", __func__, __LINE__); \
} while (0)
#else /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#define	ATH_RXBUF_LOCK_CHECK(_sc)
#endif /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#else
#define ATH_RXBUF_LOCK_ASSERT(_sc)
#define ATH_RXBUF_LOCK_CHECK(_sc)
#endif

#define ATH_BBUF_LOCK_INIT(_sc)	spin_lock_init(&(_sc)->sc_bbuflock)
#define ATH_BBUF_LOCK_DESTROY(_sc)
#define ATH_BBUF_LOCK_IRQ(_sc)		do {	\
	unsigned long __bbuflockflags;		\
	ATH_BBUF_LOCK_CHECK(_sc); 		\
	spin_lock_irqsave(&(_sc)->sc_bbuflock, __bbuflockflags);
#define ATH_BBUF_UNLOCK_IRQ(_sc)		\
	ATH_BBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_bbuflock, __bbuflockflags); \
} while (0)
#define ATH_BBUF_UNLOCK_IRQ_EARLY(_sc)		\
	ATH_BBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_bbuflock, __bbuflockflags);

#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)) && defined(spin_is_locked)
#define ATH_BBUF_LOCK_ASSERT(_sc) \
	KASSERT(spin_is_locked(&(_sc)->sc_bbuflock), ("bbuf not locked!"))
#if (defined(ATH_DEBUG_SPINLOCKS))
#define ATH_BBUF_LOCK_CHECK(_sc) do { \
	if (spin_is_locked(&(_sc)->sc_bbuflock)) \
		printk(KERN_DEBUG "%s:%d - about to block on bbuf lock!\n", __func__, __LINE__); \
} while (0)
#else /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#define ATH_BBUF_LOCK_CHECK(_sc)
#endif /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#else
#define ATH_BBUF_LOCK_ASSERT(_sc)
#define ATH_BBUF_LOCK_CHECK(_sc)
#endif



#define ATH_GBUF_LOCK_INIT(_sc)	spin_lock_init(&(_sc)->sc_grppollbuflock)
#define ATH_GBUF_LOCK_DESTROY(_sc)
#define ATH_GBUF_LOCK_IRQ(_sc)		do {	\
	unsigned long __grppollbuflockflags;		\
	ATH_GBUF_LOCK_CHECK(_sc); 		\
	spin_lock_irqsave(&(_sc)->sc_grppollbuflock, __grppollbuflockflags);
#define ATH_GBUF_UNLOCK_IRQ(_sc)		\
	ATH_GBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_grppollbuflock, __grppollbuflockflags); \
} while (0)
#define ATH_GBUF_UNLOCK_IRQ_EARLY(_sc)		\
	ATH_GBUF_LOCK_ASSERT(_sc); 		\
	spin_unlock_irqrestore(&(_sc)->sc_grppollbuflock, __grppollbuflockflags);

#if (defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK)) && defined(spin_is_locked)
#define ATH_GBUF_LOCK_ASSERT(_sc) \
	KASSERT(spin_is_locked(&(_sc)->sc_grppollbuflock), ("grppollbuf not locked!"))
#if (defined(ATH_DEBUG_SPINLOCKS))
#define ATH_GBUF_LOCK_CHECK(_sc) do { \
	if (spin_is_locked(&(_sc)->sc_grppollbuflock)) \
		printk(KERN_DEBUG "%s:%d - about to block on grppollbuf lock!\n", __func__, __LINE__); \
} while (0)
#else /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#define ATH_GBUF_LOCK_CHECK(_sc)
#endif /* #if (defined(ATH_DEBUG_SPINLOCKS)) */
#else
#define ATH_GBUF_LOCK_ASSERT(_sc)
#define ATH_GBUF_LOCK_CHECK(_sc)
#endif

/* Protects the device from concurrent accesses */
#define	ATH_LOCK_INIT(_sc)		init_MUTEX(&(_sc)->sc_lock)
#define	ATH_LOCK_DESTROY(_sc)
#define	ATH_LOCK(_sc)			down(&(_sc)->sc_lock)
#define	ATH_UNLOCK(_sc)			up(&(_sc)->sc_lock)

int ath_attach(u_int16_t, struct net_device *, HAL_BUS_TAG);
int ath_detach(struct net_device *);
void ath_resume(struct net_device *);
void ath_suspend(struct net_device *);
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,19)
irqreturn_t ath_intr(int, void *);
#else
irqreturn_t ath_intr(int, void *, struct pt_regs *);
#endif
int ath_ioctl_ethtool(struct ath_softc *, int, void __user *);
void bus_read_cachesize(struct ath_softc *, u_int8_t *);
void ath_sysctl_register(void);
void ath_sysctl_unregister(void);

#define DEV_NAME(_d) \
	 ((NULL == _d || NULL == _d->name || 0 == strncmp(_d->name, "wifi%d", 6)) ? \
	  "MadWifi" : \
	  _d->name)
#define VAP_DEV_NAME(_v) \
	 ((NULL == _v) ? \
	  "MadWifi" : \
	  DEV_NAME(_v->iv_dev))
#define SC_DEV_NAME(_sc) \
	 ((NULL == _sc) ? \
	  "MadWifi" : \
	  DEV_NAME(_sc->sc_dev))
#define VAP_IC_DEV_NAME(_v) \
	 ((NULL == _v || NULL == _v->iv_ic) ? \
	  "MadWifi" : \
	  DEV_NAME(_v->iv_ic->ic_dev))

void ath_radar_detected(struct ath_softc *sc, const char *message);

#endif /* _DEV_ATH_ATHVAR_H */