ath_info.c.svn-base

最新之atheros芯片driver source code, 基于linux操作系统,內含atheros芯片HAL全部代码

			return 6;
		}
		anr++;
		i++;
	}

	if (!(wr_ops_len = i)) {
		err("no (addr,val) pairs given");
		return 7;
	}

	if (verbose || !force_write) {
		for (i = 0; i < wr_ops_len; i++)
			printf("%20s (0x%04x) := 0x%04x\n",
			       eeprom_addr2name(wr_ops[i].addr), wr_ops[i].addr,
			       wr_ops[i].val);
	}

	if (!force_write) {
		int c;
		printf
		    ("WARNING: The write function may easy brick your device or\n"
		     "violate state regulation on frequency usage.\n"
		     "Proceed on your own risk!\n"
		     "Shall I write the above value(s)? (y/n)\n");
		c = getchar();
		if (c != 'y' && c != 'Y') {
			printf("user abort\n");
			return 0;
		}
	}

	for (i = 0; i < wr_ops_len; i++) {
		u_int16_t oldval, u;

		if (ath5k_hw_eeprom_read
		    (wr_ops[i].addr, &oldval)) {
			err("failed to read old value from offset 0x%04x ",
			    wr_ops[i].addr);
			errors++;
		}

		if (oldval == wr_ops[i].val) {
			dbg("pair %d: skipped, value already there", i);
			continue;
		}

		dbg("writing *0x%04x := 0x%04x", wr_ops[i].addr, wr_ops[i].val);
		if (ath5k_hw_eeprom_write(wr_ops[i].addr, wr_ops[i].val)) {
			err("failed to write 0x%04x to offset 0x%04x",
			    wr_ops[i].val, wr_ops[i].addr);
			errors++;
		} else {
			if (ath5k_hw_eeprom_read(wr_ops[i].addr, &u)) {
				err("failed to read offset 0x%04x for "
				    "verification", wr_ops[i].addr);
				errors++;
			} else {
				if (u != wr_ops[i].val) {
					err("offset 0x%04x: wrote 0x%04x but "
					    "read 0x%04x", wr_ops[i].addr,
					    wr_ops[i].val, u);
					errors++;
				}
			}
		}
	}

	return errors ? 11 : 0;
}

static void usage(const char *n)
{
	unsigned int i;

	fprintf(stderr, "%s [-w [-g N:M]] [-v] [-f] [-d] [-R addr] [-W addr val] <base_address> "
		"[<name1> <val1> [<name2> <val2> ...]]\n\n", n);
	fprintf(stderr,
		"-w      write values into EEPROM\n"
		"-g N:M  set GPIO N to level M (only used with -w)\n"
		"-v      verbose output\n"
		"-f      force; suppress question before writing\n"
		"-d      dump EEPROM (file 'ath-eeprom-dump.bin' and screen)\n"
		"-R <addr>       read register at <addr> (hex)\n"
		"-W <addr> <val> write <val> (hex) into register at <addr> (hex)\n"
		"<base_address>  device base address (see lspci output)\n\n");

	fprintf(stderr,
		"- read info:\n"
		"  %s <base_address>\n\n"
		"- set regdomain to N:\n"
		"  %s -w <base_address> regdomain N\n\n"
		"- set a PCI id field to value N:\n"
		"  %s -w <base_address> <field> N\n"
		"  where <field> is one of:\n    ", n, n, n);
	for (i = 0; i < ARRAY_SIZE(eeprom_addr); i++)
		fprintf(stderr, " %s", eeprom_addr[i].name);
	fprintf(stderr, "\n\n");
	fprintf(stderr,
		"You may need to set a GPIO to a certain value in order to enable\n"
		"writing to the EEPROM with newer chipsets, e.g. set GPIO 4 to low:\n"
		"  %s -g 4:0 -w <base_address> regdomain N\n", n);
	fprintf(stderr,
		"\nDISCLAIMER: The authors are not responsible for any damages caused by\n"
		"this program. Writing improper values may damage the card or cause\n"
		"unlawful radio transmissions!\n\n");
}

static void dump_capabilities(struct ath5k_eeprom_info *ee)
{
	u_int8_t has_a, has_b, has_g, has_rfkill, turbog_dis, turboa_dis;
	u_int8_t xr2_dis, xr5_dis, has_crystal;

	has_a = AR5K_EEPROM_HDR_11A(ee->ee_header);
	has_b = AR5K_EEPROM_HDR_11B(ee->ee_header);
	has_g = AR5K_EEPROM_HDR_11G(ee->ee_header);
	has_rfkill = AR5K_EEPROM_HDR_RFKILL(ee->ee_header);
	has_crystal = AR5K_EEPROM_HAS32KHZCRYSTAL(ee->ee_misc1);
	turbog_dis = AR5K_EEPROM_HDR_T_2GHZ_DIS(ee->ee_header);
	turboa_dis = AR5K_EEPROM_HDR_T_5GHZ_DIS(ee->ee_header);
	xr2_dis = AR5K_EEPROM_HDR_XR2_DIS(ee->ee_misc0);
	xr5_dis = AR5K_EEPROM_HDR_XR5_DIS(ee->ee_misc0);

	printf("|================= Capabilities ================|\n");

	printf("| 802.11a Support: ");
	if (has_a)
		printf(" yes |");
	else
		printf(" no  |");

	printf(" Turbo-A disabled:");
	if (turboa_dis)
		printf(" yes |\n");
	else
		printf(" no  |\n");

	printf("| 802.11b Support: ");
	if (has_b)
		printf(" yes |");
	else
		printf(" no  |");

	printf(" Turbo-G disabled:");
	if (turbog_dis)
		printf(" yes |\n");
	else
		printf(" no  |\n");

	printf("| 802.11g Support: ");
	if (has_g)
		printf(" yes |");
	else
		printf(" no  |");

	printf(" 2GHz XR disabled:");
	if (xr2_dis)
		printf(" yes |\n");
	else
		printf(" no  |\n");

	printf("| RFKill  Support: ");
	if (has_rfkill)
		printf(" yes |");
	else
		printf(" no  |");

	printf(" 5GHz XR disabled:");
	if (xr5_dis)
		printf(" yes |\n");
	else
		printf(" no  |\n");

	if (has_crystal != 2) {
		printf("| 32kHz   Crystal: ");
		if (has_crystal)
			printf(" yes |");
		else
			printf(" no  |");

		printf("                       |\n");
	}

	printf("\\===============================================/\n");
}

static void dump_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee)
{
	int i;

	printf("|=========================================================|\n");
	printf("| I power:              0x%02x |", ee->ee_i_cal[mode]);
	printf(" Q power:              0x%02x |\n", ee->ee_q_cal[mode]);
	printf("| Use fixed bias:       0x%02x |", ee->ee_fixed_bias[mode]);
	printf(" Max turbo power:      0x%02x |\n", ee->ee_turbo_max_power[mode]);
	printf("| Max XR power:         0x%02x |", ee->ee_xr_power[mode]);
	printf(" Switch Settling Time: 0x%02x |\n", ee->ee_switch_settling[mode]);
	printf("| Tx/Rx attenuation:    0x%02x |", ee->ee_atn_tx_rx[mode]);
	printf(" TX end to XLNA On:    0x%02x |\n", ee->ee_tx_end2xlna_enable[mode]);
	printf("| TX end to XPA Off:    0x%02x |", ee->ee_tx_end2xpa_disable[mode]);
	printf(" TX end to XPA On:     0x%02x |\n", ee->ee_tx_frm2xpa_enable[mode]);
	printf("| 62db Threshold:       0x%02x |", ee->ee_thr_62[mode]);
	printf(" XLNA gain:            0x%02x |\n", ee->ee_xlna_gain[mode]);
	printf("| XPD:                  0x%02x |", ee->ee_xpd[mode]);
	printf(" XPD gain:             0x%02x |\n", ee->ee_x_gain[mode]);
	printf("| I gain:               0x%02x |", ee->ee_i_gain[mode]);
	printf(" Tx/Rx margin:         0x%02x |\n", ee->ee_margin_tx_rx[mode]);
	printf("| False detect backoff: 0x%02x |", ee->ee_false_detect[mode]);
	printf(" Noise Floor Threshold: %3d |\n", ee->ee_noise_floor_thr[mode]);
	printf("| ADC desired size:      %3d |", ee->ee_adc_desired_size[mode]);
	printf(" PGA desired size:      %3d |\n", ee->ee_pga_desired_size[mode]);
	printf("|=========================================================|\n");
	for (i = 0; i < AR5K_EEPROM_N_PCDAC; i++) {
		printf("| Antenna control  %2i:  0x%02x |", i, ee->ee_ant_control[mode][i]);
		i++;
		printf(" Antenna control  %2i:  0x%02x |\n", i, ee->ee_ant_control[mode][i]);
	}
	printf("|=========================================================|\n");
	for (i = 0; i < AR5K_EEPROM_N_OBDB; i++) {
		printf("| Octave Band %i:          %2i |", i, ee->ee_ob[mode][i]);
		printf(" db %i:                   %2i |\n", i, ee->ee_db[mode][i]);
	}
	printf("\\=========================================================/\n");

	if (ee->ee_version >= AR5K_EEPROM_VERSION_5_0 && (mode == AR5K_EEPROM_MODE_11A
	|| mode == AR5K_EEPROM_MODE_11G)) {
	printf("/==================== Turbo mode infos ===================\\\n");
	printf("| Switch Settling time: 0x%02x |", ee->ee_switch_settling_turbo[mode]);
	printf(" Tx/Rx margin:         0x%02x |\n", ee->ee_margin_tx_rx_turbo[mode]);
	printf("| Tx/Rx attenuation:    0x%02x |", ee->ee_atn_tx_rx_turbo[mode]);
	printf(" ADC desired size:      %3d |\n", ee->ee_adc_desired_size_turbo[mode]);
	printf("| PGA desired size:      %3d ", ee->ee_pga_desired_size_turbo[mode]);
	printf("|                            |\n");
	printf("\\=========================================================/\n");
	}
}

static void dump_rf5111_power_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee)
{
	struct	ath5k_chan_pcal_info *gen_chan_info;
	struct ath5k_chan_pcal_info_rf5111 *chan_pcal_info;
	u_int16_t cal_piers;
	int i, c;

	switch (mode) {
	case AR5K_EEPROM_MODE_11A:
		gen_chan_info = ee->ee_pwr_cal_a;
		cal_piers = ee->ee_cal_piers_a;
		break;
	case AR5K_EEPROM_MODE_11B:
		gen_chan_info = ee->ee_pwr_cal_b;
		cal_piers = ee->ee_cal_piers_b;
		break;
	case AR5K_EEPROM_MODE_11G:
		gen_chan_info = ee->ee_pwr_cal_g;
		cal_piers = ee->ee_cal_piers_g;
		break;
	default:
		return;
	}

	printf("/=============================== Per channel power calibration ================================\\\n");
	printf("| Freq | pwr_0 | pwr_1 | pwr_2 | pwr_3 | pwr_4 | pwr_5 | pwr_6 | pwr_7 | pwr_8 | pwr_9 | pwr10 |\n");
	printf("|      | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac |\n");

	for (i = 0; i < cal_piers; i++) {
		char buf[16];
		chan_pcal_info = gen_chan_info[i].rf5111_info;

		printf("|======|=======|=======|=======|=======|=======|=======|=======|=======|=======|=======|=======|\n");
		printf("| %4i |", gen_chan_info[i].freq);
		if (ee->ee_version <= AR5K_EEPROM_VERSION_3_2) {
			for (c = 0; c < AR5K_EEPROM_N_PWR_POINTS_5111; c++) {
				printf(" %2i.%02i |", chan_pcal_info->pwr[c] / 2,
				       chan_pcal_info->pwr[c] % 2 * 50);
			}

			printf("\n|      |");
		} else {
			for (c = 0; c < AR5K_EEPROM_N_PWR_POINTS_5111; c++) {
				printf(" %2i.%02i |", chan_pcal_info->pwr[c] / 4,
				       chan_pcal_info->pwr[c] % 4 * 25);
			}

			printf("\n|      |");
		}

		for (c = 0; c < AR5K_EEPROM_N_PWR_POINTS_5111; c++) {
			snprintf(buf, sizeof(buf), "[%i]",
				 chan_pcal_info->pcdac[c]);
			printf("%6s |", buf);
		}

		printf("\n");

	}
	printf("\\==============================================================================================/\n");
}

static void dump_rf5112_power_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee)
{
	struct	ath5k_chan_pcal_info *gen_chan_info;
	struct ath5k_chan_pcal_info_rf5112 *chan_pcal_info;
	u_int16_t cal_piers;
	int i, c;

	switch (mode) {
	case AR5K_EEPROM_MODE_11A:
		gen_chan_info = ee->ee_pwr_cal_a;
		cal_piers = ee->ee_cal_piers_a;
		break;
	case AR5K_EEPROM_MODE_11B:
		gen_chan_info = ee->ee_pwr_cal_b;
		cal_piers = ee->ee_cal_piers_b;
		break;
	case AR5K_EEPROM_MODE_11G:
		gen_chan_info = ee->ee_pwr_cal_g;
		cal_piers = ee->ee_cal_piers_g;
		break;
	default:
		return;
	}

	printf("/=================== Per channel power calibration ====================\\\n");
	printf("| Freq | pwr_0 | pwr_1 | pwr_2 | pwr_3 |pwrx3_0|pwrx3_1|pwrx3_2|max_pwr|\n");
	printf("|      | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac |       |\n");

	for (i = 0; i < cal_piers; i++) {
		char buf[16];

		chan_pcal_info = gen_chan_info[i].rf5112_info;

		printf("|======|=======|=======|=======|=======|=======|=======|=======|=======|\n");
		printf("| %4i |", gen_chan_info[i].freq);
		for (c = 0; c < AR5K_EEPROM_N_XPD0_POINTS; c++) {
			printf(" %2i.%02i |", chan_pcal_info->pwr_x0[c] / 4,
			       chan_pcal_info->pwr_x0[c] % 4 * 25);
		}
		for (c = 0; c < AR5K_EEPROM_N_XPD3_POINTS; c++) {
			printf(" %2i.%02i |", chan_pcal_info->pwr_x3[c] / 4,
			       chan_pcal_info->pwr_x3[c] % 4 * 25);
		}
		printf(" %2i.%02i |\n", gen_chan_info[i].max_pwr / 4,
		       gen_chan_info[i].max_pwr % 4 * 25);

		printf("|      |");
		for (c = 0; c < AR5K_EEPROM_N_XPD0_POINTS; c++) {
			snprintf(buf, sizeof(buf), "[%i]",
				 chan_pcal_info->pcdac_x0[c]);
			printf("%6s |", buf);
		}
		for (c = 0; c < AR5K_EEPROM_N_XPD3_POINTS; c++) {
			snprintf(buf, sizeof(buf), "[%i]",
				 chan_pcal_info->pcdac_x3[c]);
			printf("%6s |", buf);
		}
		printf("       |\n");

	}
	printf("\\======================================================================/\n");
}

static void dump_rf2413_power_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee)
{
	struct	ath5k_chan_pcal_info *gen_chan_info;
	struct ath5k_chan_pcal_info_rf2413 *chan_pcal_info;
	u_int16_t cal_piers;
	int i, c;

	switch (mode) {
	case AR5K_EEPROM_MODE_11A:
		gen_chan_info = ee->ee_pwr_cal_a;
		cal_piers = ee->ee_cal_piers_a;
		break;
	case AR5K_EEPROM_MODE_11B:
		gen_chan_info = ee->ee_pwr_cal_b;
		cal_piers = ee->ee_cal_piers_b;
		break;
	case AR5K_EEPROM_MODE_11G:
		gen_chan_info = ee->ee_pwr_cal_g;
		cal_piers = ee->ee_cal_piers_g;
		break;
	default:
		return;
	}

	printf("/====================== Per channel power calibration ===================\\\n");
	printf("| Freq |  pwr_i  |    pwr_0    |    pwr_1    |    pwr_2    |    pwr_3    |\n");
	printf("|      | pddac_i |   pddac_0   |   pddac_1   |   pddac_2   |   pddac_3   |\n");

	for (i = 0; i < cal_piers; i++) {

		chan_pcal_info = gen_chan_info[i].rf2413_info;

		printf("|======|=========|=============|=============|=============|=============|\n");
		printf("| %4i |         |             |             |             |             |\n", gen_chan_info[i].freq);
		printf("|------|---------|-------------|-------------|-------------|-------------|\n");
		for (c = 0; c < chan_pcal_info->pd_gains; c++){
			printf("|      |    %2i   |    %2i.%02i    |    %2i.%02i    |    %2i.%02i    |    %2i.%02i    |\n",
							chan_pcal_info->pwr_i[c],
							chan_pcal_info->pwr[c][0] / 2,
							chan_pcal_info->pwr[c][0] % 2 * 50,
							chan_pcal_info->pwr[c][1] / 2,
							chan_pcal_info->pwr[c][1] % 2 * 50,
							chan_pcal_info->pwr[c][2] / 2,
							chan_pcal_info->pwr[c][2] % 2 * 50,
							chan_pcal_info->pwr[c][3] / 2,
							chan_pcal_info->pwr[c][3] % 2 * 50);

			printf("|      |   %3i   |      %3i    |      %3i    |      %3i    |      %3i    |\n",
							chan_pcal_info->pddac_i[c],
							chan_pcal_info->pddac[c][0],
							chan_pcal_info->pddac[c][1],
							chan_pcal_info->pddac[c][2],
							chan_pcal_info->pddac[c][3]);
			if ( c < chan_pcal_info->pd_gains - 1)		
			printf("|------|---------|-------------|-------------|-------------|-------------|\n");
		}
	}
	printf("\\========================================================================/\n");
}

static void dump_rate_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee)
{
	int i;
	struct ath5k_rate_pcal_info *rate_pcal_info;
	u_int16_t rate_target_pwr_num;

	switch (mode) {
	case AR5K_EEPROM_MODE_11A:
		rate_pcal_info = ee->ee_rate_tpwr_a;
		rate_target_pwr_num = ee->ee_rate_target_pwr_num_a;
		break;
	case AR5K_EEPROM_MODE_11B:
		rate_pcal_info = ee->ee_rate_tpwr_b;
		rate_target_pwr_num = ee->ee_rate_target_pwr_num_b;
		break;
	case AR5K_EEPROM_MODE_11G:
		rate_pcal_info = ee->ee_rate_tpwr_g;
		rate_target_pwr_num = ee->ee_rate_target_pwr_num_g;
		break;
	default:
		return;
	}

	printf("/============== Per rate power calibration ===========\\\n");
	if (mode == AR5K_EEPROM_MODE_11B)
		printf("| Freq |   1Mbit/s  | 2Mbit/s  | 5.5Mbit/s | 11Mbit/s |\n");
	else
		printf("| Freq | 6-24Mbit/s | 36Mbit/s |  48Mbit/s | 54Mbit/s |\n");

	for (i = 0; i < rate_target_pwr_num; i++) {

		printf("|======|============|==========|===========|==========|\n");
		printf("| %4i |", rate_pcal_info[i].freq);
		printf("    %2i.%02i   |",rate_pcal_info[i].target_power_6to24 /2,
					rate_pcal_info[i].target_power_6to24 % 2);
		printf("  %2i.%02i   |",rate_pcal_info[i].target_power_36 /2,