ps2.hier_info

verilog_hdl语言的PS2控制程序代码

|PS2
ledcom[0] <= segmain:inst9.ledcom[0]
ledcom[1] <= segmain:inst9.ledcom[1]
ledcom[2] <= segmain:inst9.ledcom[2]
ledcom[3] <= segmain:inst9.ledcom[3]
clk => lpm_counter0:inst5.clock
data => data_scanC:inst.k_data
kbclk => data_scanC:inst.k_clock
reset => data_scanC:inst.reset
reset => convert:inst1.clr
seg7[0] <= bin27seg:inst3.data_out[0]
seg7[1] <= bin27seg:inst3.data_out[1]
seg7[2] <= bin27seg:inst3.data_out[2]
seg7[3] <= bin27seg:inst3.data_out[3]
seg7[4] <= bin27seg:inst3.data_out[4]
seg7[5] <= bin27seg:inst3.data_out[5]
seg7[6] <= bin27seg:inst3.data_out[6]


|PS2|segmain:inst9
clk => comclk[0].CLK
clk => comclk[1].CLK
rst => comclk[0].ACLR
rst => comclk[1].ACLR
datain[0] => bcd_led~11.DATAB
datain[1] => bcd_led~10.DATAB
datain[2] => bcd_led~9.DATAB
datain[3] => bcd_led~8.DATAB
datain[4] => bcd_led~7.DATAB
datain[5] => bcd_led~6.DATAB
datain[6] => bcd_led~5.DATAB
datain[7] => bcd_led~4.DATAB
datain[8] => bcd_led~3.DATAB
datain[9] => bcd_led~2.DATAB
datain[10] => bcd_led~1.DATAB
datain[11] => bcd_led~0.DATAB
datain[12] => bcd_led~3.DATAA
datain[13] => bcd_led~2.DATAA
datain[14] => bcd_led~1.DATAA
datain[15] => bcd_led~0.DATAA
dataout[0] <= bcd_led~11.DB_MAX_OUTPUT_PORT_TYPE
dataout[1] <= bcd_led~10.DB_MAX_OUTPUT_PORT_TYPE
dataout[2] <= bcd_led~9.DB_MAX_OUTPUT_PORT_TYPE
dataout[3] <= bcd_led~8.DB_MAX_OUTPUT_PORT_TYPE
ledcom[0] <= Equal~0.DB_MAX_OUTPUT_PORT_TYPE
ledcom[1] <= ledcom~4.DB_MAX_OUTPUT_PORT_TYPE
ledcom[2] <= ledcom~3.DB_MAX_OUTPUT_PORT_TYPE
ledcom[3] <= ledcom~2.DB_MAX_OUTPUT_PORT_TYPE


|PS2|lpm_counter0:inst5
clock => lpm_counter:lpm_counter_component.clock
q[0] <= lpm_counter:lpm_counter_component.q[0]
q[1] <= lpm_counter:lpm_counter_component.q[1]
q[2] <= lpm_counter:lpm_counter_component.q[2]
q[3] <= lpm_counter:lpm_counter_component.q[3]
q[4] <= lpm_counter:lpm_counter_component.q[4]
q[5] <= lpm_counter:lpm_counter_component.q[5]
q[6] <= lpm_counter:lpm_counter_component.q[6]
q[7] <= lpm_counter:lpm_counter_component.q[7]


|PS2|lpm_counter0:inst5|lpm_counter:lpm_counter_component
clock => cntr_69d:auto_generated.clock
clk_en => ~NO_FANOUT~
cnt_en => ~NO_FANOUT~
updown => ~NO_FANOUT~
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aconst => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sconst => ~NO_FANOUT~
sload => ~NO_FANOUT~
data[0] => ~NO_FANOUT~
data[1] => ~NO_FANOUT~
data[2] => ~NO_FANOUT~
data[3] => ~NO_FANOUT~
data[4] => ~NO_FANOUT~
data[5] => ~NO_FANOUT~
data[6] => ~NO_FANOUT~
data[7] => ~NO_FANOUT~
cin => ~NO_FANOUT~
q[0] <= cntr_69d:auto_generated.q[0]
q[1] <= cntr_69d:auto_generated.q[1]
q[2] <= cntr_69d:auto_generated.q[2]
q[3] <= cntr_69d:auto_generated.q[3]
q[4] <= cntr_69d:auto_generated.q[4]
q[5] <= cntr_69d:auto_generated.q[5]
q[6] <= cntr_69d:auto_generated.q[6]
q[7] <= cntr_69d:auto_generated.q[7]
cout <= <GND>
eq[0] <= <GND>
eq[1] <= <GND>
eq[2] <= <GND>
eq[3] <= <GND>
eq[4] <= <GND>
eq[5] <= <GND>
eq[6] <= <GND>
eq[7] <= <GND>
eq[8] <= <GND>
eq[9] <= <GND>
eq[10] <= <GND>
eq[11] <= <GND>
eq[12] <= <GND>
eq[13] <= <GND>
eq[14] <= <GND>
eq[15] <= <GND>


|PS2|lpm_counter0:inst5|lpm_counter:lpm_counter_component|cntr_69d:auto_generated
clock => counter_cella0.CLK
clock => counter_cella1.CLK
clock => counter_cella2.CLK
clock => counter_cella3.CLK
clock => counter_cella4.CLK
clock => counter_cella5.CLK
clock => counter_cella6.CLK
clock => counter_cella7.CLK
q[0] <= counter_cella0.REGOUT
q[1] <= counter_cella1.REGOUT
q[2] <= counter_cella2.REGOUT
q[3] <= counter_cella3.REGOUT
q[4] <= counter_cella4.REGOUT
q[5] <= counter_cella5.REGOUT
q[6] <= counter_cella6.REGOUT
q[7] <= counter_cella7.REGOUT


|PS2|data_scanC:inst
sys_clk => counter[3].CLK
sys_clk => counter[2].CLK
sys_clk => counter[1].CLK
sys_clk => counter[0].CLK
sys_clk => pre_kbclk.CLK
sys_clk => now_kbclk.CLK
sys_clk => tmp[8].CLK
sys_clk => tmp[7].CLK
sys_clk => tmp[6].CLK
sys_clk => tmp[5].CLK
sys_clk => tmp[4].CLK
sys_clk => tmp[3].CLK
sys_clk => tmp[2].CLK
sys_clk => tmp[1].CLK
sys_clk => started.CLK
sys_clk => ZHJS~reg0.CLK
k_data => tmp[8].DATAIN
k_data => tmp[7].DATAIN
k_data => tmp[6].DATAIN
k_data => tmp[5].DATAIN
k_data => tmp[4].DATAIN
k_data => tmp[3].DATAIN
k_data => tmp[2].DATAIN
k_data => tmp[1].DATAIN
k_clock => now_kbclk.DATAIN
reset => counter[3].ACLR
reset => counter[2].ACLR
reset => counter[1].ACLR
reset => counter[0].ACLR
reset => ZHJS~reg0.ACLR
reset => pre_kbclk.ENA
reset => now_kbclk.ENA
reset => started.ENA
data[0] <= data[0]~7.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= data[1]~6.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= data[2]~5.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= data[3]~4.DB_MAX_OUTPUT_PORT_TYPE
data[4] <= data[4]~3.DB_MAX_OUTPUT_PORT_TYPE
data[5] <= data[5]~2.DB_MAX_OUTPUT_PORT_TYPE
data[6] <= data[6]~1.DB_MAX_OUTPUT_PORT_TYPE
data[7] <= data[7]~0.DB_MAX_OUTPUT_PORT_TYPE
PA[0] <= PA~7
PA[1] <= PA~6
PA[2] <= PA~5
PA[3] <= PA~4
PA[4] <= PA~3
PA[5] <= PA~2
PA[6] <= PA~1
PA[7] <= PA~0
ZHJS <= ZHJS~reg0


|PS2|convert:inst1
scan[0] => Equal~0.IN15
scan[0] => Equal~1.IN15
scan[0] => Equal~2.IN15
scan[0] => Equal~3.IN15
scan[0] => Decoder~0.IN7
scan[1] => Equal~0.IN14
scan[1] => Equal~1.IN14
scan[1] => Equal~2.IN14
scan[1] => Equal~3.IN14
scan[1] => Decoder~0.IN6
scan[2] => Equal~0.IN13
scan[2] => Equal~1.IN13
scan[2] => Equal~2.IN13
scan[2] => Equal~3.IN13
scan[2] => Decoder~0.IN5
scan[3] => Equal~0.IN12
scan[3] => Equal~1.IN12
scan[3] => Equal~2.IN12
scan[3] => Equal~3.IN12
scan[3] => Decoder~0.IN4
scan[4] => Equal~0.IN11
scan[4] => Equal~1.IN11
scan[4] => Equal~2.IN11
scan[4] => Equal~3.IN11
scan[4] => Decoder~0.IN3
scan[5] => Equal~0.IN10
scan[5] => Equal~1.IN10
scan[5] => Equal~2.IN10
scan[5] => Equal~3.IN10
scan[5] => Decoder~0.IN2
scan[6] => Equal~0.IN9
scan[6] => Equal~1.IN9
scan[6] => Equal~2.IN9
scan[6] => Equal~3.IN9
scan[6] => Decoder~0.IN1
scan[7] => Equal~0.IN8
scan[7] => Equal~1.IN8
scan[7] => Equal~2.IN8
scan[7] => Equal~3.IN8
scan[7] => Decoder~0.IN0
prepared => prepared~0.IN3
clr => shifted_D~2.OUTPUTSELECT
clr => capslocked_D~2.OUTPUTSELECT
clr => keypressed_D~0.OUTPUTSELECT
clr => ASCII~11.OUTPUTSELECT
clr => ASCII~12.OUTPUTSELECT
clr => ASCII~13.OUTPUTSELECT
clr => ASCII~14.OUTPUTSELECT
clr => ASCII~15.OUTPUTSELECT
clr => ASCII~16.OUTPUTSELECT
clr => ASCII~17.OUTPUTSELECT
clr => ASCII~18.OUTPUTSELECT
clr => tmpASCII[5].ACLR
clr => tmpASCII[4].ACLR
clr => tmpASCII[3].ACLR
clr => tmpASCII[2].ACLR
clr => tmpASCII[1].ACLR
clr => tmpASCII[0].ACLR
clr => tmpASCII[6].ACLR
data[0] <= ASCII~18.DB_MAX_OUTPUT_PORT_TYPE
data[1] <= ASCII~17.DB_MAX_OUTPUT_PORT_TYPE
data[2] <= ASCII~16.DB_MAX_OUTPUT_PORT_TYPE
data[3] <= ASCII~15.DB_MAX_OUTPUT_PORT_TYPE
data[4] <= ASCII~14.DB_MAX_OUTPUT_PORT_TYPE
data[5] <= ASCII~13.DB_MAX_OUTPUT_PORT_TYPE
data[6] <= ASCII~12.DB_MAX_OUTPUT_PORT_TYPE
data[7] <= ASCII~11.DB_MAX_OUTPUT_PORT_TYPE


|PS2|convert:inst1|mydff:dff_component1
clock => clock~0.IN1
data => sub_wire3.IN1
q <= lpm_ff:lpm_ff_component.q


|PS2|convert:inst1|mydff:dff_component1|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|PS2|convert:inst1|mydff:dff_component2
clock => clock~0.IN1
data => sub_wire3.IN1
q <= lpm_ff:lpm_ff_component.q


|PS2|convert:inst1|mydff:dff_component2|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|PS2|convert:inst1|mydff:dff_component3
clock => clock~0.IN1
data => sub_wire3.IN1
q <= lpm_ff:lpm_ff_component.q


|PS2|convert:inst1|mydff:dff_component3|lpm_ff:lpm_ff_component
data[0] => dffs[0].DATAIN
clock => dffs[0].CLK
enable => dffs[0].ENA
aclr => ~NO_FANOUT~
aset => ~NO_FANOUT~
aload => ~NO_FANOUT~
sclr => ~NO_FANOUT~
sset => ~NO_FANOUT~
sload => ~NO_FANOUT~
q[0] <= dffs[0].DB_MAX_OUTPUT_PORT_TYPE


|PS2|bin27seg:inst3
data_in[0] => Decoder~0.IN3
data_in[1] => Decoder~0.IN2
data_in[2] => Decoder~0.IN1
data_in[3] => Decoder~0.IN0
data_out[0] <= reduce_or~6.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= reduce_or~5.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= reduce_or~4.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= reduce_or~3.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= reduce_or~2.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= reduce_or~1.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= reduce_or~0.DB_MAX_OUTPUT_PORT_TYPE