📄 stm32f10x_gpio.lst
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##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 KICKSTART 26/Dec/2008 18:22:06 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = thumb #
# Endian = little #
# Stack alignment = 4 #
# Source file = F:\PROJECT\STM32_UCOSII\CPU\ST\STM32\src\stm32f10x_g #
# pio.c #
# Command line = F:\PROJECT\STM32_UCOSII\CPU\ST\STM32\src\stm32f10x_g #
# pio.c -lCN F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM #
# 3210E-EVAL\IAR\OS-Probe\Flash\List\ -o #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\Flash\Obj\ -z6 --no_unroll --no_inline #
# --no_tbaa --no_scheduling --debug --cpu_mode thumb #
# --endian little --cpu cortex-M3 --stack_align 4 -e #
# --fpu None --dlib_config "E:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 #
# Kickstart\arm\LIB\dl7mptnnl8n.h" -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\ -I F:\PROJECT\STM32_UCOSII\EvalBoards\ #
# ST\STM3210E-EVAL\IAR\OS-Probe\..\BSP\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\CPU\ST\STM32\inc\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uC-CPU\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uC-CPU\ARM-Cortex-M3\IAR #
# \ -I F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E- #
# EVAL\IAR\OS-Probe\..\..\..\..\..\uC-LCD\Source\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uC-LIB\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uCOS-II\Ports\ARM-Cortex #
# -M3\Generic\IAR\ -I F:\PROJECT\STM32_UCOSII\EvalBoar #
# ds\ST\STM3210E-EVAL\IAR\OS-Probe\..\..\..\..\..\uCOS #
# -II\Source\ -I F:\PROJECT\STM32_UCOSII\EvalBoards\ST #
# \STM3210E-EVAL\IAR\OS-Probe\..\..\..\..\..\uC-Probe\ #
# Target\Communication\Generic\RS-232\Source\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Communic #
# ation\Generic\RS-232\Ports\ST\STM32\ -I #
# F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\..\..\..\..\..\uC-Probe\Target\Communic #
# ation\Generic\Source\ -I F:\PROJECT\STM32_UCOSII\Eva #
# lBoards\ST\STM3210E-EVAL\IAR\OS-Probe\..\..\..\..\.. #
# \uC-Probe\Target\Plugins\uCOS-II\ -I "E:\Program #
# Files\IAR Systems\Embedded Workbench 4.0 #
# Kickstart\arm\INC\" #
# List file = F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\Flash\List\stm32f10x_gpio.lst #
# Object file = F:\PROJECT\STM32_UCOSII\EvalBoards\ST\STM3210E-EVAL\ #
# IAR\OS-Probe\Flash\Obj\stm32f10x_gpio.r79 #
# #
# #
##############################################################################
F:\PROJECT\STM32_UCOSII\CPU\ST\STM32\src\stm32f10x_gpio.c
1 /******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
2 * File Name : stm32f10x_gpio.c
3 * Author : MCD Application Team
4 * Version : V2.0
5 * Date : 05/23/2008
6 * Description : This file provides all the GPIO firmware functions.
7 ********************************************************************************
8 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
9 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
10 * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
11 * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
12 * CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
13 * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
14 * FOR MORE INFORMATION PLEASE CAREFULLY READ THE LICENSE AGREEMENT FILE LOCATED
15 * IN THE ROOT DIRECTORY OF THIS FIRMWARE PACKAGE.
16 *******************************************************************************/
17
18 /* Includes ------------------------------------------------------------------*/
19 #include "stm32f10x_gpio.h"
20 #include "stm32f10x_rcc.h"
21
22 /* Private typedef -----------------------------------------------------------*/
23 /* Private define ------------------------------------------------------------*/
24 /* ------------ RCC registers bit address in the alias region ----------- */
25 #define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)
26
27 /* --- EVENTCR Register ---*/
28 /* Alias word address of EVOE bit */
29 #define EVCR_OFFSET (AFIO_OFFSET + 0x00)
30 #define EVOE_BitNumber ((u8)0x07)
31 #define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))
32
33 #define EVCR_PORTPINCONFIG_MASK ((u16)0xFF80)
34 #define LSB_MASK ((u16)0xFFFF)
35 #define DBGAFR_POSITION_MASK ((u32)0x000F0000)
36 #define DBGAFR_SWJCFG_MASK ((u32)0xF0FFFFFF)
37 #define DBGAFR_LOCATION_MASK ((u32)0x00200000)
38 #define DBGAFR_NUMBITS_MASK ((u32)0x00100000)
39
40 /* Private macro -------------------------------------------------------------*/
41 /* Private variables ---------------------------------------------------------*/
42 /* Private function prototypes -----------------------------------------------*/
43 /* Private functions ---------------------------------------------------------*/
44
45 /*******************************************************************************
46 * Function Name : GPIO_DeInit
47 * Description : Deinitializes the GPIOx peripheral registers to their default
48 * reset values.
49 * Input : - GPIOx: where x can be (A..G) to select the GPIO peripheral.
50 * Output : None
51 * Return : None
52 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
53 void GPIO_DeInit(GPIO_TypeDef* GPIOx)
54 {
\ GPIO_DeInit:
\ 00000000 00B5 PUSH {LR}
55 /* Check the parameters */
56 assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
57
58 switch (*(u32*)&GPIOx)
\ 00000002 2B49 LDR.N R1,??GPIO_DeInit_0 ;; 0x40010800
\ 00000004 8842 CMP R0,R1
\ 00000006 12D0 BEQ.N ??GPIO_DeInit_1
\ 00000008 2A49 LDR.N R1,??GPIO_DeInit_0+0x4 ;; 0x40010c00
\ 0000000A 8842 CMP R0,R1
\ 0000000C 18D0 BEQ.N ??GPIO_DeInit_2
\ 0000000E 2A49 LDR.N R1,??GPIO_DeInit_0+0x8 ;; 0x40011000
\ 00000010 8842 CMP R0,R1
\ 00000012 1ED0 BEQ.N ??GPIO_DeInit_3
\ 00000014 2949 LDR.N R1,??GPIO_DeInit_0+0xC ;; 0x40011400
\ 00000016 8842 CMP R0,R1
\ 00000018 24D0 BEQ.N ??GPIO_DeInit_4
\ 0000001A 2949 LDR.N R1,??GPIO_DeInit_0+0x10 ;; 0x40011800
\ 0000001C 8842 CMP R0,R1
\ 0000001E 2AD0 BEQ.N ??GPIO_DeInit_5
\ 00000020 2849 LDR.N R1,??GPIO_DeInit_0+0x14 ;; 0x40011c00
\ 00000022 8842 CMP R0,R1
\ 00000024 30D0 BEQ.N ??GPIO_DeInit_6
\ 00000026 2849 LDR.N R1,??GPIO_DeInit_0+0x18 ;; 0x40012000
\ 00000028 8842 CMP R0,R1
\ 0000002A 36D0 BEQ.N ??GPIO_DeInit_7
\ 0000002C 00BD POP {PC}
59 {
60 case GPIOA_BASE:
61 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
\ ??GPIO_DeInit_1:
\ 0000002E 0121 MOVS R1,#+1
\ 00000030 0420 MOVS R0,#+4
\ 00000032 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
62 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
\ 00000036 0021 MOVS R1,#+0
\ 00000038 0420 MOVS R0,#+4
\ 0000003A ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 0000003E 00BD POP {PC}
63 break;
64
65 case GPIOB_BASE:
66 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
\ ??GPIO_DeInit_2:
\ 00000040 0121 MOVS R1,#+1
\ 00000042 0820 MOVS R0,#+8
\ 00000044 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
67 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
\ 00000048 0021 MOVS R1,#+0
\ 0000004A 0820 MOVS R0,#+8
\ 0000004C ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 00000050 00BD POP {PC}
68 break;
69
70 case GPIOC_BASE:
71 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
\ ??GPIO_DeInit_3:
\ 00000052 0121 MOVS R1,#+1
\ 00000054 1020 MOVS R0,#+16
\ 00000056 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
72 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
\ 0000005A 0021 MOVS R1,#+0
\ 0000005C 1020 MOVS R0,#+16
\ 0000005E ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 00000062 00BD POP {PC}
73 break;
74
75 case GPIOD_BASE:
76 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
\ ??GPIO_DeInit_4:
\ 00000064 0121 MOVS R1,#+1
\ 00000066 2020 MOVS R0,#+32
\ 00000068 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
77 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
\ 0000006C 0021 MOVS R1,#+0
\ 0000006E 2020 MOVS R0,#+32
\ 00000070 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 00000074 00BD POP {PC}
78 break;
79
80 case GPIOE_BASE:
81 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
\ ??GPIO_DeInit_5:
\ 00000076 0121 MOVS R1,#+1
\ 00000078 4020 MOVS R0,#+64
\ 0000007A ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
82 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
\ 0000007E 0021 MOVS R1,#+0
\ 00000080 4020 MOVS R0,#+64
\ 00000082 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 00000086 00BD POP {PC}
83 break;
84
85 case GPIOF_BASE:
86 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
\ ??GPIO_DeInit_6:
\ 00000088 0121 MOVS R1,#+1
\ 0000008A 8020 MOVS R0,#+128
\ 0000008C ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
87 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
\ 00000090 0021 MOVS R1,#+0
\ 00000092 8020 MOVS R0,#+128
\ 00000094 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 00000098 00BD POP {PC}
88 break;
89
90 case GPIOG_BASE:
91 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
\ ??GPIO_DeInit_7:
\ 0000009A 0121 MOVS R1,#+1
\ 0000009C 0802 LSLS R0,R1,#+8
\ 0000009E ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
92 RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
\ 000000A2 0021 MOVS R1,#+0
\ 000000A4 5FF48070 MOVS R0,#+256
\ 000000A8 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
93 break;
94
95 default:
96 break;
97 }
98 }
\ 000000AC 00BD POP {PC} ;; return
\ 000000AE 00BF Nop
\ ??GPIO_DeInit_0:
\ 000000B0 00080140 DC32 0x40010800
\ 000000B4 000C0140 DC32 0x40010c00
\ 000000B8 00100140 DC32 0x40011000
\ 000000BC 00140140 DC32 0x40011400
\ 000000C0 00180140 DC32 0x40011800
\ 000000C4 001C0140 DC32 0x40011c00
\ 000000C8 00200140 DC32 0x40012000
99
100 /*******************************************************************************
101 * Function Name : GPIO_AFIODeInit
102 * Description : Deinitializes the Alternate Functions (remap, event control
103 * and EXTI configuration) registers to their default reset
104 * values.
105 * Input : None
106 * Output : None
107 * Return : None
108 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
109 void GPIO_AFIODeInit(void)
110 {
\ GPIO_AFIODeInit:
\ 00000000 00B5 PUSH {LR}
111 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
\ 00000002 0121 MOVS R1,#+1
\ 00000004 0846 MOV R0,R1
\ 00000006 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
112 RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
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