📄 stm32f10x_usart.lst
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\ ??USART_DeInit_3:
\ 0000005C 0121 MOVS R1,#+1
\ 0000005E C804 LSLS R0,R1,#+19
\ 00000060 ........ _BLF RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
116 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART4, DISABLE);
\ 00000064 0021 MOVS R1,#+0
\ 00000066 5FF40020 MOVS R0,#+524288
\ 0000006A ........ _BLF RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
\ 0000006E 00BD POP {PC}
117 break;
118
119 case UART5_BASE:
120 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, ENABLE);
\ ??USART_DeInit_4:
\ 00000070 0121 MOVS R1,#+1
\ 00000072 0805 LSLS R0,R1,#+20
\ 00000074 ........ _BLF RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
121 RCC_APB1PeriphResetCmd(RCC_APB1Periph_UART5, DISABLE);
\ 00000078 0021 MOVS R1,#+0
\ 0000007A 5FF48010 MOVS R0,#+1048576
\ 0000007E ........ _BLF RCC_APB1PeriphResetCmd,??RCC_APB1PeriphResetCmd??rT
122 break;
123
124 default:
125 break;
126 }
127 }
\ ??USART_DeInit_5:
\ 00000082 00BD POP {PC} ;; return
\ ??USART_DeInit_0:
\ 00000084 00440040 DC32 0x40004400
\ 00000088 00480040 DC32 0x40004800
\ 0000008C 004C0040 DC32 0x40004c00
\ 00000090 00500040 DC32 0x40005000
128
129 /*******************************************************************************
130 * Function Name : USART_Init
131 * Description : Initializes the USARTx peripheral according to the specified
132 * parameters in the USART_InitStruct .
133 * Input : - USARTx: Select the USART or the UART peripheral.
134 * This parameter can be one of the following values:
135 * - USART1, USART2, USART3, UART4 or UART5.
136 * - USART_InitStruct: pointer to a USART_InitTypeDef structure
137 * that contains the configuration information for the
138 * specified USART peripheral.
139 * Output : None
140 * Return : None
141 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
142 void USART_Init(USART_TypeDef* USARTx, USART_InitTypeDef* USART_InitStruct)
143 {
\ USART_Init:
\ 00000000 30B5 PUSH {R4,R5,LR}
\ 00000002 85B0 SUB SP,SP,#+20
\ 00000004 0400 MOVS R4,R0
\ 00000006 0D00 MOVS R5,R1
144 u32 tmpreg = 0x00, apbclock = 0x00;
145 u32 integerdivider = 0x00;
146 u32 fractionaldivider = 0x00;
147 u32 usartxbase = 0;
148 RCC_ClocksTypeDef RCC_ClocksStatus;
149
150 /* Check the parameters */
151 assert_param(IS_USART_ALL_PERIPH(USARTx));
152 assert_param(IS_USART_BAUDRATE(USART_InitStruct->USART_BaudRate));
153 assert_param(IS_USART_WORD_LENGTH(USART_InitStruct->USART_WordLength));
154 assert_param(IS_USART_STOPBITS(USART_InitStruct->USART_StopBits));
155 assert_param(IS_USART_PARITY(USART_InitStruct->USART_Parity));
156 assert_param(IS_USART_MODE(USART_InitStruct->USART_Mode));
157 assert_param(IS_USART_HARDWARE_FLOW_CONTROL(USART_InitStruct->USART_HardwareFlowControl));
158 /* The hardware flow control is available only for USART1, USART2 and USART3 */
159 assert_param(IS_USART_PERIPH_HFC(USARTx, USART_InitStruct->USART_HardwareFlowControl));
160
161 usartxbase = (*(u32*)&USARTx);
162
163 /*---------------------------- USART CR2 Configuration -----------------------*/
164 tmpreg = USARTx->CR2;
\ 00000008 208A LDRH R0,[R4, #+16]
165 /* Clear STOP[13:12] bits */
166 tmpreg &= CR2_STOP_CLEAR_Mask;
167
168 /* Configure the USART Stop Bits, Clock, CPOL, CPHA and LastBit ------------*/
169 /* Set STOP[13:12] bits according to USART_StopBits value */
170 tmpreg |= (u32)USART_InitStruct->USART_StopBits;
171
172 /* Write to USART CR2 */
173 USARTx->CR2 = (u16)tmpreg;
\ 0000000A 1C49 LDR.N R1,??USART_Init_0 ;; 0xcfff
\ 0000000C 0140 ANDS R1,R1,R0
\ 0000000E E888 LDRH R0,[R5, #+6]
\ 00000010 0843 ORRS R0,R0,R1
\ 00000012 2082 STRH R0,[R4, #+16]
174
175 /*---------------------------- USART CR1 Configuration -----------------------*/
176 tmpreg = USARTx->CR1;
\ 00000014 A089 LDRH R0,[R4, #+12]
177 /* Clear M, PCE, PS, TE and RE bits */
178 tmpreg &= CR1_CLEAR_Mask;
179
180 /* Configure the USART Word Length, Parity and mode ----------------------- */
181 /* Set the M bits according to USART_WordLength value */
182 /* Set PCE and PS bits according to USART_Parity value */
183 /* Set TE and RE bits according to USART_Mode value */
184 tmpreg |= (u32)USART_InitStruct->USART_WordLength | USART_InitStruct->USART_Parity |
185 USART_InitStruct->USART_Mode;
186
187 /* Write to USART CR1 */
188 USARTx->CR1 = (u16)tmpreg;
\ 00000016 1A49 LDR.N R1,??USART_Init_0+0x4 ;; 0xe9f3
\ 00000018 0140 ANDS R1,R1,R0
\ 0000001A A888 LDRH R0,[R5, #+4]
\ 0000001C 0843 ORRS R0,R0,R1
\ 0000001E 2989 LDRH R1,[R5, #+8]
\ 00000020 0143 ORRS R1,R1,R0
\ 00000022 6889 LDRH R0,[R5, #+10]
\ 00000024 0843 ORRS R0,R0,R1
\ 00000026 A081 STRH R0,[R4, #+12]
189
190 /*---------------------------- USART CR3 Configuration -----------------------*/
191 tmpreg = USARTx->CR3;
\ 00000028 A08A LDRH R0,[R4, #+20]
192 /* Clear CTSE and RTSE bits */
193 tmpreg &= CR3_CLEAR_Mask;
194
195 /* Configure the USART HFC -------------------------------------------------*/
196 /* Set CTSE and RTSE bits according to USART_HardwareFlowControl value */
197 tmpreg |= USART_InitStruct->USART_HardwareFlowControl;
198
199 /* Write to USART CR3 */
200 USARTx->CR3 = (u16)tmpreg;
\ 0000002A 1649 LDR.N R1,??USART_Init_0+0x8 ;; 0xfcff
\ 0000002C 0140 ANDS R1,R1,R0
\ 0000002E A889 LDRH R0,[R5, #+12]
\ 00000030 0843 ORRS R0,R0,R1
\ 00000032 A082 STRH R0,[R4, #+20]
201
202 /*---------------------------- USART BRR Configuration -----------------------*/
203 /* Configure the USART Baud Rate -------------------------------------------*/
204 RCC_GetClocksFreq(&RCC_ClocksStatus);
\ 00000034 6846 MOV R0,SP
\ 00000036 ........ _BLF RCC_GetClocksFreq,??RCC_GetClocksFreq??rT
205 if (usartxbase == USART1_BASE)
\ 0000003A .... LDR.N R0,??DataTable1 ;; 0x40013800
\ 0000003C 8442 CMP R4,R0
\ 0000003E 01D1 BNE.N ??USART_Init_1
206 {
207 apbclock = RCC_ClocksStatus.PCLK2_Frequency;
\ 00000040 0398 LDR R0,[SP, #+12]
\ 00000042 00E0 B.N ??USART_Init_2
208 }
209 else
210 {
211 apbclock = RCC_ClocksStatus.PCLK1_Frequency;
\ ??USART_Init_1:
\ 00000044 0298 LDR R0,[SP, #+8]
212 }
213
214 /* Determine the integer part */
215 integerdivider = ((0x19 * apbclock) / (0x04 * (USART_InitStruct->USART_BaudRate)));
\ ??USART_Init_2:
\ 00000046 1921 MOVS R1,#+25
\ 00000048 4843 MULS R0,R1,R0
\ 0000004A 2968 LDR R1,[R5, #+0]
\ 0000004C 8900 LSLS R1,R1,#+2
\ 0000004E B0FBF1F1 UDIV R1,R0,R1
216 tmpreg = (integerdivider / 0x64) << 0x04;
\ 00000052 6420 MOVS R0,#+100
\ 00000054 B1FBF0F0 UDIV R0,R1,R0
\ 00000058 0201 LSLS R2,R0,#+4
217
218 /* Determine the fractional part */
219 fractionaldivider = integerdivider - (0x64 * (tmpreg >> 0x04));
220 tmpreg |= ((((fractionaldivider * 0x10) + 0x32) / 0x64)) & ((u8)0x0F);
221
222 /* Write to USART BRR */
223 USARTx->BRR = (u16)tmpreg;
\ 0000005A 1000 MOVS R0,R2
\ 0000005C 1209 LSRS R2,R2,#+4
\ 0000005E 6423 MOVS R3,#+100
\ 00000060 02FB1311 MLS R1,R2,R3,R1
\ 00000064 0901 LSLS R1,R1,#+4
\ 00000066 3231 ADDS R1,R1,#+50
\ 00000068 1A46 MOV R2,R3
\ 0000006A B1FBF2F1 UDIV R1,R1,R2
\ 0000006E 0907 LSLS R1,R1,#+28
\ 00000070 090F LSRS R1,R1,#+28
\ 00000072 0143 ORRS R1,R1,R0
\ 00000074 2181 STRH R1,[R4, #+8]
224 }
\ 00000076 05B0 ADD SP,SP,#+20
\ 00000078 30BD POP {R4,R5,PC} ;; return
\ 0000007A 00BF Nop
\ ??USART_Init_0:
\ 0000007C FFCF0000 DC32 0xcfff
\ 00000080 F3E90000 DC32 0xe9f3
\ 00000084 FFFC0000 DC32 0xfcff
225
226 /*******************************************************************************
227 * Function Name : USART_StructInit
228 * Description : Fills each USART_InitStruct member with its default value.
229 * Input : - USART_InitStruct: pointer to a USART_InitTypeDef structure
230 * which will be initialized.
231 * Output : None
232 * Return : None
233 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
234 void USART_StructInit(USART_InitTypeDef* USART_InitStruct)
235 {
236 /* USART_InitStruct members default value */
237 USART_InitStruct->USART_BaudRate = 9600;
\ USART_StructInit:
\ 00000000 5FF41651 MOVS R1,#+9600
\ 00000004 0160 STR R1,[R0, #+0]
238 USART_InitStruct->USART_WordLength = USART_WordLength_8b;
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