📄 stm32f10x_adc.lst
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\ 0000000A F635 ADDS R5,R5,#+246
\ 0000000C 0326 MOVS R6,#+3
\ 0000000E 05FB06F5 MUL R5,R5,R6
\ 00000012 0726 MOVS R6,#+7
\ 00000014 AE40 LSLS R6,R6,R5
\ 00000016 B443 BICS R4,R4,R6
\ 00000018 AB40 LSLS R3,R3,R5
\ 0000001A 2343 ORRS R3,R3,R4
\ 0000001C C360 STR R3,[R0, #+12]
\ 0000001E 09E0 B.N ??ADC_RegularChannelConfig_1
629 }
630 else /* ADC_Channel include in ADC_Channel_[0..9] */
631 {
632 /* Get the old register value */
633 tmpreg1 = ADCx->SMPR2;
\ ??ADC_RegularChannelConfig_0:
\ 00000020 0469 LDR R4,[R0, #+16]
634 /* Calculate the mask to clear */
635 tmpreg2 = SMPR2_SMP_Set << (3 * ADC_Channel);
636 /* Clear the old discontinuous mode channel count */
637 tmpreg1 &= ~tmpreg2;
638 /* Calculate the mask to set */
639 tmpreg2 = (u32)ADC_SampleTime << (3 * ADC_Channel);
640 /* Set the discontinuous mode channel count */
641 tmpreg1 |= tmpreg2;
642 /* Store the new register value */
643 ADCx->SMPR2 = tmpreg1;
\ 00000022 0325 MOVS R5,#+3
\ 00000024 01FB05F5 MUL R5,R1,R5
\ 00000028 0726 MOVS R6,#+7
\ 0000002A AE40 LSLS R6,R6,R5
\ 0000002C B443 BICS R4,R4,R6
\ 0000002E AB40 LSLS R3,R3,R5
\ 00000030 2343 ORRS R3,R3,R4
\ 00000032 0361 STR R3,[R0, #+16]
644 }
645 /* For Rank 1 to 6 */
646 if (Rank < 7)
\ ??ADC_RegularChannelConfig_1:
\ 00000034 072A CMP R2,#+7
\ 00000036 0BD2 BCS.N ??ADC_RegularChannelConfig_2
647 {
648 /* Get the old register value */
649 tmpreg1 = ADCx->SQR3;
\ 00000038 436B LDR R3,[R0, #+52]
650 /* Calculate the mask to clear */
651 tmpreg2 = SQR3_SQ_Set << (5 * (Rank - 1));
652 /* Clear the old SQx bits for the selected rank */
653 tmpreg1 &= ~tmpreg2;
654 /* Calculate the mask to set */
655 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 1));
656 /* Set the SQx bits for the selected rank */
657 tmpreg1 |= tmpreg2;
658 /* Store the new register value */
659 ADCx->SQR3 = tmpreg1;
\ 0000003A 521E SUBS R2,R2,#+1
\ 0000003C 0524 MOVS R4,#+5
\ 0000003E 02FB04F2 MUL R2,R2,R4
\ 00000042 1F24 MOVS R4,#+31
\ 00000044 9440 LSLS R4,R4,R2
\ 00000046 A343 BICS R3,R3,R4
\ 00000048 9140 LSLS R1,R1,R2
\ 0000004A 1943 ORRS R1,R1,R3
\ 0000004C 4163 STR R1,[R0, #+52]
\ 0000004E 70BD POP {R4-R6,PC}
660 }
661 /* For Rank 7 to 12 */
662 else if (Rank < 13)
\ ??ADC_RegularChannelConfig_2:
\ 00000050 0D2A CMP R2,#+13
\ 00000052 0BD2 BCS.N ??ADC_RegularChannelConfig_3
663 {
664 /* Get the old register value */
665 tmpreg1 = ADCx->SQR2;
\ 00000054 036B LDR R3,[R0, #+48]
666 /* Calculate the mask to clear */
667 tmpreg2 = SQR2_SQ_Set << (5 * (Rank - 7));
668 /* Clear the old SQx bits for the selected rank */
669 tmpreg1 &= ~tmpreg2;
670 /* Calculate the mask to set */
671 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 7));
672 /* Set the SQx bits for the selected rank */
673 tmpreg1 |= tmpreg2;
674 /* Store the new register value */
675 ADCx->SQR2 = tmpreg1;
\ 00000056 F932 ADDS R2,R2,#+249
\ 00000058 0524 MOVS R4,#+5
\ 0000005A 02FB04F2 MUL R2,R2,R4
\ 0000005E 1F24 MOVS R4,#+31
\ 00000060 9440 LSLS R4,R4,R2
\ 00000062 A343 BICS R3,R3,R4
\ 00000064 9140 LSLS R1,R1,R2
\ 00000066 1943 ORRS R1,R1,R3
\ 00000068 0163 STR R1,[R0, #+48]
\ 0000006A 70BD POP {R4-R6,PC}
676 }
677 /* For Rank 13 to 16 */
678 else
679 {
680 /* Get the old register value */
681 tmpreg1 = ADCx->SQR1;
\ ??ADC_RegularChannelConfig_3:
\ 0000006C C36A LDR R3,[R0, #+44]
682 /* Calculate the mask to clear */
683 tmpreg2 = SQR1_SQ_Set << (5 * (Rank - 13));
684 /* Clear the old SQx bits for the selected rank */
685 tmpreg1 &= ~tmpreg2;
686 /* Calculate the mask to set */
687 tmpreg2 = (u32)ADC_Channel << (5 * (Rank - 13));
688 /* Set the SQx bits for the selected rank */
689 tmpreg1 |= tmpreg2;
690 /* Store the new register value */
691 ADCx->SQR1 = tmpreg1;
\ 0000006E F332 ADDS R2,R2,#+243
\ 00000070 0524 MOVS R4,#+5
\ 00000072 02FB04F2 MUL R2,R2,R4
\ 00000076 1F24 MOVS R4,#+31
\ 00000078 9440 LSLS R4,R4,R2
\ 0000007A A343 BICS R3,R3,R4
\ 0000007C 9140 LSLS R1,R1,R2
\ 0000007E 1943 ORRS R1,R1,R3
\ 00000080 C162 STR R1,[R0, #+44]
692 }
693 }
\ 00000082 70BD POP {R4-R6,PC} ;; return
694
695 /*******************************************************************************
696 * Function Name : ADC_ExternalTrigConvCmd
697 * Description : Enables or disables the ADCx conversion through external trigger.
698 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
699 * - NewState: new state of the selected ADC external trigger
700 * start of conversion.
701 * This parameter can be: ENABLE or DISABLE.
702 * Output : None
703 * Return : None
704 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
705 void ADC_ExternalTrigConvCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
706 {
707 /* Check the parameters */
708 assert_param(IS_ADC_ALL_PERIPH(ADCx));
709 assert_param(IS_FUNCTIONAL_STATE(NewState));
710
711 if (NewState != DISABLE)
\ ADC_ExternalTrigConvCmd:
\ 00000000 0029 CMP R1,#+0
\ 00000002 8168 LDR R1,[R0, #+8]
\ 00000004 03D0 BEQ.N ??ADC_ExternalTrigConvCmd_0
712 {
713 /* Enable the selected ADC conversion on external event */
714 ADCx->CR2 |= CR2_EXTTRIG_Set;
\ 00000006 51F48011 ORRS R1,R1,#0x100000
\ 0000000A 8160 STR R1,[R0, #+8]
\ 0000000C 7047 BX LR
715 }
716 else
717 {
718 /* Disable the selected ADC conversion on external event */
719 ADCx->CR2 &= CR2_EXTTRIG_Reset;
\ ??ADC_ExternalTrigConvCmd_0:
\ 0000000E 7FF48012 MVNS R2,#+1048576
\ 00000012 0A40 ANDS R2,R2,R1
\ 00000014 8260 STR R2,[R0, #+8]
720 }
721 }
\ 00000016 7047 BX LR ;; return
722
723 /*******************************************************************************
724 * Function Name : ADC_GetConversionValue
725 * Description : Returns the last ADCx conversion result data for regular channel.
726 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
727 * Output : None
728 * Return : The Data conversion value.
729 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
730 u16 ADC_GetConversionValue(ADC_TypeDef* ADCx)
731 {
732 /* Check the parameters */
733 assert_param(IS_ADC_ALL_PERIPH(ADCx));
734
735 /* Return the selected ADC conversion value */
736 return (u16) ADCx->DR;
\ ADC_GetConversionValue:
\ 00000000 C06C LDR R0,[R0, #+76]
\ 00000002 80B2 UXTH R0,R0
\ 00000004 7047 BX LR ;; return
737 }
738
739 /*******************************************************************************
740 * Function Name : ADC_GetDualModeConversionValue
741 * Description : Returns the last ADC1 and ADC2 conversion result data in dual mode.
742 * Output : None
743 * Return : The Data conversion value.
744 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
745 u32 ADC_GetDualModeConversionValue(void)
746 {
747 /* Return the dual mode conversion value */
748 return (*(vu32 *) DR_ADDRESS);
\ ADC_GetDualModeConversionValue:
\ 00000000 0148 LDR.N R0,??ADC_GetDualModeConversionValue_0 ;; 0x4001244c
\ 00000002 0068 LDR R0,[R0, #+0]
\ 00000004 7047 BX LR ;; return
\ 00000006 00BF Nop
\ ??ADC_GetDualModeConversionValue_0:
\ 00000008 4C240140 DC32 0x4001244c
749 }
750
751 /*******************************************************************************
752 * Function Name : ADC_AutoInjectedConvCmd
753 * Description : Enables or disables the selected ADC automatic injected group
754 * conversion after regular one.
755 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
756 * - NewState: new state of the selected ADC auto injected
757 * conversion
758 * This parameter can be: ENABLE or DISABLE.
759 * Output : None
760 * Return : None
761 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
762 void ADC_AutoInjectedConvCmd(ADC_TypeDef* ADCx, FunctionalState NewStat⌨️ 快捷键说明
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