📄 stm32f10x_adc.lst
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456 /* Check the parameters */
457 assert_param(IS_ADC_ALL_PERIPH(ADCx));
458 assert_param(IS_FUNCTIONAL_STATE(NewState));
459
460 if (NewState != DISABLE)
\ ADC_SoftwareStartConvCmd:
\ 00000000 0029 CMP R1,#+0
\ 00000002 8168 LDR R1,[R0, #+8]
\ 00000004 03D0 BEQ.N ??ADC_SoftwareStartConvCmd_0
461 {
462 /* Enable the selected ADC conversion on external event and start the selected
463 ADC conversion */
464 ADCx->CR2 |= CR2_EXTTRIG_SWSTART_Set;
\ 00000006 51F4A001 ORRS R1,R1,#0x500000
\ 0000000A 8160 STR R1,[R0, #+8]
\ 0000000C 7047 BX LR
465 }
466 else
467 {
468 /* Disable the selected ADC conversion on external event and stop the selected
469 ADC conversion */
470 ADCx->CR2 &= CR2_EXTTRIG_SWSTART_Reset;
\ ??ADC_SoftwareStartConvCmd_0:
\ 0000000E 7FF4A002 MVNS R2,#+5242880
\ 00000012 0A40 ANDS R2,R2,R1
\ 00000014 8260 STR R2,[R0, #+8]
471 }
472 }
\ 00000016 7047 BX LR ;; return
473
474 /*******************************************************************************
475 * Function Name : ADC_GetSoftwareStartConvStatus
476 * Description : Gets the selected ADC Software start conversion Status.
477 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
478 * Output : None
479 * Return : The new state of ADC software start conversion (SET or RESET).
480 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
481 FlagStatus ADC_GetSoftwareStartConvStatus(ADC_TypeDef* ADCx)
482 {
483 FlagStatus bitstatus = RESET;
484
485 /* Check the parameters */
486 assert_param(IS_ADC_ALL_PERIPH(ADCx));
487
488 /* Check the status of SWSTART bit */
489 if ((ADCx->CR2 & CR2_SWSTART_Set) != (u32)RESET)
\ ADC_GetSoftwareStartConvStatus:
\ 00000000 8068 LDR R0,[R0, #+8]
490 {
491 /* SWSTART bit is set */
492 bitstatus = SET;
493 }
494 else
495 {
496 /* SWSTART bit is reset */
497 bitstatus = RESET;
\ 00000002 4002 LSLS R0,R0,#+9
\ 00000004 01D5 BPL.N ??ADC_GetSoftwareStartConvStatus_0
\ 00000006 0120 MOVS R0,#+1
\ 00000008 7047 BX LR
\ ??ADC_GetSoftwareStartConvStatus_0:
\ 0000000A 0020 MOVS R0,#+0
498 }
499
500 /* Return the SWSTART bit status */
501 return bitstatus;
\ 0000000C 7047 BX LR ;; return
502 }
503
504 /*******************************************************************************
505 * Function Name : ADC_DiscModeChannelCountConfig
506 * Description : Configures the discontinuous mode for the selected ADC regular
507 * group channel.
508 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
509 * - Number: specifies the discontinuous mode regular channel
510 * count value. This number must be between 1 and 8.
511 * Output : None
512 * Return : None
513 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
514 void ADC_DiscModeChannelCountConfig(ADC_TypeDef* ADCx, u8 Number)
515 {
516 u32 tmpreg1 = 0;
517 u32 tmpreg2 = 0;
518
519 /* Check the parameters */
520 assert_param(IS_ADC_ALL_PERIPH(ADCx));
521 assert_param(IS_ADC_REGULAR_DISC_NUMBER(Number));
522
523 /* Get the old register value */
524 tmpreg1 = ADCx->CR1;
\ ADC_DiscModeChannelCountConfig:
\ 00000000 4268 LDR R2,[R0, #+4]
525 /* Clear the old discontinuous mode channel count */
526 tmpreg1 &= CR1_DISCNUM_Reset;
527 /* Set the discontinuous mode channel count */
528 tmpreg2 = Number - 1;
529 tmpreg1 |= tmpreg2 << 13;
530 /* Store the new register value */
531 ADCx->CR1 = tmpreg1;
\ 00000002 7FF46043 MVNS R3,#+57344
\ 00000006 1340 ANDS R3,R3,R2
\ 00000008 491E SUBS R1,R1,#+1
\ 0000000A 53EA4131 ORRS R1,R3,R1, LSL #+13
\ 0000000E 4160 STR R1,[R0, #+4]
532 }
\ 00000010 7047 BX LR ;; return
533
534 /*******************************************************************************
535 * Function Name : ADC_DiscModeCmd
536 * Description : Enables or disables the discontinuous mode on regular group
537 * channel for the specified ADC
538 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
539 * - NewState: new state of the selected ADC discontinuous mode
540 * on regular group channel.
541 * This parameter can be: ENABLE or DISABLE.
542 * Output : None
543 * Return : None
544 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
545 void ADC_DiscModeCmd(ADC_TypeDef* ADCx, FunctionalState NewState)
546 {
547 /* Check the parameters */
548 assert_param(IS_ADC_ALL_PERIPH(ADCx));
549 assert_param(IS_FUNCTIONAL_STATE(NewState));
550
551 if (NewState != DISABLE)
\ ADC_DiscModeCmd:
\ 00000000 0029 CMP R1,#+0
\ 00000002 4168 LDR R1,[R0, #+4]
\ 00000004 03D0 BEQ.N ??ADC_DiscModeCmd_0
552 {
553 /* Enable the selected ADC regular discontinuous mode */
554 ADCx->CR1 |= CR1_DISCEN_Set;
\ 00000006 51F40061 ORRS R1,R1,#0x800
\ 0000000A 4160 STR R1,[R0, #+4]
\ 0000000C 7047 BX LR
555 }
556 else
557 {
558 /* Disable the selected ADC regular discontinuous mode */
559 ADCx->CR1 &= CR1_DISCEN_Reset;
\ ??ADC_DiscModeCmd_0:
\ 0000000E 7FF40062 MVNS R2,#+2048
\ 00000012 0A40 ANDS R2,R2,R1
\ 00000014 4260 STR R2,[R0, #+4]
560 }
561 }
\ 00000016 7047 BX LR ;; return
562
563 /*******************************************************************************
564 * Function Name : ADC_RegularChannelConfig
565 * Description : Configures for the selected ADC regular channel its corresponding
566 * rank in the sequencer and its sample time.
567 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
568 * - ADC_Channel: the ADC channel to configure.
569 * This parameter can be one of the following values:
570 * - ADC_Channel_0: ADC Channel0 selected
571 * - ADC_Channel_1: ADC Channel1 selected
572 * - ADC_Channel_2: ADC Channel2 selected
573 * - ADC_Channel_3: ADC Channel3 selected
574 * - ADC_Channel_4: ADC Channel4 selected
575 * - ADC_Channel_5: ADC Channel5 selected
576 * - ADC_Channel_6: ADC Channel6 selected
577 * - ADC_Channel_7: ADC Channel7 selected
578 * - ADC_Channel_8: ADC Channel8 selected
579 * - ADC_Channel_9: ADC Channel9 selected
580 * - ADC_Channel_10: ADC Channel10 selected
581 * - ADC_Channel_11: ADC Channel11 selected
582 * - ADC_Channel_12: ADC Channel12 selected
583 * - ADC_Channel_13: ADC Channel13 selected
584 * - ADC_Channel_14: ADC Channel14 selected
585 * - ADC_Channel_15: ADC Channel15 selected
586 * - ADC_Channel_16: ADC Channel16 selected
587 * - ADC_Channel_17: ADC Channel17 selected
588 * - Rank: The rank in the regular group sequencer. This parameter
589 * must be between 1 to 16.
590 * - ADC_SampleTime: The sample time value to be set for the
591 * selected channel.
592 * This parameter can be one of the following values:
593 * - ADC_SampleTime_1Cycles5: Sample time equal to 1.5 cycles
594 * - ADC_SampleTime_7Cycles5: Sample time equal to 7.5 cycles
595 * - ADC_SampleTime_13Cycles5: Sample time equal to 13.5 cycles
596 * - ADC_SampleTime_28Cycles5: Sample time equal to 28.5 cycles
597 * - ADC_SampleTime_41Cycles5: Sample time equal to 41.5 cycles
598 * - ADC_SampleTime_55Cycles5: Sample time equal to 55.5 cycles
599 * - ADC_SampleTime_71Cycles5: Sample time equal to 71.5 cycles
600 * - ADC_SampleTime_239Cycles5: Sample time equal to 239.5 cycles
601 * Output : None
602 * Return : None
603 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
604 void ADC_RegularChannelConfig(ADC_TypeDef* ADCx, u8 ADC_Channel, u8 Rank, u8 ADC_SampleTime)
605 {
\ ADC_RegularChannelConfig:
\ 00000000 70B5 PUSH {R4-R6,LR}
606 u32 tmpreg1 = 0, tmpreg2 = 0;
607
608 /* Check the parameters */
609 assert_param(IS_ADC_ALL_PERIPH(ADCx));
610 assert_param(IS_ADC_CHANNEL(ADC_Channel));
611 assert_param(IS_ADC_REGULAR_RANK(Rank));
612 assert_param(IS_ADC_SAMPLE_TIME(ADC_SampleTime));
613
614 /* if ADC_Channel_10 ... ADC_Channel_17 is selected */
615 if (ADC_Channel > ADC_Channel_9)
\ 00000002 0A29 CMP R1,#+10
\ 00000004 0CD3 BCC.N ??ADC_RegularChannelConfig_0
616 {
617 /* Get the old register value */
618 tmpreg1 = ADCx->SMPR1;
\ 00000006 C468 LDR R4,[R0, #+12]
619 /* Calculate the mask to clear */
620 tmpreg2 = SMPR1_SMP_Set << (3 * (ADC_Channel - 10));
621 /* Clear the old discontinuous mode channel count */
622 tmpreg1 &= ~tmpreg2;
623 /* Calculate the mask to set */
624 tmpreg2 = (u32)ADC_SampleTime << (3 * (ADC_Channel - 10));
625 /* Set the discontinuous mode channel count */
626 tmpreg1 |= tmpreg2;
627 /* Store the new register value */
628 ADCx->SMPR1 = tmpreg1;
\ 00000008 0D00 MOVS R5,R1
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