📄 stm32f10x_adc.lst
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148 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, ENABLE);
\ ??ADC_DeInit_2:
\ 0000002A 0121 MOVS R1,#+1
\ 0000002C 8802 LSLS R0,R1,#+10
\ 0000002E ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
149 /* Release ADC2 from reset state */
150 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC2, DISABLE);
\ 00000032 0021 MOVS R1,#+0
\ 00000034 5FF48060 MOVS R0,#+1024
\ 00000038 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
\ 0000003C 00BD POP {PC}
151 break;
152
153 case ADC3_BASE:
154 /* Enable ADC3 reset state */
155 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, ENABLE);
\ ??ADC_DeInit_3:
\ 0000003E 0121 MOVS R1,#+1
\ 00000040 C803 LSLS R0,R1,#+15
\ 00000042 ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
156 /* Release ADC3 from reset state */
157 RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC3, DISABLE);
\ 00000046 0021 MOVS R1,#+0
\ 00000048 5FF40040 MOVS R0,#+32768
\ 0000004C ........ _BLF RCC_APB2PeriphResetCmd,??RCC_APB2PeriphResetCmd??rT
158 break;
159
160 default:
161 break;
162 }
163 }
\ 00000050 00BD POP {PC} ;; return
\ 00000052 00BF Nop
\ ??ADC_DeInit_0:
\ 00000054 00240140 DC32 0x40012400
\ 00000058 00280140 DC32 0x40012800
\ 0000005C 003C0140 DC32 0x40013c00
164
165 /*******************************************************************************
166 * Function Name : ADC_Init
167 * Description : Initializes the ADCx peripheral according to the specified parameters
168 * in the ADC_InitStruct.
169 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
170 * - ADC_InitStruct: pointer to an ADC_InitTypeDef structure that
171 * contains the configuration information for the specified
172 * ADC peripheral.
173 * Output : None
174 * Return : None
175 ******************************************************************************/
\ In segment CODE, align 4, keep-with-next
176 void ADC_Init(ADC_TypeDef* ADCx, ADC_InitTypeDef* ADC_InitStruct)
177 {
178 u32 tmpreg1 = 0;
179 u8 tmpreg2 = 0;
180
181 /* Check the parameters */
182 assert_param(IS_ADC_ALL_PERIPH(ADCx));
183 assert_param(IS_ADC_MODE(ADC_InitStruct->ADC_Mode));
184 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ScanConvMode));
185 assert_param(IS_FUNCTIONAL_STATE(ADC_InitStruct->ADC_ContinuousConvMode));
186 assert_param(IS_ADC_EXT_TRIG(ADC_InitStruct->ADC_ExternalTrigConv));
187 assert_param(IS_ADC_DATA_ALIGN(ADC_InitStruct->ADC_DataAlign));
188 assert_param(IS_ADC_REGULAR_LENGTH(ADC_InitStruct->ADC_NbrOfChannel));
189
190 /*---------------------------- ADCx CR1 Configuration -----------------*/
191 /* Get the ADCx CR1 value */
192 tmpreg1 = ADCx->CR1;
\ ADC_Init:
\ 00000000 4268 LDR R2,[R0, #+4]
193 /* Clear DUALMOD and SCAN bits */
194 tmpreg1 &= CR1_CLEAR_Mask;
195 /* Configure ADCx: Dual mode and scan conversion mode */
196 /* Set DUALMOD bits according to ADC_Mode value */
197 /* Set SCAN bit according to ADC_ScanConvMode value */
198 tmpreg1 |= (u32)(ADC_InitStruct->ADC_Mode | ((u32)ADC_InitStruct->ADC_ScanConvMode << 8));
199 /* Write to ADCx CR1 */
200 ADCx->CR1 = tmpreg1;
\ 00000002 0F4B LDR.N R3,??ADC_Init_0 ;; 0xfffffffffff0feff
\ 00000004 1340 ANDS R3,R3,R2
\ 00000006 0A68 LDR R2,[R1, #+0]
\ 00000008 1A43 ORRS R2,R2,R3
\ 0000000A 0B79 LDRB R3,[R1, #+4]
\ 0000000C 52EA0322 ORRS R2,R2,R3, LSL #+8
\ 00000010 4260 STR R2,[R0, #+4]
201
202 /*---------------------------- ADCx CR2 Configuration -----------------*/
203 /* Get the ADCx CR2 value */
204 tmpreg1 = ADCx->CR2;
\ 00000012 8268 LDR R2,[R0, #+8]
205 /* Clear CONT, ALIGN and EXTSEL bits */
206 tmpreg1 &= CR2_CLEAR_Mask;
207 /* Configure ADCx: external trigger event and continuous conversion mode */
208 /* Set ALIGN bit according to ADC_DataAlign value */
209 /* Set EXTSEL bits according to ADC_ExternalTrigConv value */
210 /* Set CONT bit according to ADC_ContinuousConvMode value */
211 tmpreg1 |= (u32)(ADC_InitStruct->ADC_DataAlign | ADC_InitStruct->ADC_ExternalTrigConv |
212 ((u32)ADC_InitStruct->ADC_ContinuousConvMode << 1));
213 /* Write to ADCx CR2 */
214 ADCx->CR2 = tmpreg1;
\ 00000014 0B4B LDR.N R3,??ADC_Init_0+0x4 ;; 0xfffffffffff1f7fd
\ 00000016 1340 ANDS R3,R3,R2
\ 00000018 CA68 LDR R2,[R1, #+12]
\ 0000001A 1A43 ORRS R2,R2,R3
\ 0000001C 8B68 LDR R3,[R1, #+8]
\ 0000001E 1343 ORRS R3,R3,R2
\ 00000020 4A79 LDRB R2,[R1, #+5]
\ 00000022 53EA4202 ORRS R2,R3,R2, LSL #+1
\ 00000026 8260 STR R2,[R0, #+8]
215
216 /*---------------------------- ADCx SQR1 Configuration -----------------*/
217 /* Get the ADCx SQR1 value */
218 tmpreg1 = ADCx->SQR1;
\ 00000028 C26A LDR R2,[R0, #+44]
219 /* Clear L bits */
220 tmpreg1 &= SQR1_CLEAR_Mask;
221 /* Configure ADCx: regular channel sequence length */
222 /* Set L bits according to ADC_NbrOfChannel value */
223 tmpreg2 |= (ADC_InitStruct->ADC_NbrOfChannel - 1);
224 tmpreg1 |= ((u32)tmpreg2 << 20);
225 /* Write to ADCx SQR1 */
226 ADCx->SQR1 = tmpreg1;
\ 0000002A 7FF47003 MVNS R3,#+15728640
\ 0000002E 1340 ANDS R3,R3,R2
\ 00000030 097C LDRB R1,[R1, #+16]
\ 00000032 491E SUBS R1,R1,#+1
\ 00000034 C9B2 UXTB R1,R1
\ 00000036 53EA0151 ORRS R1,R3,R1, LSL #+20
\ 0000003A C162 STR R1,[R0, #+44]
227 }
\ 0000003C 7047 BX LR ;; return
\ 0000003E 00BF Nop
\ ??ADC_Init_0:
\ 00000040 FFFEF0FF DC32 0xfffffffffff0feff
\ 00000044 FDF7F1FF DC32 0xfffffffffff1f7fd
228
229 /*******************************************************************************
230 * Function Name : ADC_StructInit
231 * Description : Fills each ADC_InitStruct member with its default value.
232 * Input : ADC_InitStruct : pointer to an ADC_InitTypeDef structure
233 * which will be initialized.
234 * Output : None
235 * Return : None
236 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
237 void ADC_StructInit(ADC_InitTypeDef* ADC_InitStruct)
238 {
239 /* Reset ADC init structure parameters values */
240 /* Initialize the ADC_Mode member */
241 ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
\ ADC_StructInit:
\ 00000000 0021 MOVS R1,#+0
\ 00000002 0160 STR R1,[R0, #+0]
242
243 /* initialize the ADC_ScanConvMode member */
244 ADC_InitStruct->ADC_ScanConvMode = DISABLE;
\ 00000004 0A00 MOVS R2,R1
\ 00000006 0271 STRB R2,[R0, #+4]
245
246 /* Initialize the ADC_ContinuousConvMode member */
247 ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
\ 00000008 4271 STRB R2,[R0, #+5]
248
249 /* Initialize the ADC_ExternalTrigConv member */
250 ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
\ 0000000A 8160 STR R1,[R0, #+8]
251
252 /* Initialize the ADC_DataAlign member */
253 ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
\ 0000000C C160 STR R1,[R0, #+12]
254
255 /* Initialize the ADC_NbrOfChannel member */
256 ADC_InitStruct->ADC_NbrOfChannel = 1;
\ 0000000E 0121 MOVS R1,#+1
\ 00000010 0174 STRB R1,[R0, #+16]
257 }
\ 00000012 7047 BX LR ;; return
258
259 /*******************************************************************************
260 * Function Name : ADC_Cmd
261 * Description : Enables or disables the specified ADC peripheral.
262 * Input : - ADCx: where x can be 1, 2 or 3 to select the ADC peripheral.
263 * - NewState: new state of the ADCx peripheral. This parameter
264 * can be: ENABLE or DISABLE.
265 * Output : None
266 * Return : None
267 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
268 void ADC_Cmd(ADC_TypeDef* ADCx, FunctionalState NewState)
269 {
270 /* Check the parameters */
271 assert_param(IS_ADC_ALL_PERIPH(ADCx));
272 assert_param(IS_FUNCTIONAL_STATE(NewState));
273
274 if (NewState != DISABLE)
\ ADC_Cmd:
\ 00000000 0029 CMP R1,#+0
\ 00000002 8168 LDR R1,[R0, #+8]
\ 00000004 03D0 BEQ.N ??ADC_Cmd_0
275 {
276 /* Set the ADON bit to wake up the ADC from power down mode */
277 ADCx->CR2 |= CR2_ADON_Set;
\ 00000006 51F00101 ORRS R1,R1,#0x1
\ 0000000A 8160 STR R1,[R0, #+8]
\ 0000000C 7047 BX LR
278 }
279 else
280 {
281 /* Disable the selected ADC peripheral */
282 ADCx->CR2 &= CR2_ADON_Reset;
\ ??ADC_Cmd_0:
\ 0000000E 0122 MOVS R2,#+1
\ 00000010 9143 BICS R1,R1,R2
\ 00000012 8160 STR R1,[R0, #+8]
283 }
284 }
\ 00000014 7047 BX LR ;; return
285
286 /*******************************************************************************
287 * Function Name : ADC_DMACmd
288 * Description : Enables or disables the specified ADC DMA request.
289 * Input : - ADCx: where x can be 1 or 3 to select the ADC peripheral.
290 * Note: ADC2 hasn't a DMA capability.
291 * - NewState: new state of the selected ADC DMA transfer.
292 * This parameter can be: ENABLE or DISABLE.
293 * Output : None
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