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📄 stm32f10x_dma.lst

📁 编译环境是 iar EWARM ,STM32 下的UCOSII
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    223          void DMA_StructInit(DMA_InitTypeDef* DMA_InitStruct)
    224          {
    225          /*-------------- Reset DMA init structure parameters values ------------------*/
    226            /* Initialize the DMA_PeripheralBaseAddr member */
    227            DMA_InitStruct->DMA_PeripheralBaseAddr = 0;
   \                     DMA_StructInit:
   \   00000000   0021               MOVS     R1,#+0
   \   00000002   0160               STR      R1,[R0, #+0]
    228          
    229            /* Initialize the DMA_MemoryBaseAddr member */
    230            DMA_InitStruct->DMA_MemoryBaseAddr = 0;
   \   00000004   4160               STR      R1,[R0, #+4]
    231          
    232            /* Initialize the DMA_DIR member */
    233            DMA_InitStruct->DMA_DIR = DMA_DIR_PeripheralSRC;
   \   00000006   8160               STR      R1,[R0, #+8]
    234          
    235            /* Initialize the DMA_BufferSize member */
    236            DMA_InitStruct->DMA_BufferSize = 0;
   \   00000008   C160               STR      R1,[R0, #+12]
    237          
    238            /* Initialize the DMA_PeripheralInc member */
    239            DMA_InitStruct->DMA_PeripheralInc = DMA_PeripheralInc_Disable;
   \   0000000A   0161               STR      R1,[R0, #+16]
    240          
    241            /* Initialize the DMA_MemoryInc member */
    242            DMA_InitStruct->DMA_MemoryInc = DMA_MemoryInc_Disable;
   \   0000000C   4161               STR      R1,[R0, #+20]
    243          
    244            /* Initialize the DMA_PeripheralDataSize member */
    245            DMA_InitStruct->DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
   \   0000000E   8161               STR      R1,[R0, #+24]
    246          
    247            /* Initialize the DMA_MemoryDataSize member */
    248            DMA_InitStruct->DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
   \   00000010   C161               STR      R1,[R0, #+28]
    249          
    250            /* Initialize the DMA_Mode member */
    251            DMA_InitStruct->DMA_Mode = DMA_Mode_Normal;
   \   00000012   0162               STR      R1,[R0, #+32]
    252          
    253            /* Initialize the DMA_Priority member */
    254            DMA_InitStruct->DMA_Priority = DMA_Priority_Low;
   \   00000014   4162               STR      R1,[R0, #+36]
    255          
    256            /* Initialize the DMA_M2M member */
    257            DMA_InitStruct->DMA_M2M = DMA_M2M_Disable;
   \   00000016   8162               STR      R1,[R0, #+40]
    258          }
   \   00000018   7047               BX       LR               ;; return
    259          
    260          /*******************************************************************************
    261          * Function Name  : DMA_Cmd
    262          * Description    : Enables or disables the specified DMAy Channelx.
    263          * Input          : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and 
    264          *                    x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the 
    265          *                    DMA Channel.
    266          *                  - NewState: new state of the DMAy Channelx. 
    267          *                    This parameter can be: ENABLE or DISABLE.
    268          * Output         : None
    269          * Return         : None
    270          *******************************************************************************/

   \                                 In segment CODE, align 4, keep-with-next
    271          void DMA_Cmd(DMA_Channel_TypeDef* DMAy_Channelx, FunctionalState NewState)
    272          {
    273            /* Check the parameters */
    274            assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
    275            assert_param(IS_FUNCTIONAL_STATE(NewState));
    276          
    277            if (NewState != DISABLE)
   \                     DMA_Cmd:
   \   00000000   0029               CMP      R1,#+0
   \   00000002   0168               LDR      R1,[R0, #+0]
   \   00000004   03D0               BEQ.N    ??DMA_Cmd_0
    278            {
    279              /* Enable the selected DMAy Channelx */
    280              DMAy_Channelx->CCR |= CCR_ENABLE_Set;
   \   00000006   51F00101           ORRS     R1,R1,#0x1
   \   0000000A   0160               STR      R1,[R0, #+0]
   \   0000000C   7047               BX       LR
    281            }
    282            else
    283            {
    284              /* Disable the selected DMAy Channelx */
    285              DMAy_Channelx->CCR &= CCR_ENABLE_Reset;
   \                     ??DMA_Cmd_0:
   \   0000000E   0122               MOVS     R2,#+1
   \   00000010   9143               BICS     R1,R1,R2
   \   00000012   0160               STR      R1,[R0, #+0]
    286            }
    287          }
   \   00000014   7047               BX       LR               ;; return
    288          
    289          /*******************************************************************************
    290          * Function Name  : DMA_ITConfig
    291          * Description    : Enables or disables the specified DMAy Channelx interrupts.
    292          * Input          : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and 
    293          *                    x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the 
    294          *                    DMA Channel.
    295          *                  - DMA_IT: specifies the DMA interrupts sources to be enabled
    296          *                    or disabled. 
    297          *                    This parameter can be any combination of the following values:
    298          *                       - DMA_IT_TC:  Transfer complete interrupt mask
    299          *                       - DMA_IT_HT:  Half transfer interrupt mask
    300          *                       - DMA_IT_TE:  Transfer error interrupt mask
    301          *                  - NewState: new state of the specified DMA interrupts.
    302          *                    This parameter can be: ENABLE or DISABLE.
    303          * Output         : None
    304          * Return         : None
    305          *******************************************************************************/

   \                                 In segment CODE, align 4, keep-with-next
    306          void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, u32 DMA_IT, FunctionalState NewState)
    307          {
    308            /* Check the parameters */
    309            assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
    310            assert_param(IS_DMA_CONFIG_IT(DMA_IT));
    311            assert_param(IS_FUNCTIONAL_STATE(NewState));
    312          
    313            if (NewState != DISABLE)
   \                     DMA_ITConfig:
   \   00000000   002A               CMP      R2,#+0
   \   00000002   0268               LDR      R2,[R0, #+0]
   \   00000004   02D0               BEQ.N    ??DMA_ITConfig_0
    314            {
    315              /* Enable the selected DMA interrupts */
    316              DMAy_Channelx->CCR |= DMA_IT;
   \   00000006   1143               ORRS     R1,R1,R2
   \   00000008   0160               STR      R1,[R0, #+0]
   \   0000000A   7047               BX       LR
    317            }
    318            else
    319            {
    320              /* Disable the selected DMA interrupts */
    321              DMAy_Channelx->CCR &= ~DMA_IT;
   \                     ??DMA_ITConfig_0:
   \   0000000C   8A43               BICS     R2,R2,R1
   \   0000000E   0260               STR      R2,[R0, #+0]
    322            }
    323          }
   \   00000010   7047               BX       LR               ;; return
    324          
    325          /*******************************************************************************
    326          * Function Name  : DMA_GetCurrDataCounter
    327          * Description    : Returns the number of remaining data units in the current
    328          *                  DMAy Channelx transfer.
    329          * Input          : - DMAy_Channelx: where y can be 1 or 2 to select the DMA and 
    330          *                    x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the 
    331          *                    DMA Channel.
    332          * Output         : None
    333          * Return         : The number of remaining data units in the current DMAy Channelx
    334          *                  transfer.
    335          *******************************************************************************/

   \                                 In segment CODE, align 4, keep-with-next
    336          u16 DMA_GetCurrDataCounter(DMA_Channel_TypeDef* DMAy_Channelx)
    337          {
    338            /* Check the parameters */
    339            assert_param(IS_DMA_ALL_PERIPH(DMAy_Channelx));
    340          
    341            /* Return the number of remaining data units for DMAy Channelx */
    342            return ((u16)(DMAy_Channelx->CNDTR));
   \                     DMA_GetCurrDataCounter:
   \   00000000   4068               LDR      R0,[R0, #+4]
   \   00000002   80B2               UXTH     R0,R0
   \   00000004   7047               BX       LR               ;; return
    343          }
    344          
    345          /*******************************************************************************
    346          * Function Name  : DMA_GetFlagStatus
    347          * Description    : Checks whether the specified DMAy Channelx flag is set or not.
    348          * Input          : - DMA_FLAG: specifies the flag to check.
    349          *                    This parameter can be one of the following values:
    350          *                       - DMA1_FLAG_GL1: DMA1 Channel1 global flag.
    351          *                       - DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
    352          *                       - DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
    353          *                       - DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
    354          *                       - DMA1_FLAG_GL2: DMA1 Channel2 global flag.
    355          *                       - DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
    356          *                       - DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
    357          *                       - DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
    358          *                       - DMA1_FLAG_GL3: DMA1 Channel3 global flag.
    359          *                       - DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
    360          *                       - DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
    361          *                       - DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
    362          *                       - DMA1_FLAG_GL4: DMA1 Channel4 global flag.
    363          *                       - DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
    364          *                       - DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
    365          *                       - DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
    366          *                       - DMA1_FLAG_GL5: DMA1 Channel5 global flag.
    367          *                       - DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
    368          *                       - DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
    369          *                       - DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
    370          *                       - DMA1_FLAG_GL6: DMA1 Channel6 global flag.
    371          *                       - DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
    372          *                       - DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
    373          *                       - DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
    374          *                       - DMA1_FLAG_GL7: DMA1 Channel7 global flag.
    375          *                       - DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
    376          *                       - DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
    377          *                       - DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
    378          *                       - DMA2_FLAG_GL1: DMA2 Channel1 global flag.
    379          *                       - DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
    380          *                       - DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
    381          *                       - DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
    382          *                       - DMA2_FLAG_GL2: DMA2 Channel2 global flag.
    383          *                       - DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
    384          *                       - DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
    385          *                       - DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.

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