📄 lib_mem.lst
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\ 00000020 1300 MOVS R3,R2
486 /* Start @ end of mem bufs (see Note #2). */
487 p1_mem_08 = (CPU_INT08U *)p1_mem + size;
\ 00000022 A918 ADDS R1,R5,R2
488 p2_mem_08 = (CPU_INT08U *)p2_mem + size;
\ 00000024 A218 ADDS R2,R4,R2
489 /* See Note #4. */
490 mem_align_modulo_1 = (CPU_INT08U )((CPU_ADDR)p1_mem_08 % sizeof(CPU_ALIGN));
\ 00000026 0C00 MOVS R4,R1
\ 00000028 A507 LSLS R5,R4,#+30
\ 0000002A AD0F LSRS R5,R5,#+30
491 mem_align_modulo_2 = (CPU_INT08U )((CPU_ADDR)p2_mem_08 % sizeof(CPU_ALIGN));
492
493 mem_aligned = (mem_align_modulo_1 == mem_align_modulo_2) ? DEF_YES : DEF_NO;
\ 0000002C 0024 MOVS R4,#+0
\ 0000002E 2E00 MOVS R6,R5
\ 00000030 1700 MOVS R7,R2
\ 00000032 BF07 LSLS R7,R7,#+30
\ 00000034 BF0F LSRS R7,R7,#+30
\ 00000036 BE42 CMP R6,R7
\ 00000038 01D1 BNE.N ??Mem_Cmp_4
\ 0000003A 4646 MOV R6,R8
\ 0000003C 00E0 B.N ??Mem_Cmp_5
\ ??Mem_Cmp_4:
\ 0000003E 2600 MOVS R6,R4
494
495 if (mem_aligned == DEF_YES) { /* If mem bufs' alignment offset equal, ... */
\ ??Mem_Cmp_5:
\ 00000040 012E CMP R6,#+1
\ 00000042 2DD1 BNE.N ??Mem_Cmp_6
496 /* ... optimize cmp for mem buf alignment. */
497 if (mem_align_modulo_1 != 0) { /* If trailing octets avail, ... */
\ 00000044 2E00 MOVS R6,R5
\ 00000046 11D0 BEQ.N ??Mem_Cmp_7
498 i = mem_align_modulo_1;
\ 00000048 09E0 B.N ??Mem_Cmp_8
499 while ((mem_cmp == DEF_YES) && /* ... cmp mem bufs while identical & ... */
500 (size_rem > 0) && /* ... start mem buf cmp with trailing octets ... */
501 (i > 0)) { /* ... until next CPU_ALIGN word boundary. */
502 p1_mem_08--;
\ ??Mem_Cmp_9:
\ 0000004A 491E SUBS R1,R1,#+1
503 p2_mem_08--;
\ 0000004C 521E SUBS R2,R2,#+1
504 if (*p1_mem_08 != *p2_mem_08) { /* If ANY data octet(s) NOT identical, cmp fails. */
\ 0000004E 0E78 LDRB R6,[R1, #+0]
\ 00000050 1778 LDRB R7,[R2, #+0]
\ 00000052 BE42 CMP R6,R7
\ 00000054 00D0 BEQ.N ??Mem_Cmp_10
505 mem_cmp = DEF_NO;
\ 00000056 2000 MOVS R0,R4
506 }
507 size_rem -= sizeof(CPU_INT08U);
\ ??Mem_Cmp_10:
\ 00000058 5B1E SUBS R3,R3,#+1
508 i--;
\ 0000005A 6D1E SUBS R5,R5,#+1
\ 0000005C EDB2 UXTB R5,R5
509 }
\ ??Mem_Cmp_8:
\ 0000005E 0600 MOVS R6,R0
\ 00000060 012E CMP R6,#+1
\ 00000062 03D1 BNE.N ??Mem_Cmp_7
\ 00000064 002B CMP R3,#+0
\ 00000066 01D0 BEQ.N ??Mem_Cmp_7
\ 00000068 2E00 MOVS R6,R5
\ 0000006A EED1 BNE.N ??Mem_Cmp_9
510 }
511
512 if (mem_cmp == DEF_YES) { /* If cmp still identical, cmp aligned mem bufs. */
\ ??Mem_Cmp_7:
\ 0000006C 0500 MOVS R5,R0
\ 0000006E 012D CMP R5,#+1
\ 00000070 16D1 BNE.N ??Mem_Cmp_6
513 p1_mem_align = (CPU_ALIGN *)p1_mem_08; /* See Note #3a. */
514 p2_mem_align = (CPU_ALIGN *)p2_mem_08;
\ 00000072 07E0 B.N ??Mem_Cmp_11
515
516 while ((mem_cmp == DEF_YES) && /* Cmp mem bufs while identical & ... */
517 (size_rem >= sizeof(CPU_ALIGN))) { /* ... mem bufs aligned on CPU_ALIGN word boundaries. */
518 p1_mem_align--;
\ ??Mem_Cmp_12:
\ 00000074 091F SUBS R1,R1,#+4
519 p2_mem_align--;
\ 00000076 121F SUBS R2,R2,#+4
520 if (*p1_mem_align != *p2_mem_align) { /* If ANY data octet(s) NOT identical, cmp fails. */
\ 00000078 0D68 LDR R5,[R1, #+0]
\ 0000007A 1668 LDR R6,[R2, #+0]
\ 0000007C B542 CMP R5,R6
\ 0000007E 00D0 BEQ.N ??Mem_Cmp_13
521 mem_cmp = DEF_NO;
\ 00000080 2000 MOVS R0,R4
522 }
523 size_rem -= sizeof(CPU_ALIGN);
\ ??Mem_Cmp_13:
\ 00000082 1B1F SUBS R3,R3,#+4
524 }
\ ??Mem_Cmp_11:
\ 00000084 0500 MOVS R5,R0
\ 00000086 012D CMP R5,#+1
\ 00000088 0AD1 BNE.N ??Mem_Cmp_6
\ 0000008A 042B CMP R3,#+4
\ 0000008C F2D2 BCS.N ??Mem_Cmp_12
525
526 p1_mem_08 = (CPU_INT08U *)p1_mem_align;
527 p2_mem_08 = (CPU_INT08U *)p2_mem_align;
\ 0000008E 07E0 B.N ??Mem_Cmp_6
528 }
529 }
530
531 while ((mem_cmp == DEF_YES) && /* Cmp mem bufs while identical ... */
532 (size_rem > 0)) { /* ... for unaligned mem bufs or trailing octets. */
533 p1_mem_08--;
\ ??Mem_Cmp_14:
\ 00000090 491E SUBS R1,R1,#+1
534 p2_mem_08--;
\ 00000092 521E SUBS R2,R2,#+1
535 if (*p1_mem_08 != *p2_mem_08) { /* If ANY data octet(s) NOT identical, cmp fails. */
\ 00000094 0D78 LDRB R5,[R1, #+0]
\ 00000096 1678 LDRB R6,[R2, #+0]
\ 00000098 B542 CMP R5,R6
\ 0000009A 00D0 BEQ.N ??Mem_Cmp_15
536 mem_cmp = DEF_NO;
\ 0000009C 2000 MOVS R0,R4
537 }
538 size_rem -= sizeof(CPU_INT08U);
\ ??Mem_Cmp_15:
\ 0000009E 5B1E SUBS R3,R3,#+1
539 }
\ ??Mem_Cmp_6:
\ 000000A0 0500 MOVS R5,R0
\ 000000A2 012D CMP R5,#+1
\ 000000A4 01D1 BNE.N ??Mem_Cmp_1
\ 000000A6 002B CMP R3,#+0
\ 000000A8 F2D1 BNE.N ??Mem_Cmp_14
540
541 return (mem_cmp);
\ ??Mem_Cmp_1:
\ 000000AA BDE8F081 POP {R4-R8,PC} ;; return
542 }
543
544
545 /*$PAGE*/
546 /*
547 *********************************************************************************************************
548 * Mem_PoolCreate()
549 *
550 * Description : (1) Create a memory pool :
551 *
552 * (a) Create memory pool from heap or dedicated memory
553 * (b) Allocate memory pool memory blocks
554 * (c) Update memory pool table
555 * (d) Configure memory pool
556 *
557 *
558 * (2) Memory pools are indexed by the Memory Segments they use.
559 *
560 * (a) The memory pool table is composed by a two-dimensional list :
561 *
562 * (1) Memory segments manage the following memory segment/pool information :
563 *
564 * (A) Memory segment base address
565 * (B) Memory segment next available address
566 * (C) Memory segment total size
567 * (D) Memory segment remaining size
568 *
569 * (2) Memory pools share memory from memory segments but do NOT manage any memory
570 * segment information. To access the memory segment information, the head
571 * memory segment must be accessed.
572 *
573 * (b) In the diagram below, memory pools in vertical columns represent they share the same
574 * memory segment for the memory blocks they have. The heads of the memory pool are
575 * linked horizontally to form a memory pool table.
576 *
577 * (1) 'Mem_PoolTbl' points to the head of the Memory Pool table.
578 *
579 * (2) Memory Pools' 'SegPrevPtr' & 'SegNextPtr' doubly-link each memory segment to
580 * form the list of memory segments.
581 *
582 * (3) Memory Pools' 'PoolPrevPtr' & 'PoolNextPtr' doubly-link the memory pools of
583 * each memory segment.
584 *
585 * (c) New memory pools, which do not share a memory segment, are inserted in the Memory
586 * Segments Primary List. The point of insertion is such to keep ascended order by
587 * memory segment base address.
588 *
589 * (d) Memory pool pointers to memory blocks 'PoolPtrs' must be allocated for each created
590 * memory pool. These pointers are stored in the memory pool heap segment 'Mem_PoolHeap'.
591 *
592 * (1) A memory pool can also have its memory blocks allocated from the memory pool heap.
593 * 'pmem_base_addr' must be set to NULL & 'mem_size' must be set to (0) to create the
594 * memory pool.
595 *
596 *
597 * | |
598 * |<----------------------- Memory Segments ----------------------->|
599 * | (see Note #2a1) |
600 *
601 * Lowest Memory Segment Highest Memory Segment
602 * Base Address Base Address
603 * (see Note #2c) (see Note #2c)
604 *
605 * | SegNextPtr Heap Memory Pool |
606 * | (see Note #2b2) (see Note #2d) |
607 * | | |
608 * v | | v
609 * | v
610 * --- Head of Memory ------- ------- v ------- ------- -------
611 * ^ Pool Table --->| |------->| |------->| |------->| |------->| |
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