📄 stm32f10x_fsmc.lst
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\ 0000004E A360 STR R3,[R4, #+8]
385 FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_BusTurnAroundDuration = 0xF;
\ 00000050 836B LDR R3,[R0, #+56]
\ 00000052 DA60 STR R2,[R3, #+12]
386 FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_CLKDivision = 0xF;
\ 00000054 836B LDR R3,[R0, #+56]
\ 00000056 1A61 STR R2,[R3, #+16]
387 FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_DataLatency = 0xF;
\ 00000058 836B LDR R3,[R0, #+56]
\ 0000005A 5A61 STR R2,[R3, #+20]
388 FSMC_NORSRAMInitStruct->FSMC_WriteTimingStruct->FSMC_AccessMode = FSMC_AccessMode_A;
\ 0000005C 806B LDR R0,[R0, #+56]
\ 0000005E 8161 STR R1,[R0, #+24]
389 }
\ 00000060 10BD POP {R4,PC} ;; return
390
391 /*******************************************************************************
392 * Function Name : FSMC_NANDStructInit
393 * Description : Fills each FSMC_NANDInitStruct member with its default value.
394 * Input : - FSMC_NORSRAMInitStruct: pointer to a FSMC_NANDInitTypeDef
395 * structure which will be initialized.
396 * Output : None
397 * Return : None
398 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
399 void FSMC_NANDStructInit(FSMC_NANDInitTypeDef* FSMC_NANDInitStruct)
400 {
401 /* Reset NAND Init structure parameters values */
402 FSMC_NANDInitStruct->FSMC_Bank = FSMC_Bank2_NAND;
\ FSMC_NANDStructInit:
\ 00000000 1021 MOVS R1,#+16
\ 00000002 0160 STR R1,[R0, #+0]
403 FSMC_NANDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable;
\ 00000004 0021 MOVS R1,#+0
\ 00000006 4160 STR R1,[R0, #+4]
404 FSMC_NANDInitStruct->FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_8b;
\ 00000008 8160 STR R1,[R0, #+8]
405 FSMC_NANDInitStruct->FSMC_ECC = FSMC_ECC_Disable;
\ 0000000A C160 STR R1,[R0, #+12]
406 FSMC_NANDInitStruct->FSMC_ECCPageSize = FSMC_ECCPageSize_256Bytes;
\ 0000000C 0161 STR R1,[R0, #+16]
407 FSMC_NANDInitStruct->FSMC_AddressLowMapping = FSMC_AddressLowMapping_Direct;
\ 0000000E 4161 STR R1,[R0, #+20]
408 FSMC_NANDInitStruct->FSMC_TCLRSetupTime = 0x0;
\ 00000010 8161 STR R1,[R0, #+24]
409 FSMC_NANDInitStruct->FSMC_TARSetupTime = 0x0;
\ 00000012 C161 STR R1,[R0, #+28]
410 FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC;
\ 00000014 FC21 MOVS R1,#+252
\ 00000016 026A LDR R2,[R0, #+32]
\ 00000018 1160 STR R1,[R2, #+0]
411 FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
\ 0000001A 026A LDR R2,[R0, #+32]
\ 0000001C 5160 STR R1,[R2, #+4]
412 FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
\ 0000001E 026A LDR R2,[R0, #+32]
\ 00000020 9160 STR R1,[R2, #+8]
413 FSMC_NANDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
\ 00000022 026A LDR R2,[R0, #+32]
\ 00000024 D160 STR R1,[R2, #+12]
414 FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC;
\ 00000026 426A LDR R2,[R0, #+36]
\ 00000028 1160 STR R1,[R2, #+0]
415 FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
\ 0000002A 426A LDR R2,[R0, #+36]
\ 0000002C 5160 STR R1,[R2, #+4]
416 FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
\ 0000002E 426A LDR R2,[R0, #+36]
\ 00000030 9160 STR R1,[R2, #+8]
417 FSMC_NANDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
\ 00000032 406A LDR R0,[R0, #+36]
\ 00000034 C160 STR R1,[R0, #+12]
418 }
\ 00000036 7047 BX LR ;; return
419
420 /*******************************************************************************
421 * Function Name : FSMC_PCCARDStructInit
422 * Description : Fills each FSMC_PCCARDInitStruct member with its default value.
423 * Input : - FSMC_PCCARDInitStruct: pointer to a FSMC_PCCARDInitTypeDef
424 * structure which will be initialized.
425 * Output : None
426 * Return : None
427 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
428 void FSMC_PCCARDStructInit(FSMC_PCCARDInitTypeDef* FSMC_PCCARDInitStruct)
429 {
430 /* Reset PCCARD Init structure parameters values */
431 FSMC_PCCARDInitStruct->FSMC_Waitfeature = FSMC_Waitfeature_Disable;
\ FSMC_PCCARDStructInit:
\ 00000000 0021 MOVS R1,#+0
\ 00000002 0160 STR R1,[R0, #+0]
432 FSMC_PCCARDInitStruct->FSMC_AddressLowMapping = FSMC_AddressLowMapping_Direct;
\ 00000004 4160 STR R1,[R0, #+4]
433 FSMC_PCCARDInitStruct->FSMC_TCLRSetupTime = 0x0;
\ 00000006 8160 STR R1,[R0, #+8]
434 FSMC_PCCARDInitStruct->FSMC_TARSetupTime = 0x0;
\ 00000008 C160 STR R1,[R0, #+12]
435 FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_SetupTime = 0xFC;
\ 0000000A FC21 MOVS R1,#+252
\ 0000000C 0269 LDR R2,[R0, #+16]
\ 0000000E 1160 STR R1,[R2, #+0]
436 FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
\ 00000010 0269 LDR R2,[R0, #+16]
\ 00000012 5160 STR R1,[R2, #+4]
437 FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
\ 00000014 0269 LDR R2,[R0, #+16]
\ 00000016 9160 STR R1,[R2, #+8]
438 FSMC_PCCARDInitStruct->FSMC_CommonSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
\ 00000018 0269 LDR R2,[R0, #+16]
\ 0000001A D160 STR R1,[R2, #+12]
439 FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_SetupTime = 0xFC;
\ 0000001C 4269 LDR R2,[R0, #+20]
\ 0000001E 1160 STR R1,[R2, #+0]
440 FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
\ 00000020 4269 LDR R2,[R0, #+20]
\ 00000022 5160 STR R1,[R2, #+4]
441 FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
\ 00000024 4269 LDR R2,[R0, #+20]
\ 00000026 9160 STR R1,[R2, #+8]
442 FSMC_PCCARDInitStruct->FSMC_AttributeSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
\ 00000028 4269 LDR R2,[R0, #+20]
\ 0000002A D160 STR R1,[R2, #+12]
443 FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_SetupTime = 0xFC;
\ 0000002C 8269 LDR R2,[R0, #+24]
\ 0000002E 1160 STR R1,[R2, #+0]
444 FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_WaitSetupTime = 0xFC;
\ 00000030 8269 LDR R2,[R0, #+24]
\ 00000032 5160 STR R1,[R2, #+4]
445 FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HoldSetupTime = 0xFC;
\ 00000034 8269 LDR R2,[R0, #+24]
\ 00000036 9160 STR R1,[R2, #+8]
446 FSMC_PCCARDInitStruct->FSMC_IOSpaceTimingStruct->FSMC_HiZSetupTime = 0xFC;
\ 00000038 8069 LDR R0,[R0, #+24]
\ 0000003A C160 STR R1,[R0, #+12]
447 }
\ 0000003C 7047 BX LR ;; return
448
449 /*******************************************************************************
450 * Function Name : FSMC_NORSRAMCmd
451 * Description : Enables or disables the specified NOR/SRAM Memory Bank.
452 * Input : - FSMC_Bank: specifies the FSMC Bank to be used
453 * This parameter can be one of the following values:
454 * - FSMC_Bank1_NORSRAM1: FSMC Bank1 NOR/SRAM1
455 * - FSMC_Bank1_NORSRAM2: FSMC Bank1 NOR/SRAM2
456 * - FSMC_Bank1_NORSRAM3: FSMC Bank1 NOR/SRAM3
457 * - FSMC_Bank1_NORSRAM4: FSMC Bank1 NOR/SRAM4
458 * : - NewState: new state of the FSMC_Bank.
459 * This parameter can be: ENABLE or DISABLE.
460 * Output : None
461 * Return : None
462 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
463 void FSMC_NORSRAMCmd(u32 FSMC_Bank, FunctionalState NewState)
464 {
465 assert_param(IS_FSMC_NORSRAM_BANK(FSMC_Bank));
466 assert_param(IS_FUNCTIONAL_STATE(NewState));
467
468 if (NewState != DISABLE)
\ FSMC_NORSRAMCmd:
\ 00000000 8000 LSLS R0,R0,#+2
\ 00000002 10F12040 ADDS R0,R0,#-1610612736
\ 00000006 0029 CMP R1,#+0
\ 00000008 0168 LDR R1,[R0, #+0]
\ 0000000A 03D0 BEQ.N ??FSMC_NORSRAMCmd_0
469 {
470 /* Enable the selected NOR/SRAM Bank by setting the PBKEN bit in the BCRx register */
471 FSMC_Bank1->BTCR[FSMC_Bank] |= BCR_MBKEN_Set;
\ 0000000C 51F00101 ORRS R1,R1,#0x1
\ 00000010 0160 STR R1,[R0, #+0]
\ 00000012 7047 BX LR
472 }
473 else
474 {
475 /* Disable the selected NOR/SRAM Bank by clearing the PBKEN bit in the BCRx register */
476 FSMC_Bank1->BTCR[FSMC_Bank] &= BCR_MBKEN_Reset;
\ ??FSMC_NORSRAMCmd_0:
\ 00000014 014A LDR.N R2,??FSMC_NORSRAMCmd_1 ;; 0xffffe
\ 00000016 0A40 ANDS R2,R2,R1
\ 00000018 0260 STR R2,[R0, #+0]
477 }
478 }
\ 0000001A 7047 BX LR ;; return
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