ata_test.c

samsung 最新芯片2450 的测试程序.

	unsigned int uSector;
	unsigned int uDeviceMaxSectors;
	
	uWriteBuf = CODEC_MEM_ST;
	uReadBuf = CODEC_MEM_ST + 0x400000;

	OpenATAMediaWithMode(PIO_DMA);
	GetMaxSectors(&uDeviceMaxSectors);
	
	printf("\nInput device sector address[max: 0x%x]\n",uDeviceMaxSectors);
	deviceLBA = (unsigned int)GetIntNum();

	printf("Input sector count[max: 0x%x]\n",uDeviceMaxSectors-deviceLBA);
	uSector = (unsigned int)GetIntNum();

	for (i=0; i<uSector*512; i++)
	{
		Outp8(uWriteBuf+i, (i+4)%256);
		Outp8(uReadBuf+i, 0);
	}

	bIsXferDone = FALSE;

	ClearAllInterrupt();
	pISR_CFCON = (unsigned)Isr_Ata;  
	rINTMSK &= (~BIT_CFCON); // unmask cfcon 
	
	for (i=0; i<uSector; i++)
	{
		StartWritingBlocks(deviceLBA+i, 1, uWriteBuf+i*512);
		while(bIsXferDone != TRUE) ;
		bIsXferDone = FALSE;	
	}

	for (i=0; i<uSector; i++)
	{
		StartReadingBlocks(deviceLBA+i, 1, uReadBuf+i*512);
		while(bIsXferDone != TRUE) ;
		bIsXferDone = FALSE;	
	}
	
	if (Compare32(uWriteBuf, uReadBuf, uSector*128) == FALSE)
	{
		printf("Error detected\n");
		Dump32(uReadBuf, uSector*128);
	}
	else
	{
		printf("Write/Read in PIO DMA mode is OK\n");
	}
	
	rINTMSK |= BIT_CFCON; // mask cfcon 
	
	CloseATAMedia();
}

void TestUDmaMode_Int(void)
{
	unsigned int uWriteBuf, uReadBuf;
	unsigned int deviceLBA;
	unsigned int uSector;
	unsigned int uDeviceMaxSectors;

	unsigned int uCurrentCount;
	unsigned int uRemainderCount;
	unsigned int uCurrentLba;
	unsigned int uCurrentAddr;
	unsigned int uRound;
	unsigned int i;

	uWriteBuf = CODEC_MEM_ST;
	uReadBuf = CODEC_MEM_ST + 0x400000;

	OpenATAMediaWithMode(UDMA);
	GetMaxSectors(&uDeviceMaxSectors);

	printf("\nInput device sector address[max: 0x%x]\n", uDeviceMaxSectors);
	deviceLBA = (unsigned int)GetIntNum();

	printf("Input sector count[max: 0x%x]\n", uDeviceMaxSectors-deviceLBA);
	uSector = (unsigned int)GetIntNum();

	for ( i=0; i<uSector*512; i++)
	{
		Outp8(uWriteBuf+i, (i+4)%256);
		Outp8(uReadBuf+i, 0);
	}

	bIsXferDone = FALSE;

	ClearAllInterrupt();
	ClearPending(BIT_CFCON);  
	rINTMSK &= (~BIT_CFCON); // unmask cfcon 
	pISR_CFCON = (unsigned)Isr_Ata;
	
	// Max transfer block count per command is 256.
	uRemainderCount = uSector;
	uRound = 0;	
	
	while(uRemainderCount != 0) {
		if(uRemainderCount>256) {
			uCurrentCount = 256; //0 means 256
			uRemainderCount -= 256;
		} else {
			uCurrentCount = uRemainderCount;
			uRemainderCount = 0;
		}
		uCurrentLba = deviceLBA + uRound*256;
		uCurrentAddr = uWriteBuf + uRound*256*512;
		
		StartWritingBlocks(uCurrentLba, uCurrentCount, uCurrentAddr);

		while(bIsXferDone != TRUE);
		bIsXferDone = FALSE;

		uRound++;
	}

	printf("Write Done\n");

	uRemainderCount = uSector;
	uRound = 0;	
	
	while(uRemainderCount != 0) {
		if(uRemainderCount>256) {
			uCurrentCount = 256; //0 means 256
			uRemainderCount -= 256;
		} else {
			uCurrentCount = uRemainderCount;
			uRemainderCount = 0;
		}
		uCurrentLba = deviceLBA + uRound*256;
		uCurrentAddr = uReadBuf + uRound*256*512;

		StartReadingBlocks(uCurrentLba, uCurrentCount, uCurrentAddr);
		while(bIsXferDone != TRUE) ;
		bIsXferDone = FALSE;	

		uRound++;
	}
	
	printf("Read Done\n");
	
	if (Compare32(uWriteBuf, uReadBuf, uSector*128) == FALSE)
	{
		printf("Error detected\n");
		Dump32(uReadBuf, uSector*128);
	}
	else
	{
		printf("Write/Read in UDMA mode is OK\n");
	}
	
	rINTMSK |= BIT_CFCON; // mask cfcon 

	CloseATAMedia();
}

void __irq DmaDoneNAND(void)
{
	unsigned int sub_pnd;
	
	sub_pnd = rSUBSRCPND;
		
	if (sub_pnd&BIT_SUB_DMA0)
	{
		rSUBSRCPND = BIT_SUB_DMA0;
		rDMASKTRIG0 |= 1;
		printf("d0");	
	}

	if (sub_pnd&BIT_SUB_DMA1)
	{
		rSUBSRCPND = BIT_SUB_DMA1;
		rDMASKTRIG1 |= 1;
		printf("d1");	
	}

  	if (sub_pnd&BIT_SUB_DMA2)
	{
		rSUBSRCPND = BIT_SUB_DMA2;
		rDMASKTRIG2 |= 1;
		printf("d2");	
	}
    ClearPending(BIT_DMA);

}

void TestPioDmaIntMode(void)    
{
	unsigned int i=0;
	unsigned int uWriteBuf, uReadBuf;
	unsigned int deviceLBA;
	unsigned int uSector;
	unsigned int uDeviceMaxSectors;
	unsigned int count_pdma;
	
	uWriteBuf = CODEC_MEM_ST;
	uReadBuf = CODEC_MEM_ST + 0x400000;

	OpenATAMediaWithMode(PIO_DMA);
	GetMaxSectors(&uDeviceMaxSectors);
	
	printf("\nInput device sector address[max: 0x%x]\n",uDeviceMaxSectors);
	deviceLBA = (unsigned int)GetIntNum();

	printf("Input sector count[max: 0x%x]\n",uDeviceMaxSectors-deviceLBA);
	uSector = (unsigned int)GetIntNum();

	for (i=0; i<uSector*512; i++)
	{
		Outp8(uWriteBuf+i, (i)%256);
		Outp8(uReadBuf+i, 0);
	}

	bIsXferDone = FALSE;

	ClearAllInterrupt();
	pISR_CFCON = (unsigned)Isr_Ata;  
	rINTMSK &= (~BIT_CFCON); // unmask cfcon 
	
printf("s");
	StartWriting(deviceLBA, 1, uWriteBuf);
	while(bIsXferDone != TRUE) ;
	bIsXferDone = FALSE;	

printf("d");
    for(i=0; i<2048; i++)
        *(unsigned int *)(0x30200000+i*4)=0x2; //abort
//      *(unsigned char *)(0x30200000+i)=0x3; //continue
//      *(unsigned char *)(0x30200000+i)=0x0; //stop

/*
    // Nand to memory dma setting
    pISR_DMA = (unsigned)DmaDoneNAND;
    rINTSUBMSK &= ~(BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2);
    rINTMSK &= ~(BIT_DMA);
*/    
    rSUBSRCPND=BIT_SUB_DMA0|BIT_SUB_DMA1|BIT_SUB_DMA2;
	rSRCPND=BIT_DMA;   // Init DMA src pending.

	rDISRC0=0x30200000;     // sdram buffer
	rDISRCC0=(0<<1) | (1<<0); //arc=AHB,src_addr=fix
	rDIDST0=0x4E000010; // rNFDATA
	rDIDSTC0=(0<<1) | (1<<0); //dst=AHB,dst_addr=fix;
	rDCON0=(1<<31)|(1<<30)|(1<<29)|(0<<28)|(1<<27)|(0<<24)|(0<<22)|(2<<20)|(0xfffff);
	//Handshake,AHB,interrupt,unit,whole,S/W,no_autoreload,word,count=128;
	rDMAREQSEL0=0; //S/W request mode
    // DMA on and start.
	rDMASKTRIG0=(1<<1)|(1<<0);

	rDISRC1=0x30200200;     // sdram buffer
	rDISRCC1=(0<<1) | (1<<0); //arc=AHB,src_addr=fix
	rDIDST1=0x4E000014; // rNFMECCD0
	rDIDSTC1=(0<<1) | (1<<0); //dst=AHB,dst_addr=fix;
	rDCON1=(1<<31)|(1<<30)|(1<<29)|(0<<28)|(1<<27)|(0<<24)|(0<<22)|(2<<20)|(0xfffff);
	//demand,AHB,interrupt,unit,single,S/W,autoreload,word,count=512;
	rDMAREQSEL1=0; //S/W request mode
    // DMA on and start.
	rDMASKTRIG1=(1<<1)|(1<<0);

	rDISRC2=0x30200400;     // sdram buffer
	rDISRCC2=(0<<1) | (1<<0); //arc=AHB,src_addr=fix
	rDIDST2=0x4E000018; // rNFMECCD1
	rDIDSTC2=(0<<1) | (1<<0); //dst=AHB,dst_addr=fix;
	rDCON2=(1<<31)|(1<<30)|(1<<29)|(0<<28)|(1<<27)|(0<<24)|(0<<22)|(2<<20)|(0xfffff);
	//demand,AHB,interrupt,unit,single,S/W,autoreload,word,count=512;
	rDMAREQSEL2=0; //S/W request mode
    // DMA on and start.
	rDMASKTRIG2=(1<<1)|(1<<0);

//printf("w");
	count_pdma=0;
	while(1)
	{
	    count_pdma++;
	    
	    if(count_pdma==0xffffffff) count_pdma=0;
	    for(i=0; i<count_pdma; i++) ;
	    
	    StartReading(deviceLBA, 1, uReadBuf);
	    while(bIsXferDone != TRUE) ;
	    bIsXferDone = FALSE;    
	    
		if (Compare32(uWriteBuf, uReadBuf, 128) == FALSE)
		{
			printf("Error detected\n");
			Dump32(uReadBuf, 128);
			break;
		}
		else
		{
			printf(".");
		}
	    Outp8(uReadBuf, 0);

	}
	
	rINTMSK |= BIT_CFCON; // mask cfcon 
    rINTMSK |= BIT_DMA;
    rINTSUBMSK |= BIT_SUB_DMA0;
	
	CloseATAMedia();
}


void Test_ATA(void)
{
	int i, sel;

	FUNC_MENU menu[]=
	{
		NULL,							"Exit",
		TestChangeModeToAta,			"Change mode to ATA",	
		TestReset,						"Reset ATA device\n",
		
		TestBasicWriteRead,				"Basic Write/Read test\n",
		
		TestPioCpuMode,					"PIO_CPU mode Write/Read test",
		TestPioCpuModeRead,				"PIO_CPU mode Read test",		
		TestPioDmaMode,					"PIO_DMA mode Write/Read test [Polling mode]",
		TestPioDmaModeRead,				"PIO_DMA mode Read test [Polling mode]",
//		TestUdmaMode,					"UDMA mode Write/Read test [Polling mode]",
//		TestUdmaModeRead,				"UDMA mode Read test [Polling mode]\n",

		TestPioDmaMode_Int,				"PIO_DMA Write/Read test [Interrupt mode]",
//		TestUDmaMode_Int,				"UDMA Write/Read test [Interrupt mode]\n",

// temp test
		TestPioDmaIntMode,				"PIO_DMA corrupt data Write/Read test\n",
		
 		0,0
	};

	while(1)
	{
		printf("\n");
		for (i=0; (int)(menu[i].desc)!=0; i++)
			printf("%2d: %s\n", i, menu[i].desc);

		printf("\nSelect the function to test : ");
		sel = GetIntNum();
		printf("\n");

		if (sel == 0)
			break;
		else if (sel>0 && sel<(sizeof(menu)/8-1))
			(menu[sel].func)();
	}	
}